xref: /rk3399_rockchip-uboot/arch/arm/mach-socfpga/wrap_iocsr_config.c (revision c851a2458fbc12495f4f786d4eabb612850a5143)
1ca62d2e1SMarek Vasut /*
2ca62d2e1SMarek Vasut  * Copyright (C) 2015 Marek Vasut <marex@denx.de>
3ca62d2e1SMarek Vasut  *
4ca62d2e1SMarek Vasut  * SPDX-License-Identifier:    GPL-2.0+
5ca62d2e1SMarek Vasut  */
6ca62d2e1SMarek Vasut 
7ca62d2e1SMarek Vasut #include <common.h>
8ca62d2e1SMarek Vasut #include <errno.h>
9ca62d2e1SMarek Vasut #include <asm/arch/clock_manager.h>
10*f6badb0dSMarek Vasut 
11*f6badb0dSMarek Vasut /* Board-specific header. */
12*f6badb0dSMarek Vasut #include <qts/iocsr_config.h>
13ca62d2e1SMarek Vasut 
iocsr_get_config_table(const unsigned int chain_id,const unsigned long ** table,unsigned int * table_len)14ca62d2e1SMarek Vasut int iocsr_get_config_table(const unsigned int chain_id,
15ca62d2e1SMarek Vasut 			   const unsigned long **table,
16ca62d2e1SMarek Vasut 			   unsigned int *table_len)
17ca62d2e1SMarek Vasut {
18ca62d2e1SMarek Vasut 	switch (chain_id) {
19ca62d2e1SMarek Vasut 	case 0:
20ca62d2e1SMarek Vasut 		*table = iocsr_scan_chain0_table;
21ca62d2e1SMarek Vasut 		*table_len = CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH;
22ca62d2e1SMarek Vasut 		break;
23ca62d2e1SMarek Vasut 	case 1:
24ca62d2e1SMarek Vasut 		*table = iocsr_scan_chain1_table;
25ca62d2e1SMarek Vasut 		*table_len = CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH;
26ca62d2e1SMarek Vasut 		break;
27ca62d2e1SMarek Vasut 	case 2:
28ca62d2e1SMarek Vasut 		*table = iocsr_scan_chain2_table;
29ca62d2e1SMarek Vasut 		*table_len = CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH;
30ca62d2e1SMarek Vasut 		break;
31ca62d2e1SMarek Vasut 	case 3:
32ca62d2e1SMarek Vasut 		*table = iocsr_scan_chain3_table;
33ca62d2e1SMarek Vasut 		*table_len = CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH;
34ca62d2e1SMarek Vasut 		break;
35ca62d2e1SMarek Vasut 	default:
36ca62d2e1SMarek Vasut 		return -EINVAL;
37ca62d2e1SMarek Vasut 	}
38ca62d2e1SMarek Vasut 
39ca62d2e1SMarek Vasut 	return 0;
40ca62d2e1SMarek Vasut }
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