1*30088b09SMasahiro Yamada /* 2*30088b09SMasahiro Yamada * Copyright (C) 2014 Marek Vasut <marex@denx.de> 3*30088b09SMasahiro Yamada * 4*30088b09SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 5*30088b09SMasahiro Yamada */ 6*30088b09SMasahiro Yamada 7*30088b09SMasahiro Yamada #ifndef __SOCFPGA_SCU_H__ 8*30088b09SMasahiro Yamada #define __SOCFPGA_SCU_H__ 9*30088b09SMasahiro Yamada 10*30088b09SMasahiro Yamada struct scu_registers { 11*30088b09SMasahiro Yamada u32 ctrl; /* 0x00 */ 12*30088b09SMasahiro Yamada u32 cfg; 13*30088b09SMasahiro Yamada u32 cpsr; 14*30088b09SMasahiro Yamada u32 iassr; 15*30088b09SMasahiro Yamada u32 _pad_0x10_0x3c[12]; /* 0x10 */ 16*30088b09SMasahiro Yamada u32 fsar; /* 0x40 */ 17*30088b09SMasahiro Yamada u32 fear; 18*30088b09SMasahiro Yamada u32 _pad_0x48_0x50[2]; 19*30088b09SMasahiro Yamada u32 acr; /* 0x54 */ 20*30088b09SMasahiro Yamada u32 sacr; 21*30088b09SMasahiro Yamada }; 22*30088b09SMasahiro Yamada 23*30088b09SMasahiro Yamada #endif /* __SOCFPGA_SCU_H__ */ 24