1*225f5eecSMinkyu Kang /* 2*225f5eecSMinkyu Kang * Copyright (C) 2012 Samsung Electronics 3*225f5eecSMinkyu Kang * Rajeshwari Shinde <rajeshwari.s@samsung.com> 4*225f5eecSMinkyu Kang * 5*225f5eecSMinkyu Kang * SPDX-License-Identifier: GPL-2.0+ 6*225f5eecSMinkyu Kang */ 7*225f5eecSMinkyu Kang 8*225f5eecSMinkyu Kang #ifndef __ASM_ARM_ARCH_PERIPH_H 9*225f5eecSMinkyu Kang #define __ASM_ARM_ARCH_PERIPH_H 10*225f5eecSMinkyu Kang 11*225f5eecSMinkyu Kang /* 12*225f5eecSMinkyu Kang * Peripherals required for pinmux configuration. List will 13*225f5eecSMinkyu Kang * grow with support for more devices getting added. 14*225f5eecSMinkyu Kang * Numbering based on interrupt table. 15*225f5eecSMinkyu Kang * 16*225f5eecSMinkyu Kang */ 17*225f5eecSMinkyu Kang enum periph_id { 18*225f5eecSMinkyu Kang PERIPH_ID_UART0 = 51, 19*225f5eecSMinkyu Kang PERIPH_ID_UART1, 20*225f5eecSMinkyu Kang PERIPH_ID_UART2, 21*225f5eecSMinkyu Kang PERIPH_ID_UART3, 22*225f5eecSMinkyu Kang PERIPH_ID_I2C0 = 56, 23*225f5eecSMinkyu Kang PERIPH_ID_I2C1, 24*225f5eecSMinkyu Kang PERIPH_ID_I2C2, 25*225f5eecSMinkyu Kang PERIPH_ID_I2C3, 26*225f5eecSMinkyu Kang PERIPH_ID_I2C4, 27*225f5eecSMinkyu Kang PERIPH_ID_I2C5, 28*225f5eecSMinkyu Kang PERIPH_ID_I2C6, 29*225f5eecSMinkyu Kang PERIPH_ID_I2C7, 30*225f5eecSMinkyu Kang PERIPH_ID_SPI0 = 68, 31*225f5eecSMinkyu Kang PERIPH_ID_SPI1, 32*225f5eecSMinkyu Kang PERIPH_ID_SPI2, 33*225f5eecSMinkyu Kang PERIPH_ID_SDMMC0 = 75, 34*225f5eecSMinkyu Kang PERIPH_ID_SDMMC1, 35*225f5eecSMinkyu Kang PERIPH_ID_SDMMC2, 36*225f5eecSMinkyu Kang PERIPH_ID_SDMMC3, 37*225f5eecSMinkyu Kang PERIPH_ID_I2C8 = 87, 38*225f5eecSMinkyu Kang PERIPH_ID_I2C9, 39*225f5eecSMinkyu Kang PERIPH_ID_I2S0 = 98, 40*225f5eecSMinkyu Kang PERIPH_ID_I2S1 = 99, 41*225f5eecSMinkyu Kang 42*225f5eecSMinkyu Kang /* Since following peripherals do 43*225f5eecSMinkyu Kang * not have shared peripheral interrupts (SPIs) 44*225f5eecSMinkyu Kang * they are numbered arbitiraly after the maximum 45*225f5eecSMinkyu Kang * SPIs Exynos has (128) 46*225f5eecSMinkyu Kang */ 47*225f5eecSMinkyu Kang PERIPH_ID_SROMC = 128, 48*225f5eecSMinkyu Kang PERIPH_ID_SPI3, 49*225f5eecSMinkyu Kang PERIPH_ID_SPI4, 50*225f5eecSMinkyu Kang PERIPH_ID_SDMMC4, 51*225f5eecSMinkyu Kang PERIPH_ID_PWM0, 52*225f5eecSMinkyu Kang PERIPH_ID_PWM1, 53*225f5eecSMinkyu Kang PERIPH_ID_PWM2, 54*225f5eecSMinkyu Kang PERIPH_ID_PWM3, 55*225f5eecSMinkyu Kang PERIPH_ID_PWM4, 56*225f5eecSMinkyu Kang PERIPH_ID_I2C10 = 203, 57*225f5eecSMinkyu Kang 58*225f5eecSMinkyu Kang PERIPH_ID_NONE = -1, 59*225f5eecSMinkyu Kang }; 60*225f5eecSMinkyu Kang 61*225f5eecSMinkyu Kang #endif /* __ASM_ARM_ARCH_PERIPH_H */ 62