1*225f5eecSMinkyu Kang /* 2*225f5eecSMinkyu Kang * (C) Copyright 2009 SAMSUNG Electronics 3*225f5eecSMinkyu Kang * Minkyu Kang <mk7.kang@samsung.com> 4*225f5eecSMinkyu Kang * 5*225f5eecSMinkyu Kang * SPDX-License-Identifier: GPL-2.0+ 6*225f5eecSMinkyu Kang */ 7*225f5eecSMinkyu Kang 8*225f5eecSMinkyu Kang #ifndef __ASM_ARCH_MMC_H_ 9*225f5eecSMinkyu Kang #define __ASM_ARCH_MMC_H_ 10*225f5eecSMinkyu Kang 11*225f5eecSMinkyu Kang #define S5P_MMC_DEV_OFFSET 0x100000 12*225f5eecSMinkyu Kang 13*225f5eecSMinkyu Kang #define SDHCI_CONTROL2 0x80 14*225f5eecSMinkyu Kang #define SDHCI_CONTROL3 0x84 15*225f5eecSMinkyu Kang #define SDHCI_CONTROL4 0x8C 16*225f5eecSMinkyu Kang 17*225f5eecSMinkyu Kang #define SDHCI_CTRL2_ENSTAASYNCCLR (1 << 31) 18*225f5eecSMinkyu Kang #define SDHCI_CTRL2_ENCMDCNFMSK (1 << 30) 19*225f5eecSMinkyu Kang #define SDHCI_CTRL2_CDINVRXD3 (1 << 29) 20*225f5eecSMinkyu Kang #define SDHCI_CTRL2_SLCARDOUT (1 << 28) 21*225f5eecSMinkyu Kang 22*225f5eecSMinkyu Kang #define SDHCI_CTRL2_FLTCLKSEL_MASK (0xf << 24) 23*225f5eecSMinkyu Kang #define SDHCI_CTRL2_FLTCLKSEL_SHIFT (24) 24*225f5eecSMinkyu Kang #define SDHCI_CTRL2_FLTCLKSEL(_x) ((_x) << 24) 25*225f5eecSMinkyu Kang 26*225f5eecSMinkyu Kang #define SDHCI_CTRL2_LVLDAT_MASK (0xff << 16) 27*225f5eecSMinkyu Kang #define SDHCI_CTRL2_LVLDAT_SHIFT (16) 28*225f5eecSMinkyu Kang #define SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16) 29*225f5eecSMinkyu Kang 30*225f5eecSMinkyu Kang #define SDHCI_CTRL2_ENFBCLKTX (1 << 15) 31*225f5eecSMinkyu Kang #define SDHCI_CTRL2_ENFBCLKRX (1 << 14) 32*225f5eecSMinkyu Kang #define SDHCI_CTRL2_SDCDSEL (1 << 13) 33*225f5eecSMinkyu Kang #define SDHCI_CTRL2_SDSIGPC (1 << 12) 34*225f5eecSMinkyu Kang #define SDHCI_CTRL2_ENBUSYCHKTXSTART (1 << 11) 35*225f5eecSMinkyu Kang 36*225f5eecSMinkyu Kang #define SDHCI_CTRL2_DFCNT_MASK(_x) ((_x) << 9) 37*225f5eecSMinkyu Kang #define SDHCI_CTRL2_DFCNT_SHIFT (9) 38*225f5eecSMinkyu Kang 39*225f5eecSMinkyu Kang #define SDHCI_CTRL2_ENCLKOUTHOLD (1 << 8) 40*225f5eecSMinkyu Kang #define SDHCI_CTRL2_RWAITMODE (1 << 7) 41*225f5eecSMinkyu Kang #define SDHCI_CTRL2_DISBUFRD (1 << 6) 42*225f5eecSMinkyu Kang #define SDHCI_CTRL2_SELBASECLK_MASK(_x) ((_x) << 4) 43*225f5eecSMinkyu Kang #define SDHCI_CTRL2_SELBASECLK_SHIFT (4) 44*225f5eecSMinkyu Kang #define SDHCI_CTRL2_PWRSYNC (1 << 3) 45*225f5eecSMinkyu Kang #define SDHCI_CTRL2_ENCLKOUTMSKCON (1 << 1) 46*225f5eecSMinkyu Kang #define SDHCI_CTRL2_HWINITFIN (1 << 0) 47*225f5eecSMinkyu Kang 48*225f5eecSMinkyu Kang #define SDHCI_CTRL3_FCSEL3 (1 << 31) 49*225f5eecSMinkyu Kang #define SDHCI_CTRL3_FCSEL2 (1 << 23) 50*225f5eecSMinkyu Kang #define SDHCI_CTRL3_FCSEL1 (1 << 15) 51*225f5eecSMinkyu Kang #define SDHCI_CTRL3_FCSEL0 (1 << 7) 52*225f5eecSMinkyu Kang 53*225f5eecSMinkyu Kang #define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16) 54*225f5eecSMinkyu Kang #define SDHCI_CTRL4_DRIVE_SHIFT (16) 55*225f5eecSMinkyu Kang 56*225f5eecSMinkyu Kang int s5p_sdhci_init(u32 regbase, int index, int bus_width); 57*225f5eecSMinkyu Kang s5p_mmc_init(int index,int bus_width)58*225f5eecSMinkyu Kangstatic inline int s5p_mmc_init(int index, int bus_width) 59*225f5eecSMinkyu Kang { 60*225f5eecSMinkyu Kang unsigned int base = samsung_get_base_mmc() + 61*225f5eecSMinkyu Kang (S5P_MMC_DEV_OFFSET * index); 62*225f5eecSMinkyu Kang 63*225f5eecSMinkyu Kang return s5p_sdhci_init(base, index, bus_width); 64*225f5eecSMinkyu Kang } 65*225f5eecSMinkyu Kang #endif 66