xref: /rk3399_rockchip-uboot/arch/arm/mach-s5pc1xx/include/mach/cpu.h (revision a71d99ac03c8d5d9622962344485b04aade27b67)
1*225f5eecSMinkyu Kang /*
2*225f5eecSMinkyu Kang  * (C) Copyright 2009 Samsung Electronics
3*225f5eecSMinkyu Kang  * Minkyu Kang <mk7.kang@samsung.com>
4*225f5eecSMinkyu Kang  * Heungjun Kim <riverful.kim@samsung.com>
5*225f5eecSMinkyu Kang  *
6*225f5eecSMinkyu Kang  * SPDX-License-Identifier:	GPL-2.0+
7*225f5eecSMinkyu Kang  */
8*225f5eecSMinkyu Kang 
9*225f5eecSMinkyu Kang #ifndef _S5PC1XX_CPU_H
10*225f5eecSMinkyu Kang #define _S5PC1XX_CPU_H
11*225f5eecSMinkyu Kang 
12*225f5eecSMinkyu Kang #define S5P_CPU_NAME		"S5P"
13*225f5eecSMinkyu Kang #define S5PC1XX_ADDR_BASE	0xE0000000
14*225f5eecSMinkyu Kang 
15*225f5eecSMinkyu Kang /* S5PC100 */
16*225f5eecSMinkyu Kang #define S5PC100_PRO_ID		0xE0000000
17*225f5eecSMinkyu Kang #define S5PC100_CLOCK_BASE	0xE0100000
18*225f5eecSMinkyu Kang #define S5PC100_GPIO_BASE	0xE0300000
19*225f5eecSMinkyu Kang #define S5PC100_VIC0_BASE	0xE4000000
20*225f5eecSMinkyu Kang #define S5PC100_VIC1_BASE	0xE4100000
21*225f5eecSMinkyu Kang #define S5PC100_VIC2_BASE	0xE4200000
22*225f5eecSMinkyu Kang #define S5PC100_DMC_BASE	0xE6000000
23*225f5eecSMinkyu Kang #define S5PC100_SROMC_BASE	0xE7000000
24*225f5eecSMinkyu Kang #define S5PC100_ONENAND_BASE	0xE7100000
25*225f5eecSMinkyu Kang #define S5PC100_PWMTIMER_BASE	0xEA000000
26*225f5eecSMinkyu Kang #define S5PC100_WATCHDOG_BASE	0xEA200000
27*225f5eecSMinkyu Kang #define S5PC100_UART_BASE	0xEC000000
28*225f5eecSMinkyu Kang #define S5PC100_MMC_BASE	0xED800000
29*225f5eecSMinkyu Kang 
30*225f5eecSMinkyu Kang /* S5PC110 */
31*225f5eecSMinkyu Kang #define S5PC110_PRO_ID		0xE0000000
32*225f5eecSMinkyu Kang #define S5PC110_CLOCK_BASE	0xE0100000
33*225f5eecSMinkyu Kang #define S5PC110_GPIO_BASE	0xE0200000
34*225f5eecSMinkyu Kang #define S5PC110_PWMTIMER_BASE	0xE2500000
35*225f5eecSMinkyu Kang #define S5PC110_WATCHDOG_BASE	0xE2700000
36*225f5eecSMinkyu Kang #define S5PC110_UART_BASE	0xE2900000
37*225f5eecSMinkyu Kang #define S5PC110_SROMC_BASE	0xE8000000
38*225f5eecSMinkyu Kang #define S5PC110_MMC_BASE	0xEB000000
39*225f5eecSMinkyu Kang #define S5PC110_DMC0_BASE	0xF0000000
40*225f5eecSMinkyu Kang #define S5PC110_DMC1_BASE	0xF1400000
41*225f5eecSMinkyu Kang #define S5PC110_VIC0_BASE	0xF2000000
42*225f5eecSMinkyu Kang #define S5PC110_VIC1_BASE	0xF2100000
43*225f5eecSMinkyu Kang #define S5PC110_VIC2_BASE	0xF2200000
44*225f5eecSMinkyu Kang #define S5PC110_VIC3_BASE	0xF2300000
45*225f5eecSMinkyu Kang #define S5PC110_OTG_BASE	0xEC000000
46*225f5eecSMinkyu Kang #define S5PC110_PHY_BASE	0xEC100000
47*225f5eecSMinkyu Kang #define S5PC110_USB_PHY_CONTROL 0xE010E80C
48*225f5eecSMinkyu Kang 
49*225f5eecSMinkyu Kang 
50*225f5eecSMinkyu Kang #ifndef __ASSEMBLY__
51*225f5eecSMinkyu Kang #include <asm/io.h>
52*225f5eecSMinkyu Kang /* CPU detection macros */
53*225f5eecSMinkyu Kang extern unsigned int s5p_cpu_id;
54*225f5eecSMinkyu Kang extern unsigned int s5p_cpu_rev;
55*225f5eecSMinkyu Kang 
s5p_get_cpu_rev(void)56*225f5eecSMinkyu Kang static inline int s5p_get_cpu_rev(void)
57*225f5eecSMinkyu Kang {
58*225f5eecSMinkyu Kang 	return s5p_cpu_rev;
59*225f5eecSMinkyu Kang }
60*225f5eecSMinkyu Kang 
s5p_set_cpu_id(void)61*225f5eecSMinkyu Kang static inline void s5p_set_cpu_id(void)
62*225f5eecSMinkyu Kang {
63*225f5eecSMinkyu Kang 	s5p_cpu_id = readl(S5PC100_PRO_ID);
64*225f5eecSMinkyu Kang 	s5p_cpu_rev = s5p_cpu_id & 0x000000FF;
65*225f5eecSMinkyu Kang 	s5p_cpu_id = 0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12);
66*225f5eecSMinkyu Kang }
67*225f5eecSMinkyu Kang 
s5p_get_cpu_name(void)68*225f5eecSMinkyu Kang static inline char *s5p_get_cpu_name(void)
69*225f5eecSMinkyu Kang {
70*225f5eecSMinkyu Kang 	return S5P_CPU_NAME;
71*225f5eecSMinkyu Kang }
72*225f5eecSMinkyu Kang 
73*225f5eecSMinkyu Kang #define IS_SAMSUNG_TYPE(type, id)			\
74*225f5eecSMinkyu Kang static inline int cpu_is_##type(void)			\
75*225f5eecSMinkyu Kang {							\
76*225f5eecSMinkyu Kang 	return s5p_cpu_id == id ? 1 : 0;		\
77*225f5eecSMinkyu Kang }
78*225f5eecSMinkyu Kang 
79*225f5eecSMinkyu Kang IS_SAMSUNG_TYPE(s5pc100, 0xc100)
80*225f5eecSMinkyu Kang IS_SAMSUNG_TYPE(s5pc110, 0xc110)
81*225f5eecSMinkyu Kang 
82*225f5eecSMinkyu Kang #define SAMSUNG_BASE(device, base)				\
83*225f5eecSMinkyu Kang static inline unsigned int samsung_get_base_##device(void)	\
84*225f5eecSMinkyu Kang {								\
85*225f5eecSMinkyu Kang 	if (cpu_is_s5pc100())					\
86*225f5eecSMinkyu Kang 		return S5PC100_##base;				\
87*225f5eecSMinkyu Kang 	else if (cpu_is_s5pc110())				\
88*225f5eecSMinkyu Kang 		return S5PC110_##base;				\
89*225f5eecSMinkyu Kang 	else							\
90*225f5eecSMinkyu Kang 		return 0;					\
91*225f5eecSMinkyu Kang }
92*225f5eecSMinkyu Kang 
93*225f5eecSMinkyu Kang SAMSUNG_BASE(clock, CLOCK_BASE)
94*225f5eecSMinkyu Kang SAMSUNG_BASE(gpio, GPIO_BASE)
95*225f5eecSMinkyu Kang SAMSUNG_BASE(pro_id, PRO_ID)
96*225f5eecSMinkyu Kang SAMSUNG_BASE(mmc, MMC_BASE)
97*225f5eecSMinkyu Kang SAMSUNG_BASE(sromc, SROMC_BASE)
98*225f5eecSMinkyu Kang SAMSUNG_BASE(timer, PWMTIMER_BASE)
99*225f5eecSMinkyu Kang SAMSUNG_BASE(uart, UART_BASE)
100*225f5eecSMinkyu Kang SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
101*225f5eecSMinkyu Kang #endif
102*225f5eecSMinkyu Kang 
103*225f5eecSMinkyu Kang #endif	/* _S5PC1XX_CPU_H */
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