1*225f5eecSMinkyu Kang /* 2*225f5eecSMinkyu Kang * (C) Copyright 2009 Samsung Electronics 3*225f5eecSMinkyu Kang * Minkyu Kang <mk7.kang@samsung.com> 4*225f5eecSMinkyu Kang * Heungjun Kim <riverful.kim@samsung.com> 5*225f5eecSMinkyu Kang * 6*225f5eecSMinkyu Kang * SPDX-License-Identifier: GPL-2.0+ 7*225f5eecSMinkyu Kang */ 8*225f5eecSMinkyu Kang 9*225f5eecSMinkyu Kang #ifndef __ASM_ARM_ARCH_CLK_H_ 10*225f5eecSMinkyu Kang #define __ASM_ARM_ARCH_CLK_H_ 11*225f5eecSMinkyu Kang 12*225f5eecSMinkyu Kang #define APLL 0 13*225f5eecSMinkyu Kang #define MPLL 1 14*225f5eecSMinkyu Kang #define EPLL 2 15*225f5eecSMinkyu Kang #define HPLL 3 16*225f5eecSMinkyu Kang #define VPLL 4 17*225f5eecSMinkyu Kang 18*225f5eecSMinkyu Kang unsigned long get_pll_clk(int pllreg); 19*225f5eecSMinkyu Kang unsigned long get_arm_clk(void); 20*225f5eecSMinkyu Kang unsigned long get_pwm_clk(void); 21*225f5eecSMinkyu Kang unsigned long get_uart_clk(int dev_index); 22*225f5eecSMinkyu Kang void set_mmc_clk(int dev_index, unsigned int div); 23*225f5eecSMinkyu Kang 24*225f5eecSMinkyu Kang #endif 25