xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/rockchip_debugger.c (revision 13ceb2afdcb6f5114908e39f0d2453728eb24e0f)
1c563adc7SJoseph Chen /*
2c563adc7SJoseph Chen  * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3c563adc7SJoseph Chen  *
4c563adc7SJoseph Chen  * SPDX-License-Identifier:     GPL-2.0+
5c563adc7SJoseph Chen  */
6c563adc7SJoseph Chen 
7c563adc7SJoseph Chen #include <asm/io.h>
8c563adc7SJoseph Chen #include <common.h>
9c563adc7SJoseph Chen #include <irq-generic.h>
10c563adc7SJoseph Chen #include <rk_timer_irq.h>
11c563adc7SJoseph Chen 
12c563adc7SJoseph Chen /*
13c563adc7SJoseph Chen  * Currently, we support a timer timeout to generate a IRQ to dump cpu context.
14c563adc7SJoseph Chen  */
15c563adc7SJoseph Chen #define ROCKCHIP_DEBUGGER_TIMEOUT	5	/* seconds */
16c563adc7SJoseph Chen 
rockchip_debugger_isr(int irq,void * data)17c563adc7SJoseph Chen static void rockchip_debugger_isr(int irq, void *data)
18c563adc7SJoseph Chen {
19c563adc7SJoseph Chen 	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
20c563adc7SJoseph Chen }
21c563adc7SJoseph Chen 
rockchip_debugger_init(void)22c563adc7SJoseph Chen int rockchip_debugger_init(void)
23c563adc7SJoseph Chen {
24c563adc7SJoseph Chen 	uint32_t load_count0, load_count1;
25*13ceb2afSXuhui Lin 	uint64_t delay_c = ROCKCHIP_DEBUGGER_TIMEOUT * gd->arch.timer_rate_hz;
26c563adc7SJoseph Chen 
27c563adc7SJoseph Chen 	if (!delay_c)
28c563adc7SJoseph Chen 		return 0;
29c563adc7SJoseph Chen 
30c563adc7SJoseph Chen 	printf("Enable rockchip debugger\n");
31c563adc7SJoseph Chen 
32c563adc7SJoseph Chen 	/* Disable first */
33c563adc7SJoseph Chen 	writel(0, TIMER_BASE + TIMER_CTRL);
34c563adc7SJoseph Chen 
35c563adc7SJoseph Chen 	/* Config */
36c563adc7SJoseph Chen 	load_count0 = (uint32_t)(delay_c);
37c563adc7SJoseph Chen 	load_count1 = (uint32_t)(delay_c >> 32);
38c563adc7SJoseph Chen 	writel(load_count0, TIMER_BASE + TIMER_LOAD_COUNT0);
39c563adc7SJoseph Chen 	writel(load_count1, TIMER_BASE + TIMER_LOAD_COUNT1);
40c563adc7SJoseph Chen 	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
41c563adc7SJoseph Chen 	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
42c563adc7SJoseph Chen 
43c563adc7SJoseph Chen 	/* Request irq */
44c563adc7SJoseph Chen 	irq_install_handler(TIMER_IRQ, rockchip_debugger_isr, NULL);
45c563adc7SJoseph Chen 	irq_handler_enable(TIMER_IRQ);
46c563adc7SJoseph Chen 
47c563adc7SJoseph Chen 	return 0;
48c563adc7SJoseph Chen }
49