1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6 #include <common.h> 7 #include <dm.h> 8 #include <ram.h> 9 #include <asm/io.h> 10 #include <asm/arch/rk_atags.h> 11 #include <asm/arch/param.h> 12 13 DECLARE_GLOBAL_DATA_PTR; 14 15 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) 16 #define SDRAM_OFFSET(offset) (CONFIG_SYS_SDRAM_BASE + (offset)) 17 #define PARAM_DRAM_INFO_OFFSET (SZ_32M) 18 #define PARAM_OPTEE_INFO_OFFSET (SZ_32M + SZ_2M) 19 20 struct tos_param_t { 21 u32 version; 22 u32 checksum; 23 struct { 24 char name[8]; 25 s64 phy_addr; 26 u32 size; 27 u32 flags; 28 } tee_mem; 29 struct { 30 char name[8]; 31 s64 phy_addr; 32 u32 size; 33 u32 flags; 34 } drm_mem; 35 s64 reserve[8]; 36 }; 37 38 static uint16_t trust_checksum(const uint8_t *buf, uint16_t len) 39 { 40 uint16_t i, checksum = 0; 41 42 for (i = 0; i < len; i++) { 43 if (i % 2) 44 checksum += buf[i] << 8; 45 else 46 checksum += buf[i]; 47 } 48 checksum = ~checksum; 49 50 return checksum; 51 } 52 53 struct memblock param_parse_atf_mem(void) 54 { 55 struct memblock mem; 56 57 mem.base = 0; 58 mem.size = 0; 59 60 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 61 struct tag *t = NULL; 62 63 /* 64 * Get memory region of ATF 65 * 66 * 1. New way: atags info; 67 * 2. Leagcy way: 2MB size and start from ddr 0x0 offset; 68 */ 69 t = atags_get_tag(ATAG_ATF_MEM); 70 if (t && t->u.atf_mem.size) { 71 mem.base = t->u.atf_mem.phy_addr; 72 mem.size = t->u.atf_mem.size; 73 /* Sanity */ 74 if (mem.base + mem.size > SDRAM_OFFSET(SZ_1M)) { 75 printf("%s: ATF reserved region is not within 0-1MB " 76 "offset(0x%08llx-0x%08llx)!\n", 77 __func__, (u64)mem.base, (u64)mem.base + mem.size); 78 return mem; 79 } 80 } 81 #endif 82 83 /* Legacy */ 84 if (!mem.size) { 85 if (IS_ENABLED(CONFIG_ARM64) || 86 IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32)) { 87 mem.base = SDRAM_OFFSET(0); 88 mem.size = SZ_1M; 89 } 90 } 91 92 debug("ATF: 0x%llx - 0x%llx\n", (u64)mem.base, (u64)mem.base + mem.size); 93 94 return mem; 95 } 96 97 struct memblock param_parse_optee_mem(void) 98 { 99 struct tos_param_t *tos_parameter; 100 struct memblock mem; 101 u32 checksum; 102 103 mem.base = 0; 104 mem.size = 0; 105 106 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 107 struct tag *t = NULL; 108 109 /* 110 * Get memory region of OP-TEE 111 * 112 * 1. New way: atags info; 113 * 2. Leagcy way: info in ddr 34M offset; 114 */ 115 t = atags_get_tag(ATAG_TOS_MEM); 116 if (t && (t->u.tos_mem.tee_mem.flags == 1)) { 117 mem.base = t->u.tos_mem.tee_mem.phy_addr; 118 mem.size = t->u.tos_mem.tee_mem.size; 119 } 120 #endif 121 122 /* Legacy */ 123 if (!mem.size) { 124 tos_parameter = 125 (struct tos_param_t *)(SDRAM_OFFSET(PARAM_OPTEE_INFO_OFFSET)); 126 checksum = 127 trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8, 128 sizeof(struct tos_param_t) - 8); 129 if ((checksum == tos_parameter->checksum) && 130 (tos_parameter->tee_mem.flags == 1)) { 131 mem.base = tos_parameter->tee_mem.phy_addr; 132 mem.size = tos_parameter->tee_mem.size; 133 } 134 } 135 136 if (mem.size) 137 gd->flags |= GD_FLG_BL32_ENABLED; 138 139 debug("TOS: 0x%llx - 0x%llx\n", (u64)mem.base, (u64)mem.base + mem.size); 140 141 return mem; 142 } 143 144 struct memblock param_parse_common_resv_mem(void) 145 { 146 struct memblock mem; 147 148 #ifdef CONFIG_ARM64 149 mem.base = SDRAM_OFFSET(SZ_1M); 150 mem.size = SZ_1M; 151 #else 152 mem.size = 0; 153 #endif 154 return mem; 155 } 156 157 int param_parse_bootdev(char **devtype, char **devnum) 158 { 159 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 160 struct tag *t; 161 162 t = atags_get_tag(ATAG_BOOTDEV); 163 if (t) { 164 switch (t->u.bootdev.devtype) { 165 case BOOT_TYPE_EMMC: 166 *devtype = "mmc"; 167 *devnum = "0"; 168 break; 169 case BOOT_TYPE_SD0: 170 case BOOT_TYPE_SD1: 171 *devtype = "mmc"; 172 *devnum = "1"; 173 /* 174 * If preloader does not pass sdupdate value, we treat it 175 * as a unknown card and call the rkimgtest cmd to find 176 * out what it is. 177 * 178 * If preloader pass sdupdate value as an update card, 179 * we just set "sdfwupdate" to bootargs instead of 180 * calling rkimgtest cmd which consumes time. 181 */ 182 if (t->u.bootdev.sdupdate == SD_UNKNOWN_CARD) { 183 run_command("mmc dev 1", 0); 184 run_command("rkimgtest mmc 1", 0); 185 } else if (t->u.bootdev.sdupdate == SD_UPDATE_CARD) { 186 env_update("bootargs", "sdfwupdate"); 187 } 188 break; 189 case BOOT_TYPE_NAND: 190 *devtype = "rknand"; 191 *devnum = "0"; 192 break; 193 case BOOT_TYPE_SPI_NAND: 194 *devtype = "spinand"; 195 *devnum = "0"; 196 break; 197 case BOOT_TYPE_SPI_NOR: 198 *devtype = "spinor"; 199 *devnum = "1"; 200 break; 201 case BOOT_TYPE_RAM: 202 *devtype = "ramdisk"; 203 *devnum = "0"; 204 break; 205 default: 206 printf("Unknown bootdev type: 0x%x\n", 207 t->u.bootdev.devtype); 208 return -EINVAL; 209 } 210 211 return 0; 212 } 213 #endif 214 215 return -ENOSYS; 216 } 217 #endif 218 219 struct memblock *param_parse_ddr_mem(int *out_count) 220 { 221 struct udevice *dev; 222 struct memblock *mem; 223 struct ram_info ram; 224 int i, ret, count; 225 226 /* 227 * Get memory region of DDR 228 * 229 * 1. New: atags info; 230 * 2. Leagcy: os register; 231 */ 232 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 233 struct tag *t; 234 235 t = atags_get_tag(ATAG_DDR_MEM); 236 if (t && t->u.ddr_mem.count) { 237 count = t->u.ddr_mem.count; 238 mem = calloc(count, sizeof(*mem)); 239 if (!mem) { 240 printf("Calloc ddr memory failed\n"); 241 return 0; 242 } 243 244 for (i = 0; i < count; i++) { 245 mem[i].base = t->u.ddr_mem.bank[i]; 246 mem[i].size = t->u.ddr_mem.bank[i + count]; 247 } 248 249 *out_count = count; 250 return mem; 251 } 252 #endif 253 254 /* Leagcy */ 255 ret = uclass_get_device(UCLASS_RAM, 0, &dev); 256 if (ret) { 257 debug("DRAM init failed: %d\n", ret); 258 return NULL; 259 } 260 ret = ram_get_info(dev, &ram); 261 if (ret) { 262 debug("Cannot get DRAM size: %d\n", ret); 263 return NULL; 264 } 265 266 debug("SDRAM base=%lx, size=%lx\n", 267 (unsigned long)ram.base, (unsigned long)ram.size); 268 269 count = 1; 270 mem = calloc(1, sizeof(*mem)); 271 if (!mem) { 272 printf("Calloc ddr memory failed\n"); 273 return 0; 274 } 275 276 for (i = 0; i < count; i++) { 277 mem[i].base = CONFIG_SYS_SDRAM_BASE; 278 mem[i].size = ram.size; 279 } 280 281 *out_count = count; 282 return mem; 283 } 284