1*d4e052e6SJoseph Chen/* SPDX-License-Identifier: GPL-2.0+ */ 2*d4e052e6SJoseph Chen/* 3*d4e052e6SJoseph Chen * (C) Copyright 2021 Rockchip Electronics Co., Ltd 4*d4e052e6SJoseph Chen */ 5*d4e052e6SJoseph Chen 6*d4e052e6SJoseph Chen#include <config.h> 7*d4e052e6SJoseph Chen 8*d4e052e6SJoseph Chen#ifdef CONFIG_ARM64 9*d4e052e6SJoseph Chen/* 10*d4e052e6SJoseph Chen * Switch from AArch64 EL2 to AArch32 EL2 11*d4e052e6SJoseph Chen * 12*d4e052e6SJoseph Chen * @param inputs: 13*d4e052e6SJoseph Chen * x0: argument, zero 14*d4e052e6SJoseph Chen * x1: machine nr 15*d4e052e6SJoseph Chen * x2: fdt address 16*d4e052e6SJoseph Chen * x3: input argument 17*d4e052e6SJoseph Chen * x4: kernel entry point 18*d4e052e6SJoseph Chen * 19*d4e052e6SJoseph Chen * @param outputs for secure firmware: 20*d4e052e6SJoseph Chen * x0: function id 21*d4e052e6SJoseph Chen * x1: kernel entry point 22*d4e052e6SJoseph Chen * x2: machine nr 23*d4e052e6SJoseph Chen * x3: fdt address 24*d4e052e6SJoseph Chen * x4: input argument 25*d4e052e6SJoseph Chen */ 26*d4e052e6SJoseph Chen.global armv8_el2_to_aarch32 27*d4e052e6SJoseph Chenarmv8_el2_to_aarch32: 28*d4e052e6SJoseph Chen mov x0, x3 29*d4e052e6SJoseph Chen mov x3, x2 30*d4e052e6SJoseph Chen mov x2, x1 31*d4e052e6SJoseph Chen mov x1, x4 32*d4e052e6SJoseph Chen mov x4, x0 33*d4e052e6SJoseph Chen ldr x0, =0x82000023 34*d4e052e6SJoseph Chen smc #0 35*d4e052e6SJoseph Chen ret 36*d4e052e6SJoseph Chen#endif 37*d4e052e6SJoseph Chen 38