166d05910SJoseph Chen // SPDX-License-Identifier: GPL-2.0
266d05910SJoseph Chen /*
366d05910SJoseph Chen * Copyright (c) 2020 Rockchip Electronics Co., Ltd
466d05910SJoseph Chen */
566d05910SJoseph Chen
666d05910SJoseph Chen #include <common.h>
766d05910SJoseph Chen #include <dm.h>
866d05910SJoseph Chen #include <ram.h>
966d05910SJoseph Chen #include <asm/io.h>
1066d05910SJoseph Chen #include <asm/arch/param.h>
1166d05910SJoseph Chen #include <asm/arch/rk_atags.h>
1266d05910SJoseph Chen
1366d05910SJoseph Chen DECLARE_GLOBAL_DATA_PTR;
1466d05910SJoseph Chen
fpga_init_atags(void)1566d05910SJoseph Chen static void fpga_init_atags(void)
1666d05910SJoseph Chen {
1766d05910SJoseph Chen #ifdef CONFIG_FPGA_RAM
1866d05910SJoseph Chen struct tag_ram_partition t_ram_part;
1966d05910SJoseph Chen #endif
2066d05910SJoseph Chen struct tag_bootdev t_bootdev;
2166d05910SJoseph Chen struct tag_ddr_mem t_ddrmem;
2266d05910SJoseph Chen struct tag_serial t_serial;
2366d05910SJoseph Chen struct tag_tos_mem t_tos;
2466d05910SJoseph Chen #if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
2566d05910SJoseph Chen struct tag_atf_mem t_atf;
2666d05910SJoseph Chen #endif
2766d05910SJoseph Chen /* destroy ! */
2866d05910SJoseph Chen atags_destroy();
2966d05910SJoseph Chen
3066d05910SJoseph Chen /* serial */
3166d05910SJoseph Chen memset(&t_serial, 0, sizeof(t_serial));
3266d05910SJoseph Chen t_serial.version = 0;
3366d05910SJoseph Chen t_serial.enable = 1;
3466d05910SJoseph Chen t_serial.addr = CONFIG_DEBUG_UART_BASE;
3566d05910SJoseph Chen t_serial.baudrate = CONFIG_BAUDRATE;
3666d05910SJoseph Chen t_serial.m_mode = 0;
3766d05910SJoseph Chen t_serial.id = 2;
3866d05910SJoseph Chen atags_set_tag(ATAG_SERIAL, &t_serial);
3966d05910SJoseph Chen
4066d05910SJoseph Chen /* ddr memory */
4166d05910SJoseph Chen memset(&t_ddrmem, 0, sizeof(t_ddrmem));
4266d05910SJoseph Chen t_ddrmem.version = 0;
4366d05910SJoseph Chen t_ddrmem.count = 1;
4466d05910SJoseph Chen t_ddrmem.bank[0] = CONFIG_SYS_SDRAM_BASE;
45*77e42ec3SXuhui Lin t_ddrmem.bank[1] = SZ_512M;
4666d05910SJoseph Chen atags_set_tag(ATAG_DDR_MEM, &t_ddrmem);
4766d05910SJoseph Chen
4866d05910SJoseph Chen /* bootdev */
4966d05910SJoseph Chen memset(&t_bootdev, 0, sizeof(t_bootdev));
5066d05910SJoseph Chen t_bootdev.version = 0;
5166d05910SJoseph Chen #ifdef CONFIG_FPGA_RAM
5266d05910SJoseph Chen t_bootdev.devtype = BOOT_TYPE_RAM;
5366d05910SJoseph Chen #else
5466d05910SJoseph Chen t_bootdev.devtype = BOOT_TYPE_EMMC;
5566d05910SJoseph Chen #endif
5666d05910SJoseph Chen t_bootdev.devnum = 0;
5766d05910SJoseph Chen t_bootdev.sdupdate = 0;
5866d05910SJoseph Chen atags_set_tag(ATAG_BOOTDEV, &t_bootdev);
5966d05910SJoseph Chen
6066d05910SJoseph Chen /* atf */
6166d05910SJoseph Chen #if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
6266d05910SJoseph Chen memset(&t_atf, 0, sizeof(t_atf));
6366d05910SJoseph Chen t_atf.version = 0;
6466d05910SJoseph Chen t_atf.phy_addr = CONFIG_SYS_SDRAM_BASE;
6566d05910SJoseph Chen t_atf.size = SZ_1M;
6666d05910SJoseph Chen t_atf.flags = 0;
6766d05910SJoseph Chen atags_set_tag(ATAG_ATF_MEM, &t_atf);
6866d05910SJoseph Chen #endif
6966d05910SJoseph Chen
7066d05910SJoseph Chen /* op-tee */
7166d05910SJoseph Chen memset(&t_tos, 0, sizeof(t_tos));
7266d05910SJoseph Chen t_tos.version = 0;
7366d05910SJoseph Chen strcpy(t_tos.tee_mem.name, "op-tee");
7466d05910SJoseph Chen #ifdef CONFIG_ARM64
7566d05910SJoseph Chen t_tos.tee_mem.phy_addr = 0x8400000; /* 132M offset */
7666d05910SJoseph Chen t_tos.tee_mem.size = 0x1e00000; /* 30M size */
7766d05910SJoseph Chen #endif
7866d05910SJoseph Chen t_tos.tee_mem.flags = 1;
7966d05910SJoseph Chen atags_set_tag(ATAG_TOS_MEM, &t_tos);
8066d05910SJoseph Chen
8166d05910SJoseph Chen #ifdef CONFIG_FPGA_RAM
8266d05910SJoseph Chen /* ram part */
8366d05910SJoseph Chen memset(&t_ram_part, 0, sizeof(t_ram_part));
8466d05910SJoseph Chen t_ram_part.version = 0;
8566d05910SJoseph Chen t_ram_part.count = 1;
8666d05910SJoseph Chen strcpy(t_ram_part.part[0].name, "boot");
8766d05910SJoseph Chen t_ram_part.part[0].start = 0x4000000; /* 64M offset */
8866d05910SJoseph Chen t_ram_part.part[0].size = 0x2000000; /* 32M size */
8966d05910SJoseph Chen atags_set_tag(ATAG_RAM_PARTITION, &t_ram_part);
9066d05910SJoseph Chen #endif
9166d05910SJoseph Chen }
9266d05910SJoseph Chen
arch_fpga_init(void)9366d05910SJoseph Chen int arch_fpga_init(void)
9466d05910SJoseph Chen {
9566d05910SJoseph Chen fpga_init_atags();
9666d05910SJoseph Chen
9766d05910SJoseph Chen return 0;
9866d05910SJoseph Chen }
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