xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/board.c (revision f269c7e952a4c0e2ab4c185d34d2479944c4e33b) 
1 /*
2  * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <amp.h>
9 #include <android_bootloader.h>
10 #include <android_image.h>
11 #include <bidram.h>
12 #include <boot_rkimg.h>
13 #include <cli.h>
14 #include <clk.h>
15 #include <console.h>
16 #include <debug_uart.h>
17 #include <dm.h>
18 #include <dvfs.h>
19 #include <io-domain.h>
20 #include <image.h>
21 #include <key.h>
22 #include <memblk.h>
23 #include <misc.h>
24 #include <of_live.h>
25 #include <mtd_blk.h>
26 #include <ram.h>
27 #include <rockchip_debugger.h>
28 #include <syscon.h>
29 #include <sysmem.h>
30 #include <video_rockchip.h>
31 #include <asm/io.h>
32 #include <asm/gpio.h>
33 #include <dm/uclass-internal.h>
34 #include <dm/root.h>
35 #include <power/charge_display.h>
36 #include <power/regulator.h>
37 #include <optee_include/OpteeClientInterface.h>
38 #include <optee_include/OpteeClientApiLib.h>
39 #include <optee_include/tee_api_defines.h>
40 #include <asm/arch/boot_mode.h>
41 #include <asm/arch/clock.h>
42 #include <asm/arch/cpu.h>
43 #include <asm/arch/hotkey.h>
44 #include <asm/arch/param.h>
45 #include <asm/arch/periph.h>
46 #include <asm/arch/resource_img.h>
47 #include <asm/arch/rk_atags.h>
48 #include <asm/arch/vendor.h>
49 
50 DECLARE_GLOBAL_DATA_PTR;
51 
52 __weak int rk_board_late_init(void)
53 {
54 	return 0;
55 }
56 
57 __weak int rk_board_fdt_fixup(void *blob)
58 {
59 	return 0;
60 }
61 
62 __weak int soc_clk_dump(void)
63 {
64 	return 0;
65 }
66 
67 __weak int set_armclk_rate(void)
68 {
69 	return 0;
70 }
71 
72 __weak int rk_board_init(void)
73 {
74 	return 0;
75 }
76 
77 /*
78  * define serialno max length, the max length is 512 Bytes
79  * The remaining bytes are used to ensure that the first 512 bytes
80  * are valid when executing 'env_set("serial#", value)'.
81  */
82 #define VENDOR_SN_MAX	513
83 #define CPUID_LEN	0x10
84 #define CPUID_OFF	0x07
85 
86 #define MAX_ETHERNET	0x2
87 
88 static int rockchip_set_ethaddr(void)
89 {
90 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
91 	char buf[ARP_HLEN_ASCII + 1], mac[16];
92 	u8 ethaddr[ARP_HLEN * MAX_ETHERNET] = {0};
93 	int ret, i;
94 	bool need_write = false;
95 
96 	ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr));
97 	for (i = 0; i < MAX_ETHERNET; i++) {
98 		if (ret <= 0 || !is_valid_ethaddr(&ethaddr[i * ARP_HLEN])) {
99 			net_random_ethaddr(&ethaddr[i * ARP_HLEN]);
100 			need_write = true;
101 		}
102 
103 		if (is_valid_ethaddr(&ethaddr[i * ARP_HLEN])) {
104 			sprintf(buf, "%pM", &ethaddr[i * ARP_HLEN]);
105 			if (i == 0)
106 				memcpy(mac, "ethaddr", sizeof("ethaddr"));
107 			else
108 				sprintf(mac, "eth%daddr", i);
109 			env_set(mac, buf);
110 		}
111 	}
112 
113 	if (need_write) {
114 		ret = vendor_storage_write(VENDOR_LAN_MAC_ID,
115 					   ethaddr, sizeof(ethaddr));
116 		if (ret < 0)
117 			printf("%s: vendor_storage_write failed %d\n",
118 			       __func__, ret);
119 	}
120 #endif
121 
122 	return 0;
123 }
124 
125 static int rockchip_set_serialno(void)
126 {
127 	u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2];
128 	u8 cpuid[CPUID_LEN] = {0};
129 	char serialno_str[VENDOR_SN_MAX];
130 	int ret = 0, i;
131 	u64 serialno;
132 
133 	/* Read serial number from vendor storage part */
134 	memset(serialno_str, 0, VENDOR_SN_MAX);
135 
136 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
137 	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
138 	if (ret > 0) {
139 		i = strlen(serialno_str);
140 		for (; i > 0; i--) {
141 			if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') ||
142 			    (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') ||
143 			    (serialno_str[i] >= '0' && serialno_str[i] <= '9'))
144 				break;
145 		}
146 
147 		serialno_str[i + 1] = 0x0;
148 		env_set("serial#", serialno_str);
149 	} else {
150 #endif
151 #if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP)
152 		struct udevice *dev;
153 
154 		/* retrieve the device */
155 		if (IS_ENABLED(CONFIG_ROCKCHIP_EFUSE))
156 			ret = uclass_get_device_by_driver(UCLASS_MISC,
157 							  DM_GET_DRIVER(rockchip_efuse),
158 							  &dev);
159 		else
160 			ret = uclass_get_device_by_driver(UCLASS_MISC,
161 							  DM_GET_DRIVER(rockchip_otp),
162 							  &dev);
163 
164 		if (ret) {
165 			printf("%s: could not find efuse/otp device\n", __func__);
166 			return ret;
167 		}
168 
169 		/* read the cpu_id range from the efuses */
170 		ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid));
171 		if (ret) {
172 			printf("%s: read cpuid from efuse/otp failed, ret=%d\n",
173 			       __func__, ret);
174 			return ret;
175 		}
176 #else
177 		/* generate random cpuid */
178 		for (i = 0; i < CPUID_LEN; i++)
179 			cpuid[i] = (u8)(rand());
180 #endif
181 		/* Generate the serial number based on CPU ID */
182 		for (i = 0; i < 8; i++) {
183 			low[i] = cpuid[1 + (i << 1)];
184 			high[i] = cpuid[i << 1];
185 		}
186 
187 		serialno = crc32_no_comp(0, low, 8);
188 		serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
189 		snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
190 
191 		env_set("serial#", serialno_str);
192 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
193 	}
194 #endif
195 
196 	return ret;
197 }
198 
199 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
200 int fb_set_reboot_flag(void)
201 {
202 	printf("Setting reboot to fastboot flag ...\n");
203 	writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);
204 
205 	return 0;
206 }
207 #endif
208 
209 #ifdef CONFIG_ROCKCHIP_USB_BOOT
210 static int boot_from_udisk(void)
211 {
212 	struct blk_desc *desc;
213 	char *devtype;
214 	char *devnum;
215 
216 	devtype = env_get("devtype");
217 	devnum = env_get("devnum");
218 
219 	/* Booting priority: mmc1 > udisk */
220 	if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1"))
221 		return 0;
222 
223 	if (!run_command("usb start", -1)) {
224 		desc = blk_get_devnum_by_type(IF_TYPE_USB, 0);
225 		if (!desc) {
226 			printf("No usb device found\n");
227 			return -ENODEV;
228 		}
229 
230 		if (!run_command("rkimgtest usb 0", -1)) {
231 			rockchip_set_bootdev(desc);
232 			env_set("devtype", "usb");
233 			env_set("devnum", "0");
234 			printf("Boot from usb 0\n");
235 		} else {
236 			printf("No usb dev 0 found\n");
237 			return -ENODEV;
238 		}
239 	}
240 
241 	return 0;
242 }
243 #endif
244 
245 static void env_fixup(void)
246 {
247 	struct memblock mem;
248 	ulong u_addr_r;
249 	phys_size_t end;
250 	char *addr_r;
251 
252 #ifdef ENV_MEM_LAYOUT_SETTINGS1
253 	const char *env_addr0[] = {
254 		"scriptaddr", "pxefile_addr_r",
255 		"fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r",
256 	};
257 	const char *env_addr1[] = {
258 		"scriptaddr1", "pxefile_addr1_r",
259 		"fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r",
260 	};
261 	int i;
262 
263 	/* 128M is a typical ram size for most platform, so as default here */
264 	if (gd->ram_size <= SZ_128M) {
265 		/* Replace orignal xxx_addr_r */
266 		for (i = 0; i < ARRAY_SIZE(env_addr1); i++) {
267 			addr_r = env_get(env_addr1[i]);
268 			if (addr_r)
269 				env_set(env_addr0[i], addr_r);
270 		}
271 	}
272 #endif
273 	/* If BL32 is disabled, move kernel to lower address. */
274 	if (!(gd->flags & GD_FLG_BL32_ENABLED)) {
275 		addr_r = env_get("kernel_addr_no_bl32_r");
276 		if (addr_r)
277 			env_set("kernel_addr_r", addr_r);
278 
279 		/*
280 		 * 0x0a200000 and 0x08400000 are rockchip traditional address
281 		 * of BL32 and ramdisk:
282 		 *
283 		 * |------------|------------|
284 		 * |    BL32    |  ramdisk   |
285 		 * |------------|------------|
286 		 *
287 		 * Move ramdisk to BL32 address to fix sysmem alloc failed
288 		 * issue on the board with critical memory(ie. 256MB).
289 		 */
290 		if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) {
291 			u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
292 			if (u_addr_r == 0x0a200000)
293 				env_set("ramdisk_addr_r", "0x08400000");
294 		}
295 
296 	/* If BL32 is enlarged, move ramdisk right behind it */
297 	} else {
298 		mem = param_parse_optee_mem();
299 		end = mem.base + mem.size;
300 		u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
301 		if (u_addr_r >= mem.base && u_addr_r < end)
302 			env_set_hex("ramdisk_addr_r", end);
303 	}
304 }
305 
306 static void cmdline_handle(void)
307 {
308 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
309 	struct tag *t;
310 
311 	t = atags_get_tag(ATAG_PUB_KEY);
312 	if (t) {
313 		/* Pass if efuse/otp programmed */
314 		if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED)
315 			env_update("bootargs", "fuse.programmed=1");
316 		else
317 			env_update("bootargs", "fuse.programmed=0");
318 	}
319 #endif
320 }
321 
322 int board_late_init(void)
323 {
324 	rockchip_set_ethaddr();
325 	rockchip_set_serialno();
326 	setup_download_mode();
327 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
328 	setup_boot_mode();
329 #endif
330 #ifdef CONFIG_ROCKCHIP_USB_BOOT
331 	boot_from_udisk();
332 #endif
333 #ifdef CONFIG_DM_CHARGE_DISPLAY
334 	charge_display();
335 #endif
336 #ifdef CONFIG_DRM_ROCKCHIP
337 	rockchip_show_logo();
338 #endif
339 	env_fixup();
340 	soc_clk_dump();
341 	cmdline_handle();
342 
343 	return rk_board_late_init();
344 }
345 
346 static void early_download(void)
347 {
348 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
349 		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
350 	if (pwrkey_download_init())
351 		printf("Pwrkey download init failed\n");
352 #endif
353 
354 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
355 	if (is_hotkey(HK_BROM_DNL)) {
356 		printf("Enter bootrom download...");
357 		flushc();
358 		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
359 		do_reset(NULL, 0, 0, NULL);
360 		printf("failed!\n");
361 	}
362 #endif
363 }
364 
365 static void board_debug_init(void)
366 {
367 	if (!gd->serial.using_pre_serial &&
368 	    !(gd->flags & GD_FLG_DISABLE_CONSOLE))
369 		debug_uart_init();
370 
371 	if (tstc()) {
372 		gd->console_evt = getc();
373 		if (gd->console_evt <= 0x1a) /* 'z' */
374 			printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1);
375 	}
376 
377 	if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI))
378 		printf("Cmd interface: disabled\n");
379 }
380 
381 #ifdef CONFIG_MTD_BLK
382 static void board_mtd_blk_map_partitions(void)
383 {
384 	struct blk_desc *dev_desc;
385 
386 	dev_desc = rockchip_get_bootdev();
387 	if (dev_desc)
388 		mtd_blk_map_partitions(dev_desc);
389 }
390 #endif
391 
392 int board_init(void)
393 {
394 	board_debug_init();
395 
396 #ifdef DEBUG
397 	soc_clk_dump();
398 #endif
399 
400 #ifdef CONFIG_USING_KERNEL_DTB
401 #ifdef CONFIG_MTD_BLK
402 	board_mtd_blk_map_partitions();
403 #endif
404 	init_kernel_dtb();
405 #endif
406 	early_download();
407 
408 	/*
409 	 * pmucru isn't referenced on some platforms, so pmucru driver can't
410 	 * probe that the "assigned-clocks" is unused.
411 	 */
412 	clks_probe();
413 #ifdef CONFIG_DM_REGULATOR
414 	if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR)))
415 		debug("%s: Can't enable boot on regulator\n", __func__);
416 #endif
417 
418 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN
419 	io_domain_init();
420 #endif
421 
422 	set_armclk_rate();
423 
424 #ifdef CONFIG_DM_DVFS
425 	dvfs_init(true);
426 #endif
427 
428 	return rk_board_init();
429 }
430 
431 int interrupt_debugger_init(void)
432 {
433 #ifdef CONFIG_ROCKCHIP_DEBUGGER
434 	return rockchip_debugger_init();
435 #else
436 	return 0;
437 #endif
438 }
439 
440 int board_fdt_fixup(void *blob)
441 {
442 	/* Common fixup for DRM */
443 #ifdef CONFIG_DRM_ROCKCHIP
444 	rockchip_display_fixup(blob);
445 #endif
446 
447 	return rk_board_fdt_fixup(blob);
448 }
449 
450 #if defined(CONFIG_ARM64_BOOT_AARCH32) || !defined(CONFIG_ARM64)
451 /*
452  * Common for OP-TEE:
453  *	64-bit & 32-bit mode: share memory dcache is always enabled;
454  *
455  * Common for U-Boot:
456  *	64-bit mode: MMU table is static defined in rkxxx.c file, all memory
457  *		     regions are mapped. That's good to match OP-TEE MMU policy.
458  *
459  *	32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where
460  *		     the OP-TEE region has been reserved, so it can not be
461  *		     mapped(i.e. dcache is disabled). That's *NOT* good to match
462  *		     OP-TEE MMU policy.
463  *
464  * For the data coherence when communication between U-Boot and OP-TEE, U-Boot
465  * should follow OP-TEE MMU policy.
466  *
467  * So 32-bit mode U-Boot should map OP-TEE share memory as dcache enabled.
468  */
469 int board_initr_caches_fixup(void)
470 {
471 #ifdef CONFIG_OPTEE_CLIENT
472 	struct memblock mem;
473 
474 	mem.base = 0;
475 	mem.size = 0;
476 
477 	optee_get_shm_config(&mem.base, &mem.size);
478 	if (mem.size)
479 		mmu_set_region_dcache_behaviour(mem.base, mem.size,
480 						DCACHE_WRITEBACK);
481 #endif
482 	return 0;
483 }
484 #endif
485 
486 void arch_preboot_os(uint32_t bootm_state)
487 {
488 	if (bootm_state & BOOTM_STATE_OS_PREP)
489 		hotkey_run(HK_CLI_OS_PRE);
490 }
491 
492 void enable_caches(void)
493 {
494 	icache_enable();
495 	dcache_enable();
496 }
497 
498 #ifdef CONFIG_LMB
499 /*
500  * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize".
501  * This makes lmb_alloc_base() always alloc from tail of sdram.
502  * If we don't assign it, bi_dram[0] is used by default and it may cause
503  * lmb_alloc_base() fail when bi_dram[0] range is small.
504  */
505 void board_lmb_reserve(struct lmb *lmb)
506 {
507 	char bootm_mapsize[32];
508 	char bootm_low[32];
509 	u64 start, size;
510 	int i;
511 
512 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
513 		if (!gd->bd->bi_dram[i].size)
514 			break;
515 	}
516 
517 	start = gd->bd->bi_dram[i - 1].start;
518 	size = gd->bd->bi_dram[i - 1].size;
519 
520 	/*
521 	 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+),
522 	 * otherwise "Unable to handle kernel paging request at virtual address ...".
523 	 *
524 	 * So that we hope limit highest address at 768M, but there comes the the
525 	 * problem: ramdisk is a compressed image and it expands after descompress,
526 	 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...".
527 	 *
528 	 * We make a appointment that the highest memory address is 512MB, it
529 	 * makes lmb alloc safer.
530 	 */
531 #ifndef CONFIG_ARM64
532 	if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) {
533 		start = gd->bd->bi_dram[i - 2].start;
534 		size = gd->bd->bi_dram[i - 2].size;
535 	}
536 
537 	if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M))
538 		size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start;
539 #endif
540 	sprintf(bootm_low, "0x%llx", start);
541 	sprintf(bootm_mapsize, "0x%llx", size);
542 	env_set("bootm_low", bootm_low);
543 	env_set("bootm_mapsize", bootm_mapsize);
544 }
545 #endif
546 
547 #ifdef CONFIG_BIDRAM
548 int board_bidram_reserve(struct bidram *bidram)
549 {
550 	struct memblock mem;
551 	int ret;
552 
553 	/* ATF */
554 	mem = param_parse_atf_mem();
555 	ret = bidram_reserve(MEM_ATF, mem.base, mem.size);
556 	if (ret)
557 		return ret;
558 
559 	/* PSTORE/ATAGS/SHM */
560 	mem = param_parse_common_resv_mem();
561 	ret = bidram_reserve(MEM_SHM, mem.base, mem.size);
562 	if (ret)
563 		return ret;
564 
565 	/* OP-TEE */
566 	mem = param_parse_optee_mem();
567 	ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size);
568 	if (ret)
569 		return ret;
570 
571 	return 0;
572 }
573 
574 parse_fn_t board_bidram_parse_fn(void)
575 {
576 	return param_parse_ddr_mem;
577 }
578 #endif
579 
580 #ifdef CONFIG_ROCKCHIP_AMP
581 void cpu_secondary_init_r(void)
582 {
583 	amp_cpus_on();
584 }
585 #endif
586 
587 int board_init_f_boot_flags(void)
588 {
589 	int boot_flags = 0;
590 
591 	/* pre-loader serial */
592 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
593     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
594 	struct tag *t;
595 
596 	t = atags_get_tag(ATAG_SERIAL);
597 	if (t) {
598 		gd->serial.using_pre_serial = 1;
599 		gd->serial.enable = t->u.serial.enable;
600 		gd->serial.baudrate = t->u.serial.baudrate;
601 		gd->serial.addr = t->u.serial.addr;
602 		gd->serial.id = t->u.serial.id;
603 		gd->baudrate = CONFIG_BAUDRATE;
604 		if (!t->u.serial.enable)
605 			boot_flags |= GD_FLG_DISABLE_CONSOLE;
606 		debug("preloader: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n",
607 		      gd->serial.enable, gd->serial.addr,
608 		      gd->serial.baudrate, gd->serial.id);
609 	} else
610 #endif
611 	{
612 		gd->baudrate = CONFIG_BAUDRATE;
613 		gd->serial.baudrate = CONFIG_BAUDRATE;
614 		gd->serial.addr = CONFIG_DEBUG_UART_BASE;
615 	}
616 
617 	/* The highest priority to turn off (override) console */
618 #if defined(CONFIG_DISABLE_CONSOLE)
619 	boot_flags |= GD_FLG_DISABLE_CONSOLE;
620 #endif
621 
622 	return boot_flags;
623 }
624 
625 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
626 #include <fdt_support.h>
627 #include <usb.h>
628 #include <usb/dwc2_udc.h>
629 
630 static struct dwc2_plat_otg_data otg_data = {
631 	.rx_fifo_sz	= 512,
632 	.np_tx_fifo_sz	= 16,
633 	.tx_fifo_sz	= 128,
634 };
635 
636 int board_usb_init(int index, enum usb_init_type init)
637 {
638 	const void *blob = gd->fdt_blob;
639 	const fdt32_t *reg;
640 	fdt_addr_t addr;
641 	int node;
642 
643 	/* find the usb_otg node */
644 	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
645 
646 retry:
647 	if (node > 0) {
648 		reg = fdt_getprop(blob, node, "reg", NULL);
649 		if (!reg)
650 			return -EINVAL;
651 
652 		addr = fdt_translate_address(blob, node, reg);
653 		if (addr == OF_BAD_ADDR) {
654 			pr_err("Not found usb_otg address\n");
655 			return -EINVAL;
656 		}
657 
658 #if defined(CONFIG_ROCKCHIP_RK3288)
659 		if (addr != 0xff580000) {
660 			node = fdt_node_offset_by_compatible(blob, node,
661 							     "snps,dwc2");
662 			goto retry;
663 		}
664 #endif
665 	} else {
666 		/*
667 		 * With kernel dtb support, rk3288 dwc2 otg node
668 		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
669 		 * with the compatible "rockchip,rk3288_usb20_otg",
670 		 * and rk3368 also use the "dwc_otg_310" driver with
671 		 * the compatible "rockchip,rk3368-usb".
672 		 */
673 #if defined(CONFIG_ROCKCHIP_RK3288)
674 		node = fdt_node_offset_by_compatible(blob, -1,
675 				"rockchip,rk3288_usb20_otg");
676 #elif defined(CONFIG_ROCKCHIP_RK3368)
677 		node = fdt_node_offset_by_compatible(blob, -1,
678 				"rockchip,rk3368-usb");
679 #endif
680 		if (node > 0) {
681 			goto retry;
682 		} else {
683 			pr_err("Not found usb_otg device\n");
684 			return -ENODEV;
685 		}
686 	}
687 
688 	otg_data.regs_otg = (uintptr_t)addr;
689 
690 	return dwc2_udc_probe(&otg_data);
691 }
692 
693 int board_usb_cleanup(int index, enum usb_init_type init)
694 {
695 	return 0;
696 }
697 #endif
698 
699 static void bootm_no_reloc(void)
700 {
701 	char *ramdisk_high;
702 	char *fdt_high;
703 
704 	if (!env_get_yesno("bootm-no-reloc"))
705 		return;
706 
707 	ramdisk_high = env_get("initrd_high");
708 	fdt_high = env_get("fdt_high");
709 
710 	if (!fdt_high) {
711 		env_set_hex("fdt_high", -1UL);
712 		printf("Fdt ");
713 	}
714 
715 	if (!ramdisk_high) {
716 		env_set_hex("initrd_high", -1UL);
717 		printf("Ramdisk ");
718 	}
719 
720 	if (!fdt_high || !ramdisk_high)
721 		printf("skip relocation\n");
722 }
723 
724 int bootm_board_start(void)
725 {
726 	/*
727 	 * print console record data
728 	 *
729 	 * On some rockchip platforms, uart debug and sdmmc pin are multiplex.
730 	 * If boot from sdmmc mode, the console data would be record in buffer,
731 	 * we switch to uart debug function in order to print it after loading
732 	 * images.
733 	 */
734 #if defined(CONFIG_CONSOLE_RECORD)
735 	if (!strcmp("mmc", env_get("devtype")) &&
736 	    !strcmp("1", env_get("devnum"))) {
737 		printf("IOMUX: sdmmc => uart debug");
738 		pinctrl_select_state(gd->cur_serial_dev, "default");
739 		console_record_print_purge();
740 	}
741 #endif
742 	/* disable bootm relcation to save boot time */
743 	bootm_no_reloc();
744 
745 	/* sysmem */
746 	hotkey_run(HK_SYSMEM);
747 	sysmem_overflow_check();
748 
749 	return 0;
750 }
751 
752 /*
753  * Implement it to support CLI command:
754  *   - Android: bootm [aosp addr]
755  *   - FIT:     bootm [fit addr]
756  *   - uImage:  bootm [uimage addr]
757  *
758  * Purpose:
759  *   - The original bootm command args require fdt addr on AOSP,
760  *     which is not flexible on rockchip boot/recovery.img.
761  *   - Take Android/FIT/uImage image into sysmem management to avoid image
762  *     memory overlap.
763  */
764 #if defined(CONFIG_ANDROID_BOOTLOADER) ||	\
765 	defined(CONFIG_ROCKCHIP_FIT_IMAGE) ||	\
766 	defined(CONFIG_ROCKCHIP_UIMAGE)
767 int board_do_bootm(int argc, char * const argv[])
768 {
769 	int format;
770 	void *img;
771 
772 	if (argc != 2)
773 		return 0;
774 
775 	img = (void *)simple_strtoul(argv[1], NULL, 16);
776 	format = (genimg_get_format(img));
777 
778 	/* Android */
779 #ifdef CONFIG_ANDROID_BOOT_IMAGE
780 	if (format == IMAGE_FORMAT_ANDROID) {
781 		struct andr_img_hdr *hdr;
782 		ulong load_addr;
783 		ulong size;
784 		int ret;
785 
786 		hdr = (struct andr_img_hdr *)img;
787 		printf("BOOTM: transferring to board Android\n");
788 
789 #ifdef CONFIG_USING_KERNEL_DTB
790 		sysmem_free((phys_addr_t)gd->fdt_blob);
791 		/* erase magic */
792 		fdt_set_magic((void *)gd->fdt_blob, ~0);
793 		gd->fdt_blob = NULL;
794 #endif
795 		load_addr = env_get_ulong("kernel_addr_r", 16, 0);
796 		load_addr -= hdr->page_size;
797 		size = android_image_get_end(hdr) - (ulong)hdr;
798 
799 		if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size))
800 			return -ENOMEM;
801 
802 		ret = android_image_memcpy_separate(hdr, &load_addr);
803 		if (ret) {
804 			printf("board do bootm failed, ret=%d\n", ret);
805 			return ret;
806 		}
807 
808 		return android_bootloader_boot_kernel(load_addr);
809 	}
810 #endif
811 
812 	/* FIT */
813 #if IMAGE_ENABLE_FIT
814 	if (format == IMAGE_FORMAT_FIT) {
815 		char boot_cmd[64];
816 
817 		printf("BOOTM: transferring to board FIT\n");
818 		snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]);
819 		return run_command(boot_cmd, 0);
820 	}
821 #endif
822 
823 	/* uImage */
824 #if defined(CONFIG_IMAGE_FORMAT_LEGACY)
825 	if (format == IMAGE_FORMAT_LEGACY &&
826 	    image_get_type(img) == IH_TYPE_MULTI) {
827 		char boot_cmd[64];
828 
829 		printf("BOOTM: transferring to board uImage\n");
830 		snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]);
831 		return run_command(boot_cmd, 0);
832 	}
833 #endif
834 
835 	return 0;
836 }
837 #endif
838 
839 void autoboot_command_fail_handle(void)
840 {
841 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
842 #ifdef CONFIG_ANDROID_AB
843 	run_command("fastboot usb 0;", 0);  /* use fastboot to ative slot */
844 #else
845 	run_command("rockusb 0 ${devtype} ${devnum}", 0);
846 	run_command("fastboot usb 0;", 0);
847 #endif
848 #endif
849 }
850 
851 #ifdef CONFIG_FIT_ROLLBACK_PROTECT
852 
853 #define FIT_ROLLBACK_INDEX_LOCATION	0x66697472	/* "fitr" */
854 
855 int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
856 {
857 #ifdef CONFIG_OPTEE_CLIENT
858 	u64 index;
859 	int ret;
860 
861 	ret = trusty_read_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, &index);
862 	if (ret) {
863 		if (ret != TEE_ERROR_ITEM_NOT_FOUND)
864 			return ret;
865 
866 		*otp_index = fit_index;
867 		printf("Initial otp index as %d\n", fit_index);
868 	}
869 
870 	*otp_index = index;
871 #else
872 	*otp_index = 0;
873 #endif
874 
875 	return 0;
876 }
877 
878 static int fit_write_trusty_rollback_index(u32 trusty_index)
879 {
880 	if (!trusty_index)
881 		return 0;
882 
883 	return trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION,
884 					   (u64)trusty_index);
885 }
886 #endif
887 
888 void board_quiesce_devices(void *images)
889 {
890 	hotkey_run(HK_CMDLINE);
891 	hotkey_run(HK_CLI_OS_GO);
892 
893 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
894 	/* Destroy atags makes next warm boot safer */
895 	atags_destroy();
896 #endif
897 
898 #ifdef CONFIG_FIT_ROLLBACK_PROTECT
899 	int ret;
900 
901 	ret = fit_write_trusty_rollback_index(gd->rollback_index);
902 	if (ret) {
903 		panic("Failed to write fit rollback index %d, ret=%d",
904 		      gd->rollback_index, ret);
905 	}
906 #endif
907 
908 #ifdef CONFIG_ROCKCHIP_HW_DECOMPRESS
909 	misc_decompress_cleanup();
910 #endif
911 }
912