xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/board.c (revision e66d4537dbd86d2c766c7745e41d41fd88ae2b83) 
1 /*
2  * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <amp.h>
9 #include <android_bootloader.h>
10 #include <android_image.h>
11 #include <bidram.h>
12 #include <boot_rkimg.h>
13 #include <cli.h>
14 #include <clk.h>
15 #include <console.h>
16 #include <debug_uart.h>
17 #include <dm.h>
18 #include <dvfs.h>
19 #include <io-domain.h>
20 #include <image.h>
21 #include <key.h>
22 #include <memblk.h>
23 #include <misc.h>
24 #include <of_live.h>
25 #include <mtd_blk.h>
26 #include <ram.h>
27 #include <rockchip_debugger.h>
28 #include <syscon.h>
29 #include <sysmem.h>
30 #include <video_rockchip.h>
31 #include <asm/io.h>
32 #include <asm/gpio.h>
33 #include <dm/uclass-internal.h>
34 #include <dm/root.h>
35 #include <power/charge_display.h>
36 #include <power/regulator.h>
37 #include <optee_include/OpteeClientInterface.h>
38 #include <optee_include/OpteeClientApiLib.h>
39 #include <optee_include/tee_api_defines.h>
40 #include <asm/arch/boot_mode.h>
41 #include <asm/arch/clock.h>
42 #include <asm/arch/cpu.h>
43 #include <asm/arch/hotkey.h>
44 #include <asm/arch/param.h>
45 #include <asm/arch/periph.h>
46 #include <asm/arch/resource_img.h>
47 #include <asm/arch/rk_atags.h>
48 #include <asm/arch/vendor.h>
49 
50 DECLARE_GLOBAL_DATA_PTR;
51 
52 __weak int rk_board_late_init(void)
53 {
54 	return 0;
55 }
56 
57 __weak int rk_board_fdt_fixup(void *blob)
58 {
59 	return 0;
60 }
61 
62 __weak int soc_clk_dump(void)
63 {
64 	return 0;
65 }
66 
67 __weak int set_armclk_rate(void)
68 {
69 	return 0;
70 }
71 
72 __weak int rk_board_init(void)
73 {
74 	return 0;
75 }
76 
77 /*
78  * define serialno max length, the max length is 512 Bytes
79  * The remaining bytes are used to ensure that the first 512 bytes
80  * are valid when executing 'env_set("serial#", value)'.
81  */
82 #define VENDOR_SN_MAX	513
83 #define CPUID_LEN	0x10
84 #define CPUID_OFF	0x07
85 
86 static int rockchip_set_ethaddr(void)
87 {
88 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
89 	char buf[ARP_HLEN_ASCII + 1];
90 	u8 ethaddr[ARP_HLEN];
91 	int ret;
92 
93 	ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr));
94 	if (ret > 0 && is_valid_ethaddr(ethaddr)) {
95 		sprintf(buf, "%pM", ethaddr);
96 		env_set("ethaddr", buf);
97 	}
98 #endif
99 	return 0;
100 }
101 
102 static int rockchip_set_serialno(void)
103 {
104 	u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2];
105 	u8 cpuid[CPUID_LEN] = {0};
106 	char serialno_str[VENDOR_SN_MAX];
107 	int ret = 0, i;
108 	u64 serialno;
109 
110 	/* Read serial number from vendor storage part */
111 	memset(serialno_str, 0, VENDOR_SN_MAX);
112 
113 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
114 	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
115 	if (ret > 0) {
116 		i = strlen(serialno_str);
117 		for (; i > 0; i--) {
118 			if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') ||
119 			    (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') ||
120 			    (serialno_str[i] >= '0' && serialno_str[i] <= '9'))
121 				break;
122 		}
123 
124 		serialno_str[i + 1] = 0x0;
125 		env_set("serial#", serialno_str);
126 	} else {
127 #endif
128 #if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP)
129 		struct udevice *dev;
130 
131 		/* retrieve the device */
132 		if (IS_ENABLED(CONFIG_ROCKCHIP_EFUSE))
133 			ret = uclass_get_device_by_driver(UCLASS_MISC,
134 							  DM_GET_DRIVER(rockchip_efuse),
135 							  &dev);
136 		else
137 			ret = uclass_get_device_by_driver(UCLASS_MISC,
138 							  DM_GET_DRIVER(rockchip_otp),
139 							  &dev);
140 
141 		if (ret) {
142 			printf("%s: could not find efuse/otp device\n", __func__);
143 			return ret;
144 		}
145 
146 		/* read the cpu_id range from the efuses */
147 		ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid));
148 		if (ret) {
149 			printf("%s: read cpuid from efuse/otp failed, ret=%d\n",
150 			       __func__, ret);
151 			return ret;
152 		}
153 #else
154 		/* generate random cpuid */
155 		for (i = 0; i < CPUID_LEN; i++)
156 			cpuid[i] = (u8)(rand());
157 #endif
158 		/* Generate the serial number based on CPU ID */
159 		for (i = 0; i < 8; i++) {
160 			low[i] = cpuid[1 + (i << 1)];
161 			high[i] = cpuid[i << 1];
162 		}
163 
164 		serialno = crc32_no_comp(0, low, 8);
165 		serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
166 		snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
167 
168 		env_set("serial#", serialno_str);
169 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
170 	}
171 #endif
172 
173 	return ret;
174 }
175 
176 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
177 int fb_set_reboot_flag(void)
178 {
179 	printf("Setting reboot to fastboot flag ...\n");
180 	writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);
181 
182 	return 0;
183 }
184 #endif
185 
186 #ifdef CONFIG_ROCKCHIP_USB_BOOT
187 static int boot_from_udisk(void)
188 {
189 	struct blk_desc *desc;
190 	char *devtype;
191 	char *devnum;
192 
193 	devtype = env_get("devtype");
194 	devnum = env_get("devnum");
195 
196 	/* Booting priority: mmc1 > udisk */
197 	if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1"))
198 		return 0;
199 
200 	if (!run_command("usb start", -1)) {
201 		desc = blk_get_devnum_by_type(IF_TYPE_USB, 0);
202 		if (!desc) {
203 			printf("No usb device found\n");
204 			return -ENODEV;
205 		}
206 
207 		if (!run_command("rkimgtest usb 0", -1)) {
208 			rockchip_set_bootdev(desc);
209 			env_set("devtype", "usb");
210 			env_set("devnum", "0");
211 			printf("Boot from usb 0\n");
212 		} else {
213 			printf("No usb dev 0 found\n");
214 			return -ENODEV;
215 		}
216 	}
217 
218 	return 0;
219 }
220 #endif
221 
222 static void env_fixup(void)
223 {
224 	struct memblock mem;
225 	ulong u_addr_r;
226 	phys_size_t end;
227 	char *addr_r;
228 
229 #ifdef ENV_MEM_LAYOUT_SETTINGS1
230 	const char *env_addr0[] = {
231 		"scriptaddr", "pxefile_addr_r",
232 		"fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r",
233 	};
234 	const char *env_addr1[] = {
235 		"scriptaddr1", "pxefile_addr1_r",
236 		"fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r",
237 	};
238 	int i;
239 
240 	/* 128M is a typical ram size for most platform, so as default here */
241 	if (gd->ram_size <= SZ_128M) {
242 		/* Replace orignal xxx_addr_r */
243 		for (i = 0; i < ARRAY_SIZE(env_addr1); i++) {
244 			addr_r = env_get(env_addr1[i]);
245 			if (addr_r)
246 				env_set(env_addr0[i], addr_r);
247 		}
248 	}
249 #endif
250 	/* If BL32 is disabled, move kernel to lower address. */
251 	if (!(gd->flags & GD_FLG_BL32_ENABLED)) {
252 		addr_r = env_get("kernel_addr_no_bl32_r");
253 		if (addr_r)
254 			env_set("kernel_addr_r", addr_r);
255 
256 		/*
257 		 * 0x0a200000 and 0x08400000 are rockchip traditional address
258 		 * of BL32 and ramdisk:
259 		 *
260 		 * |------------|------------|
261 		 * |    BL32    |  ramdisk   |
262 		 * |------------|------------|
263 		 *
264 		 * Move ramdisk to BL32 address to fix sysmem alloc failed
265 		 * issue on the board with critical memory(ie. 256MB).
266 		 */
267 		if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) {
268 			u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
269 			if (u_addr_r == 0x0a200000)
270 				env_set("ramdisk_addr_r", "0x08400000");
271 		}
272 
273 	/* If BL32 is enlarged, move ramdisk right behind it */
274 	} else {
275 		mem = param_parse_optee_mem();
276 		end = mem.base + mem.size;
277 		u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
278 		if (u_addr_r >= mem.base && u_addr_r < end)
279 			env_set_hex("ramdisk_addr_r", end);
280 	}
281 }
282 
283 static void cmdline_handle(void)
284 {
285 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
286 	struct tag *t;
287 
288 	t = atags_get_tag(ATAG_PUB_KEY);
289 	if (t) {
290 		/* Pass if efuse/otp programmed */
291 		if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED)
292 			env_update("bootargs", "fuse.programmed=1");
293 		else
294 			env_update("bootargs", "fuse.programmed=0");
295 	}
296 #endif
297 }
298 
299 int board_late_init(void)
300 {
301 	rockchip_set_ethaddr();
302 	rockchip_set_serialno();
303 	setup_download_mode();
304 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
305 	setup_boot_mode();
306 #endif
307 #ifdef CONFIG_ROCKCHIP_USB_BOOT
308 	boot_from_udisk();
309 #endif
310 #ifdef CONFIG_DM_CHARGE_DISPLAY
311 	charge_display();
312 #endif
313 #ifdef CONFIG_DRM_ROCKCHIP
314 	rockchip_show_logo();
315 #endif
316 	env_fixup();
317 	soc_clk_dump();
318 	cmdline_handle();
319 
320 	return rk_board_late_init();
321 }
322 
323 static void early_download(void)
324 {
325 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
326 		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
327 	if (pwrkey_download_init())
328 		printf("Pwrkey download init failed\n");
329 #endif
330 
331 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
332 	if (is_hotkey(HK_BROM_DNL)) {
333 		printf("Enter bootrom download...");
334 		flushc();
335 		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
336 		do_reset(NULL, 0, 0, NULL);
337 		printf("failed!\n");
338 	}
339 #endif
340 }
341 
342 static void board_debug_init(void)
343 {
344 	if (!gd->serial.using_pre_serial &&
345 	    !(gd->flags & GD_FLG_DISABLE_CONSOLE))
346 		debug_uart_init();
347 
348 	if (tstc()) {
349 		gd->console_evt = getc();
350 		if (gd->console_evt <= 0x1a) /* 'z' */
351 			printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1);
352 	}
353 
354 	if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI))
355 		printf("Cmd interface: disabled\n");
356 }
357 
358 #ifdef CONFIG_MTD_BLK
359 static void board_mtd_blk_map_partitions(void)
360 {
361 	struct blk_desc *dev_desc;
362 
363 	dev_desc = rockchip_get_bootdev();
364 	if (dev_desc)
365 		mtd_blk_map_partitions(dev_desc);
366 }
367 #endif
368 
369 int board_init(void)
370 {
371 	board_debug_init();
372 
373 #ifdef DEBUG
374 	soc_clk_dump();
375 #endif
376 
377 #ifdef CONFIG_USING_KERNEL_DTB
378 #ifdef CONFIG_MTD_BLK
379 	board_mtd_blk_map_partitions();
380 #endif
381 	init_kernel_dtb();
382 #endif
383 	early_download();
384 
385 	/*
386 	 * pmucru isn't referenced on some platforms, so pmucru driver can't
387 	 * probe that the "assigned-clocks" is unused.
388 	 */
389 	clks_probe();
390 #ifdef CONFIG_DM_REGULATOR
391 	if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR)))
392 		debug("%s: Can't enable boot on regulator\n", __func__);
393 #endif
394 
395 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN
396 	io_domain_init();
397 #endif
398 
399 	set_armclk_rate();
400 
401 #ifdef CONFIG_DM_DVFS
402 	dvfs_init(true);
403 #endif
404 
405 	return rk_board_init();
406 }
407 
408 int interrupt_debugger_init(void)
409 {
410 #ifdef CONFIG_ROCKCHIP_DEBUGGER
411 	return rockchip_debugger_init();
412 #else
413 	return 0;
414 #endif
415 }
416 
417 int board_fdt_fixup(void *blob)
418 {
419 	/* Common fixup for DRM */
420 #ifdef CONFIG_DRM_ROCKCHIP
421 	rockchip_display_fixup(blob);
422 #endif
423 
424 	return rk_board_fdt_fixup(blob);
425 }
426 
427 #if defined(CONFIG_ARM64_BOOT_AARCH32) || !defined(CONFIG_ARM64)
428 /*
429  * Common for OP-TEE:
430  *	64-bit & 32-bit mode: share memory dcache is always enabled;
431  *
432  * Common for U-Boot:
433  *	64-bit mode: MMU table is static defined in rkxxx.c file, all memory
434  *		     regions are mapped. That's good to match OP-TEE MMU policy.
435  *
436  *	32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where
437  *		     the OP-TEE region has been reserved, so it can not be
438  *		     mapped(i.e. dcache is disabled). That's *NOT* good to match
439  *		     OP-TEE MMU policy.
440  *
441  * For the data coherence when communication between U-Boot and OP-TEE, U-Boot
442  * should follow OP-TEE MMU policy.
443  *
444  * So 32-bit mode U-Boot should map OP-TEE share memory as dcache enabled.
445  */
446 int board_initr_caches_fixup(void)
447 {
448 #ifdef CONFIG_OPTEE_CLIENT
449 	struct memblock mem;
450 
451 	mem.base = 0;
452 	mem.size = 0;
453 
454 	optee_get_shm_config(&mem.base, &mem.size);
455 	if (mem.size)
456 		mmu_set_region_dcache_behaviour(mem.base, mem.size,
457 						DCACHE_WRITEBACK);
458 #endif
459 	return 0;
460 }
461 #endif
462 
463 void arch_preboot_os(uint32_t bootm_state)
464 {
465 	if (bootm_state & BOOTM_STATE_OS_PREP)
466 		hotkey_run(HK_CLI_OS_PRE);
467 }
468 
469 void enable_caches(void)
470 {
471 	icache_enable();
472 	dcache_enable();
473 }
474 
475 #ifdef CONFIG_LMB
476 /*
477  * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize".
478  * This makes lmb_alloc_base() always alloc from tail of sdram.
479  * If we don't assign it, bi_dram[0] is used by default and it may cause
480  * lmb_alloc_base() fail when bi_dram[0] range is small.
481  */
482 void board_lmb_reserve(struct lmb *lmb)
483 {
484 	char bootm_mapsize[32];
485 	char bootm_low[32];
486 	u64 start, size;
487 	int i;
488 
489 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
490 		if (!gd->bd->bi_dram[i].size)
491 			break;
492 	}
493 
494 	start = gd->bd->bi_dram[i - 1].start;
495 	size = gd->bd->bi_dram[i - 1].size;
496 
497 	/*
498 	 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+),
499 	 * otherwise "Unable to handle kernel paging request at virtual address ...".
500 	 *
501 	 * So that we hope limit highest address at 768M, but there comes the the
502 	 * problem: ramdisk is a compressed image and it expands after descompress,
503 	 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...".
504 	 *
505 	 * We make a appointment that the highest memory address is 512MB, it
506 	 * makes lmb alloc safer.
507 	 */
508 #ifndef CONFIG_ARM64
509 	if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) {
510 		start = gd->bd->bi_dram[i - 2].start;
511 		size = gd->bd->bi_dram[i - 2].size;
512 	}
513 
514 	if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M))
515 		size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start;
516 #endif
517 	sprintf(bootm_low, "0x%llx", start);
518 	sprintf(bootm_mapsize, "0x%llx", size);
519 	env_set("bootm_low", bootm_low);
520 	env_set("bootm_mapsize", bootm_mapsize);
521 }
522 #endif
523 
524 #ifdef CONFIG_BIDRAM
525 int board_bidram_reserve(struct bidram *bidram)
526 {
527 	struct memblock mem;
528 	int ret;
529 
530 	/* ATF */
531 	mem = param_parse_atf_mem();
532 	ret = bidram_reserve(MEM_ATF, mem.base, mem.size);
533 	if (ret)
534 		return ret;
535 
536 	/* PSTORE/ATAGS/SHM */
537 	mem = param_parse_common_resv_mem();
538 	ret = bidram_reserve(MEM_SHM, mem.base, mem.size);
539 	if (ret)
540 		return ret;
541 
542 	/* OP-TEE */
543 	mem = param_parse_optee_mem();
544 	ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size);
545 	if (ret)
546 		return ret;
547 
548 	return 0;
549 }
550 
551 parse_fn_t board_bidram_parse_fn(void)
552 {
553 	return param_parse_ddr_mem;
554 }
555 #endif
556 
557 #ifdef CONFIG_ROCKCHIP_AMP
558 void cpu_secondary_init_r(void)
559 {
560 	amp_cpus_on();
561 }
562 #endif
563 
564 int board_init_f_boot_flags(void)
565 {
566 	int boot_flags = 0;
567 
568 	/* pre-loader serial */
569 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
570     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
571 	struct tag *t;
572 
573 	t = atags_get_tag(ATAG_SERIAL);
574 	if (t) {
575 		gd->serial.using_pre_serial = 1;
576 		gd->serial.enable = t->u.serial.enable;
577 		gd->serial.baudrate = t->u.serial.baudrate;
578 		gd->serial.addr = t->u.serial.addr;
579 		gd->serial.id = t->u.serial.id;
580 		gd->baudrate = CONFIG_BAUDRATE;
581 		if (!t->u.serial.enable)
582 			boot_flags |= GD_FLG_DISABLE_CONSOLE;
583 		debug("preloader: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n",
584 		      gd->serial.enable, gd->serial.addr,
585 		      gd->serial.baudrate, gd->serial.id);
586 	} else
587 #endif
588 	{
589 		gd->baudrate = CONFIG_BAUDRATE;
590 		gd->serial.baudrate = CONFIG_BAUDRATE;
591 		gd->serial.addr = CONFIG_DEBUG_UART_BASE;
592 	}
593 
594 	/* The highest priority to turn off (override) console */
595 #if defined(CONFIG_DISABLE_CONSOLE)
596 	boot_flags |= GD_FLG_DISABLE_CONSOLE;
597 #endif
598 
599 	return boot_flags;
600 }
601 
602 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
603 #include <fdt_support.h>
604 #include <usb.h>
605 #include <usb/dwc2_udc.h>
606 
607 static struct dwc2_plat_otg_data otg_data = {
608 	.rx_fifo_sz	= 512,
609 	.np_tx_fifo_sz	= 16,
610 	.tx_fifo_sz	= 128,
611 };
612 
613 int board_usb_init(int index, enum usb_init_type init)
614 {
615 	const void *blob = gd->fdt_blob;
616 	const fdt32_t *reg;
617 	fdt_addr_t addr;
618 	int node;
619 
620 	/* find the usb_otg node */
621 	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
622 
623 retry:
624 	if (node > 0) {
625 		reg = fdt_getprop(blob, node, "reg", NULL);
626 		if (!reg)
627 			return -EINVAL;
628 
629 		addr = fdt_translate_address(blob, node, reg);
630 		if (addr == OF_BAD_ADDR) {
631 			pr_err("Not found usb_otg address\n");
632 			return -EINVAL;
633 		}
634 
635 #if defined(CONFIG_ROCKCHIP_RK3288)
636 		if (addr != 0xff580000) {
637 			node = fdt_node_offset_by_compatible(blob, node,
638 							     "snps,dwc2");
639 			goto retry;
640 		}
641 #endif
642 	} else {
643 		/*
644 		 * With kernel dtb support, rk3288 dwc2 otg node
645 		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
646 		 * with the compatible "rockchip,rk3288_usb20_otg",
647 		 * and rk3368 also use the "dwc_otg_310" driver with
648 		 * the compatible "rockchip,rk3368-usb".
649 		 */
650 #if defined(CONFIG_ROCKCHIP_RK3288)
651 		node = fdt_node_offset_by_compatible(blob, -1,
652 				"rockchip,rk3288_usb20_otg");
653 #elif defined(CONFIG_ROCKCHIP_RK3368)
654 		node = fdt_node_offset_by_compatible(blob, -1,
655 				"rockchip,rk3368-usb");
656 #endif
657 		if (node > 0) {
658 			goto retry;
659 		} else {
660 			pr_err("Not found usb_otg device\n");
661 			return -ENODEV;
662 		}
663 	}
664 
665 	otg_data.regs_otg = (uintptr_t)addr;
666 
667 	return dwc2_udc_probe(&otg_data);
668 }
669 
670 int board_usb_cleanup(int index, enum usb_init_type init)
671 {
672 	return 0;
673 }
674 #endif
675 
676 static void bootm_no_reloc(void)
677 {
678 	char *ramdisk_high;
679 	char *fdt_high;
680 
681 	if (!env_get_yesno("bootm-no-reloc"))
682 		return;
683 
684 	ramdisk_high = env_get("initrd_high");
685 	fdt_high = env_get("fdt_high");
686 
687 	if (!fdt_high) {
688 		env_set_hex("fdt_high", -1UL);
689 		printf("Fdt ");
690 	}
691 
692 	if (!ramdisk_high) {
693 		env_set_hex("initrd_high", -1UL);
694 		printf("Ramdisk ");
695 	}
696 
697 	if (!fdt_high || !ramdisk_high)
698 		printf("skip relocation\n");
699 }
700 
701 int bootm_board_start(void)
702 {
703 	/*
704 	 * print console record data
705 	 *
706 	 * On some rockchip platforms, uart debug and sdmmc pin are multiplex.
707 	 * If boot from sdmmc mode, the console data would be record in buffer,
708 	 * we switch to uart debug function in order to print it after loading
709 	 * images.
710 	 */
711 #if defined(CONFIG_CONSOLE_RECORD)
712 	if (!strcmp("mmc", env_get("devtype")) &&
713 	    !strcmp("1", env_get("devnum"))) {
714 		printf("IOMUX: sdmmc => uart debug");
715 		pinctrl_select_state(gd->cur_serial_dev, "default");
716 		console_record_print_purge();
717 	}
718 #endif
719 	/* disable bootm relcation to save boot time */
720 	bootm_no_reloc();
721 
722 	/* sysmem */
723 	hotkey_run(HK_SYSMEM);
724 	sysmem_overflow_check();
725 
726 	return 0;
727 }
728 
729 /*
730  * Implement it to support CLI command:
731  *   - Android: bootm [aosp addr]
732  *   - FIT:     bootm [fit addr]
733  *   - uImage:  bootm [uimage addr]
734  *
735  * Purpose:
736  *   - The original bootm command args require fdt addr on AOSP,
737  *     which is not flexible on rockchip boot/recovery.img.
738  *   - Take Android/FIT/uImage image into sysmem management to avoid image
739  *     memory overlap.
740  */
741 #if defined(CONFIG_ANDROID_BOOTLOADER) ||	\
742 	defined(CONFIG_ROCKCHIP_FIT_IMAGE) ||	\
743 	defined(CONFIG_ROCKCHIP_UIMAGE)
744 int board_do_bootm(int argc, char * const argv[])
745 {
746 	int format;
747 	void *img;
748 
749 	if (argc != 2)
750 		return 0;
751 
752 	img = (void *)simple_strtoul(argv[1], NULL, 16);
753 	format = (genimg_get_format(img));
754 
755 	/* Android */
756 #ifdef CONFIG_ANDROID_BOOT_IMAGE
757 	if (format == IMAGE_FORMAT_ANDROID) {
758 		struct andr_img_hdr *hdr;
759 		ulong load_addr;
760 		ulong size;
761 		int ret;
762 
763 		hdr = (struct andr_img_hdr *)img;
764 		printf("BOOTM: transferring to board Android\n");
765 
766 #ifdef CONFIG_USING_KERNEL_DTB
767 		sysmem_free((phys_addr_t)gd->fdt_blob);
768 		/* erase magic */
769 		fdt_set_magic((void *)gd->fdt_blob, ~0);
770 		gd->fdt_blob = NULL;
771 #endif
772 		load_addr = env_get_ulong("kernel_addr_r", 16, 0);
773 		load_addr -= hdr->page_size;
774 		size = android_image_get_end(hdr) - (ulong)hdr;
775 
776 		if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size))
777 			return -ENOMEM;
778 
779 		ret = android_image_memcpy_separate(hdr, &load_addr);
780 		if (ret) {
781 			printf("board do bootm failed, ret=%d\n", ret);
782 			return ret;
783 		}
784 
785 		return android_bootloader_boot_kernel(load_addr);
786 	}
787 #endif
788 
789 	/* FIT */
790 #if IMAGE_ENABLE_FIT
791 	if (format == IMAGE_FORMAT_FIT) {
792 		char boot_cmd[64];
793 
794 		printf("BOOTM: transferring to board FIT\n");
795 		snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]);
796 		return run_command(boot_cmd, 0);
797 	}
798 #endif
799 
800 	/* uImage */
801 #if defined(CONFIG_IMAGE_FORMAT_LEGACY)
802 	if (format == IMAGE_FORMAT_LEGACY &&
803 	    image_get_type(img) == IH_TYPE_MULTI) {
804 		char boot_cmd[64];
805 
806 		printf("BOOTM: transferring to board uImage\n");
807 		snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]);
808 		return run_command(boot_cmd, 0);
809 	}
810 #endif
811 
812 	return 0;
813 }
814 #endif
815 
816 void autoboot_command_fail_handle(void)
817 {
818 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
819 #ifdef CONFIG_ANDROID_AB
820 	run_command("fastboot usb 0;", 0);  /* use fastboot to ative slot */
821 #else
822 	run_command("rockusb 0 ${devtype} ${devnum}", 0);
823 	run_command("fastboot usb 0;", 0);
824 #endif
825 #endif
826 }
827 
828 #ifdef CONFIG_FIT_ROLLBACK_PROTECT
829 
830 #define FIT_ROLLBACK_INDEX_LOCATION	0x66697472	/* "fitr" */
831 
832 int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
833 {
834 #ifdef CONFIG_OPTEE_CLIENT
835 	u64 index;
836 	int ret;
837 
838 	ret = trusty_read_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, &index);
839 	if (ret) {
840 		if (ret != TEE_ERROR_ITEM_NOT_FOUND)
841 			return ret;
842 
843 		*otp_index = fit_index;
844 		printf("Initial otp index as %d\n", fit_index);
845 	}
846 
847 	*otp_index = index;
848 #else
849 	*otp_index = 0;
850 #endif
851 
852 	return 0;
853 }
854 
855 static int fit_write_trusty_rollback_index(u32 trusty_index)
856 {
857 	if (!trusty_index)
858 		return 0;
859 
860 	return trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION,
861 					   (u64)trusty_index);
862 }
863 #endif
864 
865 void board_quiesce_devices(void *images)
866 {
867 	hotkey_run(HK_CMDLINE);
868 	hotkey_run(HK_CLI_OS_GO);
869 
870 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
871 	/* Destroy atags makes next warm boot safer */
872 	atags_destroy();
873 #endif
874 
875 #ifdef CONFIG_FIT_ROLLBACK_PROTECT
876 	int ret;
877 
878 	ret = fit_write_trusty_rollback_index(gd->rollback_index);
879 	if (ret) {
880 		panic("Failed to write fit rollback index %d, ret=%d",
881 		      gd->rollback_index, ret);
882 	}
883 #endif
884 
885 #ifdef CONFIG_ROCKCHIP_HW_DECOMPRESS
886 	misc_decompress_cleanup();
887 #endif
888 }
889