1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <amp.h> 9 #include <android_bootloader.h> 10 #include <android_image.h> 11 #include <bidram.h> 12 #include <boot_rkimg.h> 13 #include <cli.h> 14 #include <clk.h> 15 #include <console.h> 16 #include <debug_uart.h> 17 #include <dm.h> 18 #include <dvfs.h> 19 #include <io-domain.h> 20 #include <key.h> 21 #include <memblk.h> 22 #include <misc.h> 23 #include <of_live.h> 24 #include <ram.h> 25 #include <rockchip_debugger.h> 26 #include <syscon.h> 27 #include <sysmem.h> 28 #include <video_rockchip.h> 29 #include <asm/io.h> 30 #include <asm/gpio.h> 31 #include <dm/uclass-internal.h> 32 #include <dm/root.h> 33 #include <power/charge_display.h> 34 #include <power/regulator.h> 35 #include <asm/arch/boot_mode.h> 36 #include <asm/arch/clock.h> 37 #include <asm/arch/cpu.h> 38 #include <asm/arch/hotkey.h> 39 #include <asm/arch/param.h> 40 #include <asm/arch/periph.h> 41 #include <asm/arch/resource_img.h> 42 #include <asm/arch/rk_atags.h> 43 #include <asm/arch/vendor.h> 44 45 DECLARE_GLOBAL_DATA_PTR; 46 47 __weak int rk_board_late_init(void) 48 { 49 return 0; 50 } 51 52 __weak int rk_board_fdt_fixup(void *blob) 53 { 54 return 0; 55 } 56 57 __weak int soc_clk_dump(void) 58 { 59 return 0; 60 } 61 62 __weak int set_armclk_rate(void) 63 { 64 return 0; 65 } 66 67 __weak int rk_board_init(void) 68 { 69 return 0; 70 } 71 72 /* 73 * define serialno max length, the max length is 512 Bytes 74 * The remaining bytes are used to ensure that the first 512 bytes 75 * are valid when executing 'env_set("serial#", value)'. 76 */ 77 #define VENDOR_SN_MAX 513 78 #define CPUID_LEN 0x10 79 #define CPUID_OFF 0x07 80 81 static int rockchip_set_ethaddr(void) 82 { 83 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 84 char buf[ARP_HLEN_ASCII + 1]; 85 u8 ethaddr[ARP_HLEN]; 86 int ret; 87 88 ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr)); 89 if (ret > 0 && is_valid_ethaddr(ethaddr)) { 90 sprintf(buf, "%pM", ethaddr); 91 env_set("ethaddr", buf); 92 } 93 #endif 94 return 0; 95 } 96 97 static int rockchip_set_serialno(void) 98 { 99 u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; 100 u8 cpuid[CPUID_LEN] = {0}; 101 char serialno_str[VENDOR_SN_MAX]; 102 int ret = 0, i; 103 u64 serialno; 104 105 /* Read serial number from vendor storage part */ 106 memset(serialno_str, 0, VENDOR_SN_MAX); 107 108 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 109 ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1)); 110 if (ret > 0) { 111 env_set("serial#", serialno_str); 112 } else { 113 #endif 114 #ifdef CONFIG_ROCKCHIP_EFUSE 115 struct udevice *dev; 116 117 /* retrieve the device */ 118 ret = uclass_get_device_by_driver(UCLASS_MISC, 119 DM_GET_DRIVER(rockchip_efuse), 120 &dev); 121 if (ret) { 122 printf("%s: could not find efuse device\n", __func__); 123 return ret; 124 } 125 126 /* read the cpu_id range from the efuses */ 127 ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid)); 128 if (ret) { 129 printf("%s: read cpuid from efuses failed, ret=%d\n", 130 __func__, ret); 131 return ret; 132 } 133 #else 134 /* generate random cpuid */ 135 for (i = 0; i < CPUID_LEN; i++) 136 cpuid[i] = (u8)(rand()); 137 #endif 138 /* Generate the serial number based on CPU ID */ 139 for (i = 0; i < 8; i++) { 140 low[i] = cpuid[1 + (i << 1)]; 141 high[i] = cpuid[i << 1]; 142 } 143 144 serialno = crc32_no_comp(0, low, 8); 145 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; 146 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); 147 148 env_set("serial#", serialno_str); 149 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 150 } 151 #endif 152 153 return ret; 154 } 155 156 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) 157 int fb_set_reboot_flag(void) 158 { 159 printf("Setting reboot to fastboot flag ...\n"); 160 writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); 161 162 return 0; 163 } 164 #endif 165 166 #ifdef CONFIG_ROCKCHIP_USB_BOOT 167 static int boot_from_udisk(void) 168 { 169 struct blk_desc *desc; 170 char *devtype; 171 char *devnum; 172 173 devtype = env_get("devtype"); 174 devnum = env_get("devnum"); 175 176 /* Booting priority: mmc1 > udisk */ 177 if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1")) 178 return 0; 179 180 if (!run_command("usb start", -1)) { 181 desc = blk_get_devnum_by_type(IF_TYPE_USB, 0); 182 if (!desc) { 183 printf("No usb device found\n"); 184 return -ENODEV; 185 } 186 187 if (!run_command("rkimgtest usb 0", -1)) { 188 rockchip_set_bootdev(desc); 189 env_set("devtype", "usb"); 190 env_set("devnum", "0"); 191 printf("Boot from usb 0\n"); 192 } else { 193 printf("No usb dev 0 found\n"); 194 return -ENODEV; 195 } 196 } 197 198 return 0; 199 } 200 #endif 201 202 static void env_fixup(void) 203 { 204 struct memblock mem; 205 ulong u_addr_r; 206 phys_size_t end; 207 char *addr_r; 208 209 #ifdef ENV_MEM_LAYOUT_SETTINGS1 210 const char *env_addr0[] = { 211 "scriptaddr", "pxefile_addr_r", 212 "fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r", 213 }; 214 const char *env_addr1[] = { 215 "scriptaddr1", "pxefile_addr1_r", 216 "fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r", 217 }; 218 int i; 219 220 /* 128M is a typical ram size for most platform, so as default here */ 221 if (gd->ram_size <= SZ_128M) { 222 /* Replace orignal xxx_addr_r */ 223 for (i = 0; i < ARRAY_SIZE(env_addr1); i++) { 224 addr_r = env_get(env_addr1[i]); 225 if (addr_r) 226 env_set(env_addr0[i], addr_r); 227 } 228 } 229 #endif 230 /* If bl32 is disabled, maybe kernel can be load to lower address. */ 231 if (!(gd->flags & GD_FLG_BL32_ENABLED)) { 232 addr_r = env_get("kernel_addr_no_bl32_r"); 233 if (addr_r) 234 env_set("kernel_addr_r", addr_r); 235 /* If bl32 is enlarged, we move ramdisk addr right behind it */ 236 } else { 237 mem = param_parse_optee_mem(); 238 end = mem.base + mem.size; 239 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 240 if (u_addr_r >= mem.base && u_addr_r < end) 241 env_set_hex("ramdisk_addr_r", end); 242 } 243 } 244 245 static void cmdline_handle(void) 246 { 247 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 248 struct tag *t; 249 250 t = atags_get_tag(ATAG_PUB_KEY); 251 if (t) { 252 /* Pass if efuse/otp programmed */ 253 if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED) 254 env_update("bootargs", "fuse.programmed=1"); 255 else 256 env_update("bootargs", "fuse.programmed=0"); 257 } 258 #endif 259 } 260 261 int board_late_init(void) 262 { 263 rockchip_set_ethaddr(); 264 rockchip_set_serialno(); 265 setup_download_mode(); 266 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 267 setup_boot_mode(); 268 #endif 269 #ifdef CONFIG_ROCKCHIP_USB_BOOT 270 boot_from_udisk(); 271 #endif 272 #ifdef CONFIG_DM_CHARGE_DISPLAY 273 charge_display(); 274 #endif 275 #ifdef CONFIG_DRM_ROCKCHIP 276 rockchip_show_logo(); 277 #endif 278 env_fixup(); 279 soc_clk_dump(); 280 cmdline_handle(); 281 282 return rk_board_late_init(); 283 } 284 285 static void early_download(void) 286 { 287 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \ 288 (CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0) 289 if (pwrkey_download_init()) 290 printf("Pwrkey download init failed\n"); 291 #endif 292 293 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 294 if (is_hotkey(HK_BROM_DNL)) { 295 printf("Enter bootrom download..."); 296 flushc(); 297 writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); 298 do_reset(NULL, 0, 0, NULL); 299 printf("failed!\n"); 300 } 301 #endif 302 } 303 304 static void board_debug_init(void) 305 { 306 if (!gd->serial.using_pre_serial) 307 board_debug_uart_init(); 308 309 if (tstc()) { 310 gd->console_evt = getc(); 311 if (gd->console_evt <= 0x1a) /* 'z' */ 312 printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1); 313 } 314 315 if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI)) 316 printf("CLI: off\n"); 317 } 318 319 int board_init(void) 320 { 321 board_debug_init(); 322 323 #ifdef DEBUG 324 soc_clk_dump(); 325 #endif 326 327 #ifdef CONFIG_USING_KERNEL_DTB 328 init_kernel_dtb(); 329 #endif 330 early_download(); 331 332 /* 333 * pmucru isn't referenced on some platforms, so pmucru driver can't 334 * probe that the "assigned-clocks" is unused. 335 */ 336 clks_probe(); 337 #ifdef CONFIG_DM_REGULATOR 338 if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR))) 339 debug("%s: Can't enable boot on regulator\n", __func__); 340 #endif 341 342 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN 343 io_domain_init(); 344 #endif 345 346 set_armclk_rate(); 347 348 #ifdef CONFIG_DM_DVFS 349 dvfs_init(true); 350 #endif 351 352 return rk_board_init(); 353 } 354 355 int interrupt_debugger_init(void) 356 { 357 #ifdef CONFIG_ROCKCHIP_DEBUGGER 358 return rockchip_debugger_init(); 359 #else 360 return 0; 361 #endif 362 } 363 364 int board_fdt_fixup(void *blob) 365 { 366 /* Common fixup for DRM */ 367 #ifdef CONFIG_DRM_ROCKCHIP 368 rockchip_display_fixup(blob); 369 #endif 370 371 return rk_board_fdt_fixup(blob); 372 } 373 374 #ifdef CONFIG_ARM64_BOOT_AARCH32 375 /* 376 * Fixup MMU region attr for OP-TEE on ARMv8 CPU: 377 * 378 * What ever U-Boot is 64-bit or 32-bit mode, the OP-TEE is always 64-bit mode. 379 * 380 * Command for OP-TEE: 381 * 64-bit mode: dcache is always enabled; 382 * 32-bit mode: dcache is always disabled(Due to some unknown issue); 383 * 384 * Command for U-Boot: 385 * 64-bit mode: MMU table is static defined in rkxxx.c file, all memory 386 * regions are mapped. That's good to match OP-TEE MMU policy. 387 * 388 * 32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where 389 * the OP-TEE region has been reserved, so it can not be 390 * mapped(i.e. dcache is disabled). That's also good to match 391 * OP-TEE MMU policy. 392 * 393 * For the data coherence when communication between U-Boot and OP-TEE, U-Boot 394 * should follow OP-TEE MMU policy. 395 * 396 * Here is the special: 397 * When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot is 32-bit mode while 398 * OP-TEE is still 64-bit mode. U-Boot would not map MMU table for OP-TEE 399 * region(but OP-TEE requires it cacheable) so we fixup here. 400 */ 401 int board_initr_caches_fixup(void) 402 { 403 struct memblock mem; 404 405 mem = param_parse_optee_mem(); 406 if (mem.size) 407 mmu_set_region_dcache_behaviour(mem.base, mem.size, 408 DCACHE_WRITEBACK); 409 return 0; 410 } 411 #endif 412 413 void arch_preboot_os(uint32_t bootm_state) 414 { 415 if (bootm_state & BOOTM_STATE_OS_PREP) 416 hotkey_run(HK_CLI_OS_PRE); 417 } 418 419 void board_quiesce_devices(void) 420 { 421 hotkey_run(HK_CMDLINE); 422 hotkey_run(HK_CLI_OS_GO); 423 424 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 425 /* Destroy atags makes next warm boot safer */ 426 atags_destroy(); 427 #endif 428 } 429 430 void enable_caches(void) 431 { 432 icache_enable(); 433 dcache_enable(); 434 } 435 436 #ifdef CONFIG_LMB 437 /* 438 * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize". 439 * This makes lmb_alloc_base() always alloc from tail of sdram. 440 * If we don't assign it, bi_dram[0] is used by default and it may cause 441 * lmb_alloc_base() fail when bi_dram[0] range is small. 442 */ 443 void board_lmb_reserve(struct lmb *lmb) 444 { 445 char bootm_mapsize[32]; 446 char bootm_low[32]; 447 u64 start, size; 448 int i; 449 450 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 451 if (!gd->bd->bi_dram[i].size) 452 break; 453 } 454 455 start = gd->bd->bi_dram[i - 1].start; 456 size = gd->bd->bi_dram[i - 1].size; 457 458 /* 459 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+), 460 * otherwise "Unable to handle kernel paging request at virtual address ...". 461 * 462 * So that we hope limit highest address at 768M, but there comes the the 463 * problem: ramdisk is a compressed image and it expands after descompress, 464 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...". 465 * 466 * We make a appointment that the highest memory address is 512MB, it 467 * makes lmb alloc safer. 468 */ 469 #ifndef CONFIG_ARM64 470 if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) { 471 start = gd->bd->bi_dram[i - 2].start; 472 size = gd->bd->bi_dram[i - 2].size; 473 } 474 475 if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) 476 size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start; 477 #endif 478 sprintf(bootm_low, "0x%llx", start); 479 sprintf(bootm_mapsize, "0x%llx", size); 480 env_set("bootm_low", bootm_low); 481 env_set("bootm_mapsize", bootm_mapsize); 482 } 483 #endif 484 485 #ifdef CONFIG_BIDRAM 486 int board_bidram_reserve(struct bidram *bidram) 487 { 488 struct memblock mem; 489 int ret; 490 491 /* ATF */ 492 mem = param_parse_atf_mem(); 493 ret = bidram_reserve(MEM_ATF, mem.base, mem.size); 494 if (ret) 495 return ret; 496 497 /* PSTORE/ATAGS/SHM */ 498 mem = param_parse_common_resv_mem(); 499 ret = bidram_reserve(MEM_SHM, mem.base, mem.size); 500 if (ret) 501 return ret; 502 503 /* OP-TEE */ 504 mem = param_parse_optee_mem(); 505 ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size); 506 if (ret) 507 return ret; 508 509 return 0; 510 } 511 512 parse_fn_t board_bidram_parse_fn(void) 513 { 514 return param_parse_ddr_mem; 515 } 516 #endif 517 518 #ifdef CONFIG_ROCKCHIP_AMP 519 void cpu_secondary_init_r(void) 520 { 521 amp_cpus_on(); 522 } 523 #endif 524 525 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \ 526 defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) 527 int board_init_f_init_serial(void) 528 { 529 struct tag *t = atags_get_tag(ATAG_SERIAL); 530 531 if (t) { 532 gd->serial.using_pre_serial = t->u.serial.enable; 533 gd->serial.addr = t->u.serial.addr; 534 gd->serial.baudrate = t->u.serial.baudrate; 535 gd->serial.id = t->u.serial.id; 536 537 debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n", 538 __func__, gd->serial.using_pre_serial, 539 gd->serial.addr, gd->serial.baudrate, 540 gd->serial.id); 541 } 542 543 return 0; 544 } 545 #endif 546 547 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 548 #include <fdt_support.h> 549 #include <usb.h> 550 #include <usb/dwc2_udc.h> 551 552 static struct dwc2_plat_otg_data otg_data = { 553 .rx_fifo_sz = 512, 554 .np_tx_fifo_sz = 16, 555 .tx_fifo_sz = 128, 556 }; 557 558 int board_usb_init(int index, enum usb_init_type init) 559 { 560 const void *blob = gd->fdt_blob; 561 const fdt32_t *reg; 562 fdt_addr_t addr; 563 int node; 564 565 /* find the usb_otg node */ 566 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); 567 568 retry: 569 if (node > 0) { 570 reg = fdt_getprop(blob, node, "reg", NULL); 571 if (!reg) 572 return -EINVAL; 573 574 addr = fdt_translate_address(blob, node, reg); 575 if (addr == OF_BAD_ADDR) { 576 pr_err("Not found usb_otg address\n"); 577 return -EINVAL; 578 } 579 580 #if defined(CONFIG_ROCKCHIP_RK3288) 581 if (addr != 0xff580000) { 582 node = fdt_node_offset_by_compatible(blob, node, 583 "snps,dwc2"); 584 goto retry; 585 } 586 #endif 587 } else { 588 /* 589 * With kernel dtb support, rk3288 dwc2 otg node 590 * use the rockchip legacy dwc2 driver "dwc_otg_310" 591 * with the compatible "rockchip,rk3288_usb20_otg", 592 * and rk3368 also use the "dwc_otg_310" driver with 593 * the compatible "rockchip,rk3368-usb". 594 */ 595 #if defined(CONFIG_ROCKCHIP_RK3288) 596 node = fdt_node_offset_by_compatible(blob, -1, 597 "rockchip,rk3288_usb20_otg"); 598 #elif defined(CONFIG_ROCKCHIP_RK3368) 599 node = fdt_node_offset_by_compatible(blob, -1, 600 "rockchip,rk3368-usb"); 601 #endif 602 if (node > 0) { 603 goto retry; 604 } else { 605 pr_err("Not found usb_otg device\n"); 606 return -ENODEV; 607 } 608 } 609 610 otg_data.regs_otg = (uintptr_t)addr; 611 612 return dwc2_udc_probe(&otg_data); 613 } 614 615 int board_usb_cleanup(int index, enum usb_init_type init) 616 { 617 return 0; 618 } 619 #endif 620 621 static void bootm_no_reloc(void) 622 { 623 char *ramdisk_high; 624 char *fdt_high; 625 626 if (!env_get_yesno("bootm-no-reloc")) 627 return; 628 629 ramdisk_high = env_get("initrd_high"); 630 fdt_high = env_get("fdt_high"); 631 632 if (!fdt_high) { 633 env_set_hex("fdt_high", -1UL); 634 printf("Fdt "); 635 } 636 637 if (!ramdisk_high) { 638 env_set_hex("initrd_high", -1UL); 639 printf("Ramdisk "); 640 } 641 642 if (!fdt_high || !ramdisk_high) 643 printf("skip relocation\n"); 644 } 645 646 int bootm_board_start(void) 647 { 648 /* 649 * print console record data 650 * 651 * On some rockchip platforms, uart debug and sdmmc pin are multiplex. 652 * If boot from sdmmc mode, the console data would be record in buffer, 653 * we switch to uart debug function in order to print it after loading 654 * images. 655 */ 656 #if defined(CONFIG_CONSOLE_RECORD) 657 if (!strcmp("mmc", env_get("devtype")) && 658 !strcmp("1", env_get("devnum"))) { 659 printf("IOMUX: sdmmc => uart debug"); 660 pinctrl_select_state(gd->cur_serial_dev, "default"); 661 console_record_print_purge(); 662 } 663 #endif 664 /* disable bootm relcation to save boot time */ 665 bootm_no_reloc(); 666 667 /* sysmem */ 668 hotkey_run(HK_SYSMEM); 669 sysmem_overflow_check(); 670 671 return 0; 672 } 673 674 /* 675 * Implement it to support CLI command: 676 * - Android: bootm [aosp addr] 677 * - FIT: bootm [fit addr] 678 * - uImage: bootm [uimage addr] 679 * 680 * Purpose: 681 * - The original bootm command args require fdt addr on AOSP, 682 * which is not flexible on rockchip boot/recovery.img. 683 * - Take Android/FIT/uImage image into sysmem management to avoid image 684 * memory overlap. 685 */ 686 #if defined(CONFIG_ANDROID_BOOTLOADER) || \ 687 defined(CONFIG_ROCKCHIP_FIT_IMAGE) || \ 688 defined(CONFIG_ROCKCHIP_UIMAGE) 689 int board_do_bootm(int argc, char * const argv[]) 690 { 691 int format; 692 void *img; 693 694 if (argc != 2) 695 return 0; 696 697 img = (void *)simple_strtoul(argv[1], NULL, 16); 698 format = (genimg_get_format(img)); 699 700 /* Android */ 701 #ifdef CONFIG_ANDROID_BOOT_IMAGE 702 if (format == IMAGE_FORMAT_ANDROID) { 703 struct andr_img_hdr *hdr; 704 ulong load_addr; 705 ulong size; 706 int ret; 707 708 hdr = (struct andr_img_hdr *)img; 709 printf("BOOTM: transferring to board Android\n"); 710 711 #ifdef CONFIG_USING_KERNEL_DTB 712 sysmem_free((phys_addr_t)gd->fdt_blob); 713 /* erase magic */ 714 fdt_set_magic((void *)gd->fdt_blob, ~0); 715 gd->fdt_blob = NULL; 716 #endif 717 load_addr = env_get_ulong("kernel_addr_r", 16, 0); 718 load_addr -= hdr->page_size; 719 size = android_image_get_end(hdr) - (ulong)hdr; 720 721 if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size)) 722 return -ENOMEM; 723 724 ret = android_image_memcpy_separate(hdr, &load_addr); 725 if (ret) { 726 printf("board do bootm failed, ret=%d\n", ret); 727 return ret; 728 } 729 730 return android_bootloader_boot_kernel(load_addr); 731 } 732 #endif 733 734 /* FIT */ 735 #if IMAGE_ENABLE_FIT 736 if (format == IMAGE_FORMAT_FIT) { 737 char boot_cmd[64]; 738 739 printf("BOOTM: transferring to board FIT\n"); 740 snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]); 741 return run_command(boot_cmd, 0); 742 } 743 #endif 744 745 /* uImage */ 746 #if defined(CONFIG_IMAGE_FORMAT_LEGACY) 747 if (format == IMAGE_FORMAT_LEGACY && 748 image_get_type(img) == IH_TYPE_MULTI) { 749 char boot_cmd[64]; 750 751 printf("BOOTM: transferring to board uImage\n"); 752 snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]); 753 return run_command(boot_cmd, 0); 754 } 755 #endif 756 757 return 0; 758 } 759 #endif 760 761 void autoboot_command_fail_handle(void) 762 { 763 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE 764 #ifdef CONFIG_ANDROID_AB 765 run_command("fastboot usb 0;", 0); /* use fastboot to ative slot */ 766 #else 767 run_command("rockusb 0 ${devtype} ${devnum}", 0); 768 run_command("fastboot usb 0;", 0); 769 #endif 770 #endif 771 } 772