1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <amp.h> 9 #include <android_bootloader.h> 10 #include <android_image.h> 11 #include <bidram.h> 12 #include <boot_rkimg.h> 13 #include <cli.h> 14 #include <clk.h> 15 #include <console.h> 16 #include <debug_uart.h> 17 #include <dm.h> 18 #include <dvfs.h> 19 #include <io-domain.h> 20 #include <image.h> 21 #include <key.h> 22 #include <memblk.h> 23 #include <misc.h> 24 #include <of_live.h> 25 #include <mtd_blk.h> 26 #include <ram.h> 27 #include <rockchip_debugger.h> 28 #include <syscon.h> 29 #include <sysmem.h> 30 #include <video_rockchip.h> 31 #include <asm/io.h> 32 #include <asm/gpio.h> 33 #include <dm/uclass-internal.h> 34 #include <dm/root.h> 35 #include <power/charge_display.h> 36 #include <power/regulator.h> 37 #include <optee_include/OpteeClientInterface.h> 38 #include <optee_include/OpteeClientApiLib.h> 39 #include <optee_include/tee_api_defines.h> 40 #include <asm/arch/boot_mode.h> 41 #include <asm/arch/clock.h> 42 #include <asm/arch/cpu.h> 43 #include <asm/arch/hotkey.h> 44 #include <asm/arch/param.h> 45 #include <asm/arch/periph.h> 46 #include <asm/arch/resource_img.h> 47 #include <asm/arch/rk_atags.h> 48 #include <asm/arch/vendor.h> 49 #ifdef CONFIG_ROCKCHIP_EINK_DISPLAY 50 #include <rk_eink.h> 51 #endif 52 DECLARE_GLOBAL_DATA_PTR; 53 54 __weak int rk_board_late_init(void) 55 { 56 return 0; 57 } 58 59 __weak int rk_board_fdt_fixup(void *blob) 60 { 61 return 0; 62 } 63 64 __weak int soc_clk_dump(void) 65 { 66 return 0; 67 } 68 69 __weak int set_armclk_rate(void) 70 { 71 return 0; 72 } 73 74 __weak int rk_board_init(void) 75 { 76 return 0; 77 } 78 79 /* 80 * define serialno max length, the max length is 512 Bytes 81 * The remaining bytes are used to ensure that the first 512 bytes 82 * are valid when executing 'env_set("serial#", value)'. 83 */ 84 #define VENDOR_SN_MAX 513 85 #define CPUID_LEN 0x10 86 #define CPUID_OFF 0x07 87 88 #define MAX_ETHERNET 0x2 89 90 static int rockchip_set_ethaddr(void) 91 { 92 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 93 char buf[ARP_HLEN_ASCII + 1], mac[16]; 94 u8 ethaddr[ARP_HLEN * MAX_ETHERNET] = {0}; 95 int ret, i; 96 bool need_write = false, randomed = false; 97 98 ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr)); 99 for (i = 0; i < MAX_ETHERNET; i++) { 100 if (ret <= 0 || !is_valid_ethaddr(ðaddr[i * ARP_HLEN])) { 101 if (!randomed) { 102 net_random_ethaddr(ðaddr[i * ARP_HLEN]); 103 randomed = true; 104 } else { 105 if (i > 0) { 106 memcpy(ðaddr[i * ARP_HLEN], 107 ðaddr[(i - 1) * ARP_HLEN], 108 ARP_HLEN); 109 ethaddr[i * ARP_HLEN] |= 0x02; 110 ethaddr[i * ARP_HLEN] += (i << 2); 111 } 112 } 113 114 need_write = true; 115 } 116 117 if (is_valid_ethaddr(ðaddr[i * ARP_HLEN])) { 118 sprintf(buf, "%pM", ðaddr[i * ARP_HLEN]); 119 if (i == 0) 120 memcpy(mac, "ethaddr", sizeof("ethaddr")); 121 else 122 sprintf(mac, "eth%daddr", i); 123 env_set(mac, buf); 124 } 125 } 126 127 if (need_write) { 128 ret = vendor_storage_write(VENDOR_LAN_MAC_ID, 129 ethaddr, sizeof(ethaddr)); 130 if (ret < 0) 131 printf("%s: vendor_storage_write failed %d\n", 132 __func__, ret); 133 } 134 #endif 135 136 return 0; 137 } 138 139 static int rockchip_set_serialno(void) 140 { 141 u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; 142 u8 cpuid[CPUID_LEN] = {0}; 143 char serialno_str[VENDOR_SN_MAX]; 144 int ret = 0, i; 145 u64 serialno; 146 147 /* Read serial number from vendor storage part */ 148 memset(serialno_str, 0, VENDOR_SN_MAX); 149 150 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 151 ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1)); 152 if (ret > 0) { 153 i = strlen(serialno_str); 154 for (; i > 0; i--) { 155 if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') || 156 (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') || 157 (serialno_str[i] >= '0' && serialno_str[i] <= '9')) 158 break; 159 } 160 161 serialno_str[i + 1] = 0x0; 162 env_set("serial#", serialno_str); 163 } else { 164 #endif 165 #if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP) 166 struct udevice *dev; 167 168 /* retrieve the device */ 169 if (IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)) 170 ret = uclass_get_device_by_driver(UCLASS_MISC, 171 DM_GET_DRIVER(rockchip_efuse), 172 &dev); 173 else 174 ret = uclass_get_device_by_driver(UCLASS_MISC, 175 DM_GET_DRIVER(rockchip_otp), 176 &dev); 177 178 if (ret) { 179 printf("%s: could not find efuse/otp device\n", __func__); 180 return ret; 181 } 182 183 /* read the cpu_id range from the efuses */ 184 ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid)); 185 if (ret) { 186 printf("%s: read cpuid from efuse/otp failed, ret=%d\n", 187 __func__, ret); 188 return ret; 189 } 190 #else 191 /* generate random cpuid */ 192 for (i = 0; i < CPUID_LEN; i++) 193 cpuid[i] = (u8)(rand()); 194 #endif 195 /* Generate the serial number based on CPU ID */ 196 for (i = 0; i < 8; i++) { 197 low[i] = cpuid[1 + (i << 1)]; 198 high[i] = cpuid[i << 1]; 199 } 200 201 serialno = crc32_no_comp(0, low, 8); 202 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; 203 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); 204 205 env_set("serial#", serialno_str); 206 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 207 } 208 #endif 209 210 return ret; 211 } 212 213 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) 214 int fb_set_reboot_flag(void) 215 { 216 printf("Setting reboot to fastboot flag ...\n"); 217 writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); 218 219 return 0; 220 } 221 #endif 222 223 #ifdef CONFIG_ROCKCHIP_USB_BOOT 224 static int boot_from_udisk(void) 225 { 226 struct blk_desc *desc; 227 char *devtype; 228 char *devnum; 229 230 devtype = env_get("devtype"); 231 devnum = env_get("devnum"); 232 233 /* Booting priority: mmc1 > udisk */ 234 if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1")) 235 return 0; 236 237 if (!run_command("usb start", -1)) { 238 desc = blk_get_devnum_by_type(IF_TYPE_USB, 0); 239 if (!desc) { 240 printf("No usb device found\n"); 241 return -ENODEV; 242 } 243 244 if (!run_command("rkimgtest usb 0", -1)) { 245 rockchip_set_bootdev(desc); 246 env_set("devtype", "usb"); 247 env_set("devnum", "0"); 248 printf("Boot from usb 0\n"); 249 } else { 250 printf("No usb dev 0 found\n"); 251 return -ENODEV; 252 } 253 } 254 255 return 0; 256 } 257 #endif 258 259 static void env_fixup(void) 260 { 261 struct memblock mem; 262 ulong u_addr_r; 263 phys_size_t end; 264 char *addr_r; 265 266 #ifdef ENV_MEM_LAYOUT_SETTINGS1 267 const char *env_addr0[] = { 268 "scriptaddr", "pxefile_addr_r", 269 "fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r", 270 }; 271 const char *env_addr1[] = { 272 "scriptaddr1", "pxefile_addr1_r", 273 "fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r", 274 }; 275 int i; 276 277 /* 128M is a typical ram size for most platform, so as default here */ 278 if (gd->ram_size <= SZ_128M) { 279 /* Replace orignal xxx_addr_r */ 280 for (i = 0; i < ARRAY_SIZE(env_addr1); i++) { 281 addr_r = env_get(env_addr1[i]); 282 if (addr_r) 283 env_set(env_addr0[i], addr_r); 284 } 285 } 286 #endif 287 /* If BL32 is disabled, move kernel to lower address. */ 288 if (!(gd->flags & GD_FLG_BL32_ENABLED)) { 289 addr_r = env_get("kernel_addr_no_bl32_r"); 290 if (addr_r) 291 env_set("kernel_addr_r", addr_r); 292 293 /* 294 * 0x0a200000 and 0x08400000 are rockchip traditional address 295 * of BL32 and ramdisk: 296 * 297 * |------------|------------| 298 * | BL32 | ramdisk | 299 * |------------|------------| 300 * 301 * Move ramdisk to BL32 address to fix sysmem alloc failed 302 * issue on the board with critical memory(ie. 256MB). 303 */ 304 if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) { 305 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 306 if (u_addr_r == 0x0a200000) 307 env_set("ramdisk_addr_r", "0x08400000"); 308 } 309 310 /* If BL32 is enlarged, move ramdisk right behind it */ 311 } else { 312 mem = param_parse_optee_mem(); 313 end = mem.base + mem.size; 314 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 315 if (u_addr_r >= mem.base && u_addr_r < end) 316 env_set_hex("ramdisk_addr_r", end); 317 } 318 } 319 320 static void cmdline_handle(void) 321 { 322 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 323 struct tag *t; 324 325 t = atags_get_tag(ATAG_PUB_KEY); 326 if (t) { 327 /* Pass if efuse/otp programmed */ 328 if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED) 329 env_update("bootargs", "fuse.programmed=1"); 330 else 331 env_update("bootargs", "fuse.programmed=0"); 332 } 333 #endif 334 } 335 336 int board_late_init(void) 337 { 338 rockchip_set_ethaddr(); 339 rockchip_set_serialno(); 340 setup_download_mode(); 341 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 342 setup_boot_mode(); 343 #endif 344 #ifdef CONFIG_AMP 345 amp_cpus_on(); 346 #endif 347 #ifdef CONFIG_ROCKCHIP_USB_BOOT 348 boot_from_udisk(); 349 #endif 350 #ifdef CONFIG_DM_CHARGE_DISPLAY 351 charge_display(); 352 #endif 353 #ifdef CONFIG_DRM_ROCKCHIP 354 rockchip_show_logo(); 355 #endif 356 #ifdef CONFIG_ROCKCHIP_EINK_DISPLAY 357 rockchip_eink_show_uboot_logo(); 358 #endif 359 env_fixup(); 360 soc_clk_dump(); 361 cmdline_handle(); 362 363 return rk_board_late_init(); 364 } 365 366 static void early_download(void) 367 { 368 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \ 369 (CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0) 370 if (pwrkey_download_init()) 371 printf("Pwrkey download init failed\n"); 372 #endif 373 374 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 375 if (is_hotkey(HK_BROM_DNL)) { 376 printf("Enter bootrom download..."); 377 flushc(); 378 writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); 379 do_reset(NULL, 0, 0, NULL); 380 printf("failed!\n"); 381 } 382 #endif 383 } 384 385 static void board_debug_init(void) 386 { 387 if (!gd->serial.using_pre_serial && 388 !(gd->flags & GD_FLG_DISABLE_CONSOLE)) 389 debug_uart_init(); 390 391 if (tstc()) { 392 gd->console_evt = getc(); 393 if (gd->console_evt <= 0x1a) /* 'z' */ 394 printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1); 395 } 396 397 if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI)) 398 printf("Cmd interface: disabled\n"); 399 } 400 401 #ifdef CONFIG_MTD_BLK 402 static void board_mtd_blk_map_partitions(void) 403 { 404 struct blk_desc *dev_desc; 405 406 dev_desc = rockchip_get_bootdev(); 407 if (dev_desc) 408 mtd_blk_map_partitions(dev_desc); 409 } 410 #endif 411 412 int board_init(void) 413 { 414 board_debug_init(); 415 416 #ifdef DEBUG 417 soc_clk_dump(); 418 #endif 419 420 #ifdef CONFIG_USING_KERNEL_DTB 421 #ifdef CONFIG_MTD_BLK 422 board_mtd_blk_map_partitions(); 423 #endif 424 init_kernel_dtb(); 425 #endif 426 early_download(); 427 428 /* 429 * pmucru isn't referenced on some platforms, so pmucru driver can't 430 * probe that the "assigned-clocks" is unused. 431 */ 432 clks_probe(); 433 #ifdef CONFIG_DM_REGULATOR 434 if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR))) 435 debug("%s: Can't enable boot on regulator\n", __func__); 436 #endif 437 438 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN 439 io_domain_init(); 440 #endif 441 442 set_armclk_rate(); 443 444 #ifdef CONFIG_DM_DVFS 445 dvfs_init(true); 446 #endif 447 448 return rk_board_init(); 449 } 450 451 int interrupt_debugger_init(void) 452 { 453 #ifdef CONFIG_ROCKCHIP_DEBUGGER 454 return rockchip_debugger_init(); 455 #else 456 return 0; 457 #endif 458 } 459 460 int board_fdt_fixup(void *blob) 461 { 462 /* Common fixup for DRM */ 463 #ifdef CONFIG_DRM_ROCKCHIP 464 rockchip_display_fixup(blob); 465 #endif 466 467 return rk_board_fdt_fixup(blob); 468 } 469 470 #if defined(CONFIG_ARM64_BOOT_AARCH32) || !defined(CONFIG_ARM64) 471 /* 472 * Common for OP-TEE: 473 * 64-bit & 32-bit mode: share memory dcache is always enabled; 474 * 475 * Common for U-Boot: 476 * 64-bit mode: MMU table is static defined in rkxxx.c file, all memory 477 * regions are mapped. That's good to match OP-TEE MMU policy. 478 * 479 * 32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where 480 * the OP-TEE region has been reserved, so it can not be 481 * mapped(i.e. dcache is disabled). That's *NOT* good to match 482 * OP-TEE MMU policy. 483 * 484 * For the data coherence when communication between U-Boot and OP-TEE, U-Boot 485 * should follow OP-TEE MMU policy. 486 * 487 * So 32-bit mode U-Boot should map OP-TEE share memory as dcache enabled. 488 */ 489 int board_initr_caches_fixup(void) 490 { 491 #ifdef CONFIG_OPTEE_CLIENT 492 struct memblock mem; 493 494 mem.base = 0; 495 mem.size = 0; 496 497 optee_get_shm_config(&mem.base, &mem.size); 498 if (mem.size) 499 mmu_set_region_dcache_behaviour(mem.base, mem.size, 500 DCACHE_WRITEBACK); 501 #endif 502 return 0; 503 } 504 #endif 505 506 void arch_preboot_os(uint32_t bootm_state) 507 { 508 if (bootm_state & BOOTM_STATE_OS_PREP) 509 hotkey_run(HK_CLI_OS_PRE); 510 } 511 512 void enable_caches(void) 513 { 514 icache_enable(); 515 dcache_enable(); 516 } 517 518 #ifdef CONFIG_LMB 519 /* 520 * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize". 521 * This makes lmb_alloc_base() always alloc from tail of sdram. 522 * If we don't assign it, bi_dram[0] is used by default and it may cause 523 * lmb_alloc_base() fail when bi_dram[0] range is small. 524 */ 525 void board_lmb_reserve(struct lmb *lmb) 526 { 527 char bootm_mapsize[32]; 528 char bootm_low[32]; 529 u64 start, size; 530 int i; 531 532 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 533 if (!gd->bd->bi_dram[i].size) 534 break; 535 } 536 537 start = gd->bd->bi_dram[i - 1].start; 538 size = gd->bd->bi_dram[i - 1].size; 539 540 /* 541 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+), 542 * otherwise "Unable to handle kernel paging request at virtual address ...". 543 * 544 * So that we hope limit highest address at 768M, but there comes the the 545 * problem: ramdisk is a compressed image and it expands after descompress, 546 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...". 547 * 548 * We make a appointment that the highest memory address is 512MB, it 549 * makes lmb alloc safer. 550 */ 551 #ifndef CONFIG_ARM64 552 if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) { 553 start = gd->bd->bi_dram[i - 2].start; 554 size = gd->bd->bi_dram[i - 2].size; 555 } 556 557 if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) 558 size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start; 559 #endif 560 sprintf(bootm_low, "0x%llx", start); 561 sprintf(bootm_mapsize, "0x%llx", size); 562 env_set("bootm_low", bootm_low); 563 env_set("bootm_mapsize", bootm_mapsize); 564 } 565 #endif 566 567 #ifdef CONFIG_BIDRAM 568 int board_bidram_reserve(struct bidram *bidram) 569 { 570 struct memblock mem; 571 int ret; 572 573 /* ATF */ 574 mem = param_parse_atf_mem(); 575 ret = bidram_reserve(MEM_ATF, mem.base, mem.size); 576 if (ret) 577 return ret; 578 579 /* PSTORE/ATAGS/SHM */ 580 mem = param_parse_common_resv_mem(); 581 ret = bidram_reserve(MEM_SHM, mem.base, mem.size); 582 if (ret) 583 return ret; 584 585 /* OP-TEE */ 586 mem = param_parse_optee_mem(); 587 ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size); 588 if (ret) 589 return ret; 590 591 return 0; 592 } 593 594 parse_fn_t board_bidram_parse_fn(void) 595 { 596 return param_parse_ddr_mem; 597 } 598 #endif 599 600 int board_init_f_boot_flags(void) 601 { 602 int boot_flags = 0; 603 604 /* pre-loader serial */ 605 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \ 606 defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) 607 struct tag *t; 608 609 t = atags_get_tag(ATAG_SERIAL); 610 if (t) { 611 gd->serial.using_pre_serial = 1; 612 gd->serial.enable = t->u.serial.enable; 613 gd->serial.baudrate = t->u.serial.baudrate; 614 gd->serial.addr = t->u.serial.addr; 615 gd->serial.id = t->u.serial.id; 616 gd->baudrate = CONFIG_BAUDRATE; 617 if (!t->u.serial.enable) 618 boot_flags |= GD_FLG_DISABLE_CONSOLE; 619 debug("preloader: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n", 620 gd->serial.enable, gd->serial.addr, 621 gd->serial.baudrate, gd->serial.id); 622 } else 623 #endif 624 { 625 gd->baudrate = CONFIG_BAUDRATE; 626 gd->serial.baudrate = CONFIG_BAUDRATE; 627 gd->serial.addr = CONFIG_DEBUG_UART_BASE; 628 } 629 630 /* The highest priority to turn off (override) console */ 631 #if defined(CONFIG_DISABLE_CONSOLE) 632 boot_flags |= GD_FLG_DISABLE_CONSOLE; 633 #endif 634 635 return boot_flags; 636 } 637 638 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 639 #include <fdt_support.h> 640 #include <usb.h> 641 #include <usb/dwc2_udc.h> 642 643 static struct dwc2_plat_otg_data otg_data = { 644 .rx_fifo_sz = 512, 645 .np_tx_fifo_sz = 16, 646 .tx_fifo_sz = 128, 647 }; 648 649 int board_usb_init(int index, enum usb_init_type init) 650 { 651 const void *blob = gd->fdt_blob; 652 const fdt32_t *reg; 653 fdt_addr_t addr; 654 int node; 655 656 /* find the usb_otg node */ 657 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); 658 659 retry: 660 if (node > 0) { 661 reg = fdt_getprop(blob, node, "reg", NULL); 662 if (!reg) 663 return -EINVAL; 664 665 addr = fdt_translate_address(blob, node, reg); 666 if (addr == OF_BAD_ADDR) { 667 pr_err("Not found usb_otg address\n"); 668 return -EINVAL; 669 } 670 671 #if defined(CONFIG_ROCKCHIP_RK3288) 672 if (addr != 0xff580000) { 673 node = fdt_node_offset_by_compatible(blob, node, 674 "snps,dwc2"); 675 goto retry; 676 } 677 #endif 678 } else { 679 /* 680 * With kernel dtb support, rk3288 dwc2 otg node 681 * use the rockchip legacy dwc2 driver "dwc_otg_310" 682 * with the compatible "rockchip,rk3288_usb20_otg", 683 * and rk3368 also use the "dwc_otg_310" driver with 684 * the compatible "rockchip,rk3368-usb". 685 */ 686 #if defined(CONFIG_ROCKCHIP_RK3288) 687 node = fdt_node_offset_by_compatible(blob, -1, 688 "rockchip,rk3288_usb20_otg"); 689 #elif defined(CONFIG_ROCKCHIP_RK3368) 690 node = fdt_node_offset_by_compatible(blob, -1, 691 "rockchip,rk3368-usb"); 692 #endif 693 if (node > 0) { 694 goto retry; 695 } else { 696 pr_err("Not found usb_otg device\n"); 697 return -ENODEV; 698 } 699 } 700 701 otg_data.regs_otg = (uintptr_t)addr; 702 703 return dwc2_udc_probe(&otg_data); 704 } 705 706 int board_usb_cleanup(int index, enum usb_init_type init) 707 { 708 return 0; 709 } 710 #endif 711 712 static void bootm_no_reloc(void) 713 { 714 char *ramdisk_high; 715 char *fdt_high; 716 717 if (!env_get_yesno("bootm-no-reloc")) 718 return; 719 720 ramdisk_high = env_get("initrd_high"); 721 fdt_high = env_get("fdt_high"); 722 723 if (!fdt_high) { 724 env_set_hex("fdt_high", -1UL); 725 printf("Fdt "); 726 } 727 728 if (!ramdisk_high) { 729 env_set_hex("initrd_high", -1UL); 730 printf("Ramdisk "); 731 } 732 733 if (!fdt_high || !ramdisk_high) 734 printf("skip relocation\n"); 735 } 736 737 int bootm_board_start(void) 738 { 739 /* 740 * print console record data 741 * 742 * On some rockchip platforms, uart debug and sdmmc pin are multiplex. 743 * If boot from sdmmc mode, the console data would be record in buffer, 744 * we switch to uart debug function in order to print it after loading 745 * images. 746 */ 747 #if defined(CONFIG_CONSOLE_RECORD) 748 if (!strcmp("mmc", env_get("devtype")) && 749 !strcmp("1", env_get("devnum"))) { 750 printf("IOMUX: sdmmc => uart debug"); 751 pinctrl_select_state(gd->cur_serial_dev, "default"); 752 console_record_print_purge(); 753 } 754 #endif 755 /* disable bootm relcation to save boot time */ 756 bootm_no_reloc(); 757 758 /* sysmem */ 759 hotkey_run(HK_SYSMEM); 760 sysmem_overflow_check(); 761 762 return 0; 763 } 764 765 /* 766 * Implement it to support CLI command: 767 * - Android: bootm [aosp addr] 768 * - FIT: bootm [fit addr] 769 * - uImage: bootm [uimage addr] 770 * 771 * Purpose: 772 * - The original bootm command args require fdt addr on AOSP, 773 * which is not flexible on rockchip boot/recovery.img. 774 * - Take Android/FIT/uImage image into sysmem management to avoid image 775 * memory overlap. 776 */ 777 #if defined(CONFIG_ANDROID_BOOTLOADER) || \ 778 defined(CONFIG_ROCKCHIP_FIT_IMAGE) || \ 779 defined(CONFIG_ROCKCHIP_UIMAGE) 780 int board_do_bootm(int argc, char * const argv[]) 781 { 782 int format; 783 void *img; 784 785 if (argc != 2) 786 return 0; 787 788 img = (void *)simple_strtoul(argv[1], NULL, 16); 789 format = (genimg_get_format(img)); 790 791 /* Android */ 792 #ifdef CONFIG_ANDROID_BOOT_IMAGE 793 if (format == IMAGE_FORMAT_ANDROID) { 794 struct andr_img_hdr *hdr; 795 ulong load_addr; 796 ulong size; 797 int ret; 798 799 hdr = (struct andr_img_hdr *)img; 800 printf("BOOTM: transferring to board Android\n"); 801 802 #ifdef CONFIG_USING_KERNEL_DTB 803 sysmem_free((phys_addr_t)gd->fdt_blob); 804 /* erase magic */ 805 fdt_set_magic((void *)gd->fdt_blob, ~0); 806 gd->fdt_blob = NULL; 807 #endif 808 load_addr = env_get_ulong("kernel_addr_r", 16, 0); 809 load_addr -= hdr->page_size; 810 size = android_image_get_end(hdr) - (ulong)hdr; 811 812 if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size)) 813 return -ENOMEM; 814 815 ret = android_image_memcpy_separate(hdr, &load_addr); 816 if (ret) { 817 printf("board do bootm failed, ret=%d\n", ret); 818 return ret; 819 } 820 821 return android_bootloader_boot_kernel(load_addr); 822 } 823 #endif 824 825 /* FIT */ 826 #if IMAGE_ENABLE_FIT 827 if (format == IMAGE_FORMAT_FIT) { 828 char boot_cmd[64]; 829 830 printf("BOOTM: transferring to board FIT\n"); 831 snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]); 832 return run_command(boot_cmd, 0); 833 } 834 #endif 835 836 /* uImage */ 837 #if defined(CONFIG_IMAGE_FORMAT_LEGACY) 838 if (format == IMAGE_FORMAT_LEGACY && 839 image_get_type(img) == IH_TYPE_MULTI) { 840 char boot_cmd[64]; 841 842 printf("BOOTM: transferring to board uImage\n"); 843 snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]); 844 return run_command(boot_cmd, 0); 845 } 846 #endif 847 848 return 0; 849 } 850 #endif 851 852 void autoboot_command_fail_handle(void) 853 { 854 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE 855 #ifdef CONFIG_ANDROID_AB 856 run_command("fastboot usb 0;", 0); /* use fastboot to ative slot */ 857 #else 858 run_command("rockusb 0 ${devtype} ${devnum}", 0); 859 run_command("fastboot usb 0;", 0); 860 #endif 861 #endif 862 } 863 864 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 865 866 #define FIT_ROLLBACK_INDEX_LOCATION 0x66697472 /* "fitr" */ 867 868 int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index) 869 { 870 #ifdef CONFIG_OPTEE_CLIENT 871 u64 index; 872 int ret; 873 874 ret = trusty_read_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, &index); 875 if (ret) { 876 if (ret != TEE_ERROR_ITEM_NOT_FOUND) 877 return ret; 878 879 index = 0; 880 printf("Initial otp index as %d\n", fit_index); 881 } 882 883 *otp_index = (uint32_t)index; 884 #else 885 *otp_index = 0; 886 #endif 887 888 return 0; 889 } 890 891 static int fit_write_trusty_rollback_index(u32 trusty_index) 892 { 893 if (!trusty_index) 894 return 0; 895 896 return trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, 897 (u64)trusty_index); 898 } 899 #endif 900 901 void board_quiesce_devices(void *images) 902 { 903 hotkey_run(HK_CMDLINE); 904 hotkey_run(HK_CLI_OS_GO); 905 906 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 907 /* Destroy atags makes next warm boot safer */ 908 atags_destroy(); 909 #endif 910 911 #ifdef CONFIG_ROCKCHIP_REBOOT_TEST 912 do_reset(NULL, 0, 0, NULL); 913 #endif 914 915 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 916 int ret; 917 918 ret = fit_write_trusty_rollback_index(gd->rollback_index); 919 if (ret) { 920 panic("Failed to write fit rollback index %d, ret=%d", 921 gd->rollback_index, ret); 922 } 923 #endif 924 925 #ifdef CONFIG_ROCKCHIP_HW_DECOMPRESS 926 misc_decompress_cleanup(); 927 #endif 928 } 929