1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <amp.h> 9 #include <android_bootloader.h> 10 #include <android_image.h> 11 #include <bidram.h> 12 #include <boot_rkimg.h> 13 #include <cli.h> 14 #include <clk.h> 15 #include <console.h> 16 #include <debug_uart.h> 17 #include <dm.h> 18 #include <dvfs.h> 19 #include <io-domain.h> 20 #include <image.h> 21 #include <key.h> 22 #include <memblk.h> 23 #include <misc.h> 24 #include <of_live.h> 25 #include <ram.h> 26 #include <rockchip_debugger.h> 27 #include <syscon.h> 28 #include <sysmem.h> 29 #include <video_rockchip.h> 30 #include <asm/io.h> 31 #include <asm/gpio.h> 32 #include <dm/uclass-internal.h> 33 #include <dm/root.h> 34 #include <power/charge_display.h> 35 #include <power/regulator.h> 36 #include <optee_include/OpteeClientInterface.h> 37 #include <asm/arch/boot_mode.h> 38 #include <asm/arch/clock.h> 39 #include <asm/arch/cpu.h> 40 #include <asm/arch/hotkey.h> 41 #include <asm/arch/param.h> 42 #include <asm/arch/periph.h> 43 #include <asm/arch/resource_img.h> 44 #include <asm/arch/rk_atags.h> 45 #include <asm/arch/vendor.h> 46 47 DECLARE_GLOBAL_DATA_PTR; 48 49 __weak int rk_board_late_init(void) 50 { 51 return 0; 52 } 53 54 __weak int rk_board_fdt_fixup(void *blob) 55 { 56 return 0; 57 } 58 59 __weak int soc_clk_dump(void) 60 { 61 return 0; 62 } 63 64 __weak int set_armclk_rate(void) 65 { 66 return 0; 67 } 68 69 __weak int rk_board_init(void) 70 { 71 return 0; 72 } 73 74 /* 75 * define serialno max length, the max length is 512 Bytes 76 * The remaining bytes are used to ensure that the first 512 bytes 77 * are valid when executing 'env_set("serial#", value)'. 78 */ 79 #define VENDOR_SN_MAX 513 80 #define CPUID_LEN 0x10 81 #define CPUID_OFF 0x07 82 83 static int rockchip_set_ethaddr(void) 84 { 85 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 86 char buf[ARP_HLEN_ASCII + 1]; 87 u8 ethaddr[ARP_HLEN]; 88 int ret; 89 90 ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr)); 91 if (ret > 0 && is_valid_ethaddr(ethaddr)) { 92 sprintf(buf, "%pM", ethaddr); 93 env_set("ethaddr", buf); 94 } 95 #endif 96 return 0; 97 } 98 99 static int rockchip_set_serialno(void) 100 { 101 u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; 102 u8 cpuid[CPUID_LEN] = {0}; 103 char serialno_str[VENDOR_SN_MAX]; 104 int ret = 0, i; 105 u64 serialno; 106 107 /* Read serial number from vendor storage part */ 108 memset(serialno_str, 0, VENDOR_SN_MAX); 109 110 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 111 ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1)); 112 if (ret > 0) { 113 i = strlen(serialno_str); 114 for (; i > 0; i--) { 115 if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') || 116 (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') || 117 (serialno_str[i] >= '0' && serialno_str[i] <= '9')) 118 break; 119 } 120 121 serialno_str[i + 1] = 0x0; 122 env_set("serial#", serialno_str); 123 } else { 124 #endif 125 #ifdef CONFIG_ROCKCHIP_EFUSE 126 struct udevice *dev; 127 128 /* retrieve the device */ 129 ret = uclass_get_device_by_driver(UCLASS_MISC, 130 DM_GET_DRIVER(rockchip_efuse), 131 &dev); 132 if (ret) { 133 printf("%s: could not find efuse device\n", __func__); 134 return ret; 135 } 136 137 /* read the cpu_id range from the efuses */ 138 ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid)); 139 if (ret) { 140 printf("%s: read cpuid from efuses failed, ret=%d\n", 141 __func__, ret); 142 return ret; 143 } 144 #else 145 /* generate random cpuid */ 146 for (i = 0; i < CPUID_LEN; i++) 147 cpuid[i] = (u8)(rand()); 148 #endif 149 /* Generate the serial number based on CPU ID */ 150 for (i = 0; i < 8; i++) { 151 low[i] = cpuid[1 + (i << 1)]; 152 high[i] = cpuid[i << 1]; 153 } 154 155 serialno = crc32_no_comp(0, low, 8); 156 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; 157 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); 158 159 env_set("serial#", serialno_str); 160 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 161 } 162 #endif 163 164 return ret; 165 } 166 167 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) 168 int fb_set_reboot_flag(void) 169 { 170 printf("Setting reboot to fastboot flag ...\n"); 171 writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); 172 173 return 0; 174 } 175 #endif 176 177 #ifdef CONFIG_ROCKCHIP_USB_BOOT 178 static int boot_from_udisk(void) 179 { 180 struct blk_desc *desc; 181 char *devtype; 182 char *devnum; 183 184 devtype = env_get("devtype"); 185 devnum = env_get("devnum"); 186 187 /* Booting priority: mmc1 > udisk */ 188 if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1")) 189 return 0; 190 191 if (!run_command("usb start", -1)) { 192 desc = blk_get_devnum_by_type(IF_TYPE_USB, 0); 193 if (!desc) { 194 printf("No usb device found\n"); 195 return -ENODEV; 196 } 197 198 if (!run_command("rkimgtest usb 0", -1)) { 199 rockchip_set_bootdev(desc); 200 env_set("devtype", "usb"); 201 env_set("devnum", "0"); 202 printf("Boot from usb 0\n"); 203 } else { 204 printf("No usb dev 0 found\n"); 205 return -ENODEV; 206 } 207 } 208 209 return 0; 210 } 211 #endif 212 213 static void env_fixup(void) 214 { 215 struct memblock mem; 216 ulong u_addr_r; 217 phys_size_t end; 218 char *addr_r; 219 220 #ifdef ENV_MEM_LAYOUT_SETTINGS1 221 const char *env_addr0[] = { 222 "scriptaddr", "pxefile_addr_r", 223 "fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r", 224 }; 225 const char *env_addr1[] = { 226 "scriptaddr1", "pxefile_addr1_r", 227 "fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r", 228 }; 229 int i; 230 231 /* 128M is a typical ram size for most platform, so as default here */ 232 if (gd->ram_size <= SZ_128M) { 233 /* Replace orignal xxx_addr_r */ 234 for (i = 0; i < ARRAY_SIZE(env_addr1); i++) { 235 addr_r = env_get(env_addr1[i]); 236 if (addr_r) 237 env_set(env_addr0[i], addr_r); 238 } 239 } 240 #endif 241 /* If BL32 is disabled, move kernel to lower address. */ 242 if (!(gd->flags & GD_FLG_BL32_ENABLED)) { 243 addr_r = env_get("kernel_addr_no_bl32_r"); 244 if (addr_r) 245 env_set("kernel_addr_r", addr_r); 246 247 /* 248 * 0x0a200000 and 0x08400000 are rockchip traditional address 249 * of BL32 and ramdisk: 250 * 251 * |------------|------------| 252 * | BL32 | ramdisk | 253 * |------------|------------| 254 * 255 * Move ramdisk to BL32 address to fix sysmem alloc failed 256 * issue on the board with critical memory(ie. 256MB). 257 */ 258 if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) { 259 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 260 if (u_addr_r == 0x0a200000) 261 env_set("ramdisk_addr_r", "0x08400000"); 262 } 263 264 /* If BL32 is enlarged, move ramdisk right behind it */ 265 } else { 266 mem = param_parse_optee_mem(); 267 end = mem.base + mem.size; 268 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 269 if (u_addr_r >= mem.base && u_addr_r < end) 270 env_set_hex("ramdisk_addr_r", end); 271 } 272 } 273 274 static void cmdline_handle(void) 275 { 276 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 277 struct tag *t; 278 279 t = atags_get_tag(ATAG_PUB_KEY); 280 if (t) { 281 /* Pass if efuse/otp programmed */ 282 if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED) 283 env_update("bootargs", "fuse.programmed=1"); 284 else 285 env_update("bootargs", "fuse.programmed=0"); 286 } 287 #endif 288 } 289 290 int board_late_init(void) 291 { 292 rockchip_set_ethaddr(); 293 rockchip_set_serialno(); 294 setup_download_mode(); 295 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 296 setup_boot_mode(); 297 #endif 298 #ifdef CONFIG_ROCKCHIP_USB_BOOT 299 boot_from_udisk(); 300 #endif 301 #ifdef CONFIG_DM_CHARGE_DISPLAY 302 charge_display(); 303 #endif 304 #ifdef CONFIG_DRM_ROCKCHIP 305 rockchip_show_logo(); 306 #endif 307 env_fixup(); 308 soc_clk_dump(); 309 cmdline_handle(); 310 311 return rk_board_late_init(); 312 } 313 314 static void early_download(void) 315 { 316 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \ 317 (CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0) 318 if (pwrkey_download_init()) 319 printf("Pwrkey download init failed\n"); 320 #endif 321 322 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 323 if (is_hotkey(HK_BROM_DNL)) { 324 printf("Enter bootrom download..."); 325 flushc(); 326 writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); 327 do_reset(NULL, 0, 0, NULL); 328 printf("failed!\n"); 329 } 330 #endif 331 } 332 333 static void board_debug_init(void) 334 { 335 if (!gd->serial.using_pre_serial) 336 board_debug_uart_init(); 337 338 if (tstc()) { 339 gd->console_evt = getc(); 340 if (gd->console_evt <= 0x1a) /* 'z' */ 341 printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1); 342 } 343 344 if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI)) 345 printf("CLI: off\n"); 346 } 347 348 int board_init(void) 349 { 350 board_debug_init(); 351 352 #ifdef DEBUG 353 soc_clk_dump(); 354 #endif 355 356 #ifdef CONFIG_USING_KERNEL_DTB 357 init_kernel_dtb(); 358 #endif 359 early_download(); 360 361 /* 362 * pmucru isn't referenced on some platforms, so pmucru driver can't 363 * probe that the "assigned-clocks" is unused. 364 */ 365 clks_probe(); 366 #ifdef CONFIG_DM_REGULATOR 367 if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR))) 368 debug("%s: Can't enable boot on regulator\n", __func__); 369 #endif 370 371 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN 372 io_domain_init(); 373 #endif 374 375 set_armclk_rate(); 376 377 #ifdef CONFIG_DM_DVFS 378 dvfs_init(true); 379 #endif 380 381 return rk_board_init(); 382 } 383 384 int interrupt_debugger_init(void) 385 { 386 #ifdef CONFIG_ROCKCHIP_DEBUGGER 387 return rockchip_debugger_init(); 388 #else 389 return 0; 390 #endif 391 } 392 393 int board_fdt_fixup(void *blob) 394 { 395 /* Common fixup for DRM */ 396 #ifdef CONFIG_DRM_ROCKCHIP 397 rockchip_display_fixup(blob); 398 #endif 399 400 return rk_board_fdt_fixup(blob); 401 } 402 403 #ifdef CONFIG_ARM64_BOOT_AARCH32 404 /* 405 * Fixup MMU region attr for OP-TEE on ARMv8 CPU: 406 * 407 * What ever U-Boot is 64-bit or 32-bit mode, the OP-TEE is always 64-bit mode. 408 * 409 * Command for OP-TEE: 410 * 64-bit mode: dcache is always enabled; 411 * 32-bit mode: dcache is always disabled(Due to some unknown issue); 412 * 413 * Command for U-Boot: 414 * 64-bit mode: MMU table is static defined in rkxxx.c file, all memory 415 * regions are mapped. That's good to match OP-TEE MMU policy. 416 * 417 * 32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where 418 * the OP-TEE region has been reserved, so it can not be 419 * mapped(i.e. dcache is disabled). That's also good to match 420 * OP-TEE MMU policy. 421 * 422 * For the data coherence when communication between U-Boot and OP-TEE, U-Boot 423 * should follow OP-TEE MMU policy. 424 * 425 * Here is the special: 426 * When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot is 32-bit mode while 427 * OP-TEE is still 64-bit mode. U-Boot would not map MMU table for OP-TEE 428 * region(but OP-TEE requires it cacheable) so we fixup here. 429 */ 430 int board_initr_caches_fixup(void) 431 { 432 struct memblock mem; 433 434 mem = param_parse_optee_mem(); 435 if (mem.size) 436 mmu_set_region_dcache_behaviour(mem.base, mem.size, 437 DCACHE_WRITEBACK); 438 return 0; 439 } 440 #endif 441 442 void arch_preboot_os(uint32_t bootm_state) 443 { 444 if (bootm_state & BOOTM_STATE_OS_PREP) 445 hotkey_run(HK_CLI_OS_PRE); 446 } 447 448 void board_quiesce_devices(void *images) 449 { 450 hotkey_run(HK_CMDLINE); 451 hotkey_run(HK_CLI_OS_GO); 452 453 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 454 /* Destroy atags makes next warm boot safer */ 455 atags_destroy(); 456 #endif 457 458 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 459 /* TODO */ 460 printf("fit: rollback protect not implement\n"); 461 #endif 462 } 463 464 void enable_caches(void) 465 { 466 icache_enable(); 467 dcache_enable(); 468 } 469 470 #ifdef CONFIG_LMB 471 /* 472 * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize". 473 * This makes lmb_alloc_base() always alloc from tail of sdram. 474 * If we don't assign it, bi_dram[0] is used by default and it may cause 475 * lmb_alloc_base() fail when bi_dram[0] range is small. 476 */ 477 void board_lmb_reserve(struct lmb *lmb) 478 { 479 char bootm_mapsize[32]; 480 char bootm_low[32]; 481 u64 start, size; 482 int i; 483 484 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 485 if (!gd->bd->bi_dram[i].size) 486 break; 487 } 488 489 start = gd->bd->bi_dram[i - 1].start; 490 size = gd->bd->bi_dram[i - 1].size; 491 492 /* 493 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+), 494 * otherwise "Unable to handle kernel paging request at virtual address ...". 495 * 496 * So that we hope limit highest address at 768M, but there comes the the 497 * problem: ramdisk is a compressed image and it expands after descompress, 498 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...". 499 * 500 * We make a appointment that the highest memory address is 512MB, it 501 * makes lmb alloc safer. 502 */ 503 #ifndef CONFIG_ARM64 504 if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) { 505 start = gd->bd->bi_dram[i - 2].start; 506 size = gd->bd->bi_dram[i - 2].size; 507 } 508 509 if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) 510 size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start; 511 #endif 512 sprintf(bootm_low, "0x%llx", start); 513 sprintf(bootm_mapsize, "0x%llx", size); 514 env_set("bootm_low", bootm_low); 515 env_set("bootm_mapsize", bootm_mapsize); 516 } 517 #endif 518 519 #ifdef CONFIG_BIDRAM 520 int board_bidram_reserve(struct bidram *bidram) 521 { 522 struct memblock mem; 523 int ret; 524 525 /* ATF */ 526 mem = param_parse_atf_mem(); 527 ret = bidram_reserve(MEM_ATF, mem.base, mem.size); 528 if (ret) 529 return ret; 530 531 /* PSTORE/ATAGS/SHM */ 532 mem = param_parse_common_resv_mem(); 533 ret = bidram_reserve(MEM_SHM, mem.base, mem.size); 534 if (ret) 535 return ret; 536 537 /* OP-TEE */ 538 mem = param_parse_optee_mem(); 539 ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size); 540 if (ret) 541 return ret; 542 543 return 0; 544 } 545 546 parse_fn_t board_bidram_parse_fn(void) 547 { 548 return param_parse_ddr_mem; 549 } 550 #endif 551 552 #ifdef CONFIG_ROCKCHIP_AMP 553 void cpu_secondary_init_r(void) 554 { 555 amp_cpus_on(); 556 } 557 #endif 558 559 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \ 560 defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) 561 int board_init_f_init_serial(void) 562 { 563 struct tag *t = atags_get_tag(ATAG_SERIAL); 564 565 if (t) { 566 gd->serial.using_pre_serial = t->u.serial.enable; 567 gd->serial.addr = t->u.serial.addr; 568 gd->serial.baudrate = t->u.serial.baudrate; 569 gd->serial.id = t->u.serial.id; 570 571 debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n", 572 __func__, gd->serial.using_pre_serial, 573 gd->serial.addr, gd->serial.baudrate, 574 gd->serial.id); 575 } 576 577 return 0; 578 } 579 #endif 580 581 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 582 #include <fdt_support.h> 583 #include <usb.h> 584 #include <usb/dwc2_udc.h> 585 586 static struct dwc2_plat_otg_data otg_data = { 587 .rx_fifo_sz = 512, 588 .np_tx_fifo_sz = 16, 589 .tx_fifo_sz = 128, 590 }; 591 592 int board_usb_init(int index, enum usb_init_type init) 593 { 594 const void *blob = gd->fdt_blob; 595 const fdt32_t *reg; 596 fdt_addr_t addr; 597 int node; 598 599 /* find the usb_otg node */ 600 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); 601 602 retry: 603 if (node > 0) { 604 reg = fdt_getprop(blob, node, "reg", NULL); 605 if (!reg) 606 return -EINVAL; 607 608 addr = fdt_translate_address(blob, node, reg); 609 if (addr == OF_BAD_ADDR) { 610 pr_err("Not found usb_otg address\n"); 611 return -EINVAL; 612 } 613 614 #if defined(CONFIG_ROCKCHIP_RK3288) 615 if (addr != 0xff580000) { 616 node = fdt_node_offset_by_compatible(blob, node, 617 "snps,dwc2"); 618 goto retry; 619 } 620 #endif 621 } else { 622 /* 623 * With kernel dtb support, rk3288 dwc2 otg node 624 * use the rockchip legacy dwc2 driver "dwc_otg_310" 625 * with the compatible "rockchip,rk3288_usb20_otg", 626 * and rk3368 also use the "dwc_otg_310" driver with 627 * the compatible "rockchip,rk3368-usb". 628 */ 629 #if defined(CONFIG_ROCKCHIP_RK3288) 630 node = fdt_node_offset_by_compatible(blob, -1, 631 "rockchip,rk3288_usb20_otg"); 632 #elif defined(CONFIG_ROCKCHIP_RK3368) 633 node = fdt_node_offset_by_compatible(blob, -1, 634 "rockchip,rk3368-usb"); 635 #endif 636 if (node > 0) { 637 goto retry; 638 } else { 639 pr_err("Not found usb_otg device\n"); 640 return -ENODEV; 641 } 642 } 643 644 otg_data.regs_otg = (uintptr_t)addr; 645 646 return dwc2_udc_probe(&otg_data); 647 } 648 649 int board_usb_cleanup(int index, enum usb_init_type init) 650 { 651 return 0; 652 } 653 #endif 654 655 static void bootm_no_reloc(void) 656 { 657 char *ramdisk_high; 658 char *fdt_high; 659 660 if (!env_get_yesno("bootm-no-reloc")) 661 return; 662 663 ramdisk_high = env_get("initrd_high"); 664 fdt_high = env_get("fdt_high"); 665 666 if (!fdt_high) { 667 env_set_hex("fdt_high", -1UL); 668 printf("Fdt "); 669 } 670 671 if (!ramdisk_high) { 672 env_set_hex("initrd_high", -1UL); 673 printf("Ramdisk "); 674 } 675 676 if (!fdt_high || !ramdisk_high) 677 printf("skip relocation\n"); 678 } 679 680 int bootm_board_start(void) 681 { 682 /* 683 * print console record data 684 * 685 * On some rockchip platforms, uart debug and sdmmc pin are multiplex. 686 * If boot from sdmmc mode, the console data would be record in buffer, 687 * we switch to uart debug function in order to print it after loading 688 * images. 689 */ 690 #if defined(CONFIG_CONSOLE_RECORD) 691 if (!strcmp("mmc", env_get("devtype")) && 692 !strcmp("1", env_get("devnum"))) { 693 printf("IOMUX: sdmmc => uart debug"); 694 pinctrl_select_state(gd->cur_serial_dev, "default"); 695 console_record_print_purge(); 696 } 697 #endif 698 /* disable bootm relcation to save boot time */ 699 bootm_no_reloc(); 700 701 /* sysmem */ 702 hotkey_run(HK_SYSMEM); 703 sysmem_overflow_check(); 704 705 return 0; 706 } 707 708 /* 709 * Implement it to support CLI command: 710 * - Android: bootm [aosp addr] 711 * - FIT: bootm [fit addr] 712 * - uImage: bootm [uimage addr] 713 * 714 * Purpose: 715 * - The original bootm command args require fdt addr on AOSP, 716 * which is not flexible on rockchip boot/recovery.img. 717 * - Take Android/FIT/uImage image into sysmem management to avoid image 718 * memory overlap. 719 */ 720 #if defined(CONFIG_ANDROID_BOOTLOADER) || \ 721 defined(CONFIG_ROCKCHIP_FIT_IMAGE) || \ 722 defined(CONFIG_ROCKCHIP_UIMAGE) 723 int board_do_bootm(int argc, char * const argv[]) 724 { 725 int format; 726 void *img; 727 728 if (argc != 2) 729 return 0; 730 731 img = (void *)simple_strtoul(argv[1], NULL, 16); 732 format = (genimg_get_format(img)); 733 734 /* Android */ 735 #ifdef CONFIG_ANDROID_BOOT_IMAGE 736 if (format == IMAGE_FORMAT_ANDROID) { 737 struct andr_img_hdr *hdr; 738 ulong load_addr; 739 ulong size; 740 int ret; 741 742 hdr = (struct andr_img_hdr *)img; 743 printf("BOOTM: transferring to board Android\n"); 744 745 #ifdef CONFIG_USING_KERNEL_DTB 746 sysmem_free((phys_addr_t)gd->fdt_blob); 747 /* erase magic */ 748 fdt_set_magic((void *)gd->fdt_blob, ~0); 749 gd->fdt_blob = NULL; 750 #endif 751 load_addr = env_get_ulong("kernel_addr_r", 16, 0); 752 load_addr -= hdr->page_size; 753 size = android_image_get_end(hdr) - (ulong)hdr; 754 755 if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size)) 756 return -ENOMEM; 757 758 ret = android_image_memcpy_separate(hdr, &load_addr); 759 if (ret) { 760 printf("board do bootm failed, ret=%d\n", ret); 761 return ret; 762 } 763 764 return android_bootloader_boot_kernel(load_addr); 765 } 766 #endif 767 768 /* FIT */ 769 #if IMAGE_ENABLE_FIT 770 if (format == IMAGE_FORMAT_FIT) { 771 char boot_cmd[64]; 772 773 printf("BOOTM: transferring to board FIT\n"); 774 snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]); 775 return run_command(boot_cmd, 0); 776 } 777 #endif 778 779 /* uImage */ 780 #if defined(CONFIG_IMAGE_FORMAT_LEGACY) 781 if (format == IMAGE_FORMAT_LEGACY && 782 image_get_type(img) == IH_TYPE_MULTI) { 783 char boot_cmd[64]; 784 785 printf("BOOTM: transferring to board uImage\n"); 786 snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]); 787 return run_command(boot_cmd, 0); 788 } 789 #endif 790 791 return 0; 792 } 793 #endif 794 795 void autoboot_command_fail_handle(void) 796 { 797 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE 798 #ifdef CONFIG_ANDROID_AB 799 run_command("fastboot usb 0;", 0); /* use fastboot to ative slot */ 800 #else 801 run_command("rockusb 0 ${devtype} ${devnum}", 0); 802 run_command("fastboot usb 0;", 0); 803 #endif 804 #endif 805 } 806 807 int fit_board_verify_required_sigs(void) 808 { 809 uint8_t vboot = 0; 810 #ifdef CONFIG_OPTEE_CLIENT 811 int ret; 812 813 ret = trusty_read_vbootkey_enable_flag(&vboot); 814 if (ret) { 815 printf("Can't read verified-boot flag\n"); 816 return 1; 817 } 818 #endif 819 return vboot; 820 } 821 822 #ifdef CONFIG_FIT_IMAGE_POST_PROCESS 823 void board_fit_image_post_process(void **p_image, size_t *p_size) 824 { 825 /* Avoid overriding proccessed(overlay, hw-dtb, ...) kernel dtb */ 826 #ifdef CONFIG_USING_KERNEL_DTB 827 if (!fdt_check_header(*p_image) && !fdt_check_header(gd->fdt_blob)) { 828 *p_image = (void *)gd->fdt_blob; 829 *p_size = (size_t)fdt_totalsize(gd->fdt_blob); 830 } 831 #endif 832 } 833 #endif 834