xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/board.c (revision c4e6abcd5e33b08affcf6b9eb33af1294e1443a5) 
1 /*
2  * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <amp.h>
9 #include <android_bootloader.h>
10 #include <android_image.h>
11 #include <bidram.h>
12 #include <boot_rkimg.h>
13 #include <cli.h>
14 #include <clk.h>
15 #include <console.h>
16 #include <debug_uart.h>
17 #include <dm.h>
18 #include <dvfs.h>
19 #include <io-domain.h>
20 #include <image.h>
21 #include <key.h>
22 #include <memblk.h>
23 #include <misc.h>
24 #include <of_live.h>
25 #include <mtd_blk.h>
26 #include <ram.h>
27 #include <rockchip_debugger.h>
28 #include <syscon.h>
29 #include <sysmem.h>
30 #include <video_rockchip.h>
31 #include <asm/io.h>
32 #include <asm/gpio.h>
33 #include <dm/uclass-internal.h>
34 #include <dm/root.h>
35 #include <power/charge_display.h>
36 #include <power/regulator.h>
37 #include <optee_include/OpteeClientInterface.h>
38 #include <optee_include/OpteeClientApiLib.h>
39 #include <optee_include/tee_api_defines.h>
40 #include <asm/arch/boot_mode.h>
41 #include <asm/arch/clock.h>
42 #include <asm/arch/cpu.h>
43 #include <asm/arch/hotkey.h>
44 #include <asm/arch/param.h>
45 #include <asm/arch/periph.h>
46 #include <asm/arch/resource_img.h>
47 #include <asm/arch/rk_atags.h>
48 #include <asm/arch/vendor.h>
49 
50 DECLARE_GLOBAL_DATA_PTR;
51 
52 __weak int rk_board_late_init(void)
53 {
54 	return 0;
55 }
56 
57 __weak int rk_board_fdt_fixup(void *blob)
58 {
59 	return 0;
60 }
61 
62 __weak int soc_clk_dump(void)
63 {
64 	return 0;
65 }
66 
67 __weak int set_armclk_rate(void)
68 {
69 	return 0;
70 }
71 
72 __weak int rk_board_init(void)
73 {
74 	return 0;
75 }
76 
77 /*
78  * define serialno max length, the max length is 512 Bytes
79  * The remaining bytes are used to ensure that the first 512 bytes
80  * are valid when executing 'env_set("serial#", value)'.
81  */
82 #define VENDOR_SN_MAX	513
83 #define CPUID_LEN	0x10
84 #define CPUID_OFF	0x07
85 
86 static int rockchip_set_ethaddr(void)
87 {
88 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
89 	char buf[ARP_HLEN_ASCII + 1];
90 	u8 ethaddr[ARP_HLEN];
91 	int ret;
92 
93 	ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr));
94 	if (ret > 0 && is_valid_ethaddr(ethaddr)) {
95 		sprintf(buf, "%pM", ethaddr);
96 		env_set("ethaddr", buf);
97 	}
98 #endif
99 	return 0;
100 }
101 
102 static int rockchip_set_serialno(void)
103 {
104 	u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2];
105 	u8 cpuid[CPUID_LEN] = {0};
106 	char serialno_str[VENDOR_SN_MAX];
107 	int ret = 0, i;
108 	u64 serialno;
109 
110 	/* Read serial number from vendor storage part */
111 	memset(serialno_str, 0, VENDOR_SN_MAX);
112 
113 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
114 	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
115 	if (ret > 0) {
116 		i = strlen(serialno_str);
117 		for (; i > 0; i--) {
118 			if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') ||
119 			    (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') ||
120 			    (serialno_str[i] >= '0' && serialno_str[i] <= '9'))
121 				break;
122 		}
123 
124 		serialno_str[i + 1] = 0x0;
125 		env_set("serial#", serialno_str);
126 	} else {
127 #endif
128 #if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP)
129 		struct udevice *dev;
130 
131 		/* retrieve the device */
132 		if (IS_ENABLED(CONFIG_ROCKCHIP_EFUSE))
133 			ret = uclass_get_device_by_driver(UCLASS_MISC,
134 							  DM_GET_DRIVER(rockchip_efuse),
135 							  &dev);
136 		else
137 			ret = uclass_get_device_by_driver(UCLASS_MISC,
138 							  DM_GET_DRIVER(rockchip_otp),
139 							  &dev);
140 
141 		if (ret) {
142 			printf("%s: could not find efuse/otp device\n", __func__);
143 			return ret;
144 		}
145 
146 		/* read the cpu_id range from the efuses */
147 		ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid));
148 		if (ret) {
149 			printf("%s: read cpuid from efuse/otp failed, ret=%d\n",
150 			       __func__, ret);
151 			return ret;
152 		}
153 #else
154 		/* generate random cpuid */
155 		for (i = 0; i < CPUID_LEN; i++)
156 			cpuid[i] = (u8)(rand());
157 #endif
158 		/* Generate the serial number based on CPU ID */
159 		for (i = 0; i < 8; i++) {
160 			low[i] = cpuid[1 + (i << 1)];
161 			high[i] = cpuid[i << 1];
162 		}
163 
164 		serialno = crc32_no_comp(0, low, 8);
165 		serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
166 		snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
167 
168 		env_set("serial#", serialno_str);
169 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
170 	}
171 #endif
172 
173 	return ret;
174 }
175 
176 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
177 int fb_set_reboot_flag(void)
178 {
179 	printf("Setting reboot to fastboot flag ...\n");
180 	writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);
181 
182 	return 0;
183 }
184 #endif
185 
186 #ifdef CONFIG_ROCKCHIP_USB_BOOT
187 static int boot_from_udisk(void)
188 {
189 	struct blk_desc *desc;
190 	char *devtype;
191 	char *devnum;
192 
193 	devtype = env_get("devtype");
194 	devnum = env_get("devnum");
195 
196 	/* Booting priority: mmc1 > udisk */
197 	if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1"))
198 		return 0;
199 
200 	if (!run_command("usb start", -1)) {
201 		desc = blk_get_devnum_by_type(IF_TYPE_USB, 0);
202 		if (!desc) {
203 			printf("No usb device found\n");
204 			return -ENODEV;
205 		}
206 
207 		if (!run_command("rkimgtest usb 0", -1)) {
208 			rockchip_set_bootdev(desc);
209 			env_set("devtype", "usb");
210 			env_set("devnum", "0");
211 			printf("Boot from usb 0\n");
212 		} else {
213 			printf("No usb dev 0 found\n");
214 			return -ENODEV;
215 		}
216 	}
217 
218 	return 0;
219 }
220 #endif
221 
222 static void env_fixup(void)
223 {
224 	struct memblock mem;
225 	ulong u_addr_r;
226 	phys_size_t end;
227 	char *addr_r;
228 
229 #ifdef ENV_MEM_LAYOUT_SETTINGS1
230 	const char *env_addr0[] = {
231 		"scriptaddr", "pxefile_addr_r",
232 		"fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r",
233 	};
234 	const char *env_addr1[] = {
235 		"scriptaddr1", "pxefile_addr1_r",
236 		"fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r",
237 	};
238 	int i;
239 
240 	/* 128M is a typical ram size for most platform, so as default here */
241 	if (gd->ram_size <= SZ_128M) {
242 		/* Replace orignal xxx_addr_r */
243 		for (i = 0; i < ARRAY_SIZE(env_addr1); i++) {
244 			addr_r = env_get(env_addr1[i]);
245 			if (addr_r)
246 				env_set(env_addr0[i], addr_r);
247 		}
248 	}
249 #endif
250 	/* If BL32 is disabled, move kernel to lower address. */
251 	if (!(gd->flags & GD_FLG_BL32_ENABLED)) {
252 		addr_r = env_get("kernel_addr_no_bl32_r");
253 		if (addr_r)
254 			env_set("kernel_addr_r", addr_r);
255 
256 		/*
257 		 * 0x0a200000 and 0x08400000 are rockchip traditional address
258 		 * of BL32 and ramdisk:
259 		 *
260 		 * |------------|------------|
261 		 * |    BL32    |  ramdisk   |
262 		 * |------------|------------|
263 		 *
264 		 * Move ramdisk to BL32 address to fix sysmem alloc failed
265 		 * issue on the board with critical memory(ie. 256MB).
266 		 */
267 		if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) {
268 			u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
269 			if (u_addr_r == 0x0a200000)
270 				env_set("ramdisk_addr_r", "0x08400000");
271 		}
272 
273 	/* If BL32 is enlarged, move ramdisk right behind it */
274 	} else {
275 		mem = param_parse_optee_mem();
276 		end = mem.base + mem.size;
277 		u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
278 		if (u_addr_r >= mem.base && u_addr_r < end)
279 			env_set_hex("ramdisk_addr_r", end);
280 	}
281 }
282 
283 static void cmdline_handle(void)
284 {
285 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
286 	struct tag *t;
287 
288 	t = atags_get_tag(ATAG_PUB_KEY);
289 	if (t) {
290 		/* Pass if efuse/otp programmed */
291 		if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED)
292 			env_update("bootargs", "fuse.programmed=1");
293 		else
294 			env_update("bootargs", "fuse.programmed=0");
295 	}
296 #endif
297 }
298 
299 int board_late_init(void)
300 {
301 	rockchip_set_ethaddr();
302 	rockchip_set_serialno();
303 	setup_download_mode();
304 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
305 	setup_boot_mode();
306 #endif
307 #ifdef CONFIG_ROCKCHIP_USB_BOOT
308 	boot_from_udisk();
309 #endif
310 #ifdef CONFIG_DM_CHARGE_DISPLAY
311 	charge_display();
312 #endif
313 #ifdef CONFIG_DRM_ROCKCHIP
314 	rockchip_show_logo();
315 #endif
316 	env_fixup();
317 	soc_clk_dump();
318 	cmdline_handle();
319 
320 	return rk_board_late_init();
321 }
322 
323 static void early_download(void)
324 {
325 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
326 		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
327 	if (pwrkey_download_init())
328 		printf("Pwrkey download init failed\n");
329 #endif
330 
331 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
332 	if (is_hotkey(HK_BROM_DNL)) {
333 		printf("Enter bootrom download...");
334 		flushc();
335 		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
336 		do_reset(NULL, 0, 0, NULL);
337 		printf("failed!\n");
338 	}
339 #endif
340 }
341 
342 static void board_debug_init(void)
343 {
344 	if (!gd->serial.using_pre_serial)
345 		debug_uart_init();
346 
347 	if (tstc()) {
348 		gd->console_evt = getc();
349 		if (gd->console_evt <= 0x1a) /* 'z' */
350 			printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1);
351 	}
352 
353 	if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI))
354 		printf("Cmd interface: disabled\n");
355 }
356 
357 #ifdef CONFIG_MTD_BLK
358 static void board_mtd_blk_map_partitions(void)
359 {
360 	struct blk_desc *dev_desc;
361 
362 	dev_desc = rockchip_get_bootdev();
363 	if (dev_desc)
364 		mtd_blk_map_partitions(dev_desc);
365 }
366 #endif
367 
368 int board_init(void)
369 {
370 	board_debug_init();
371 
372 #ifdef DEBUG
373 	soc_clk_dump();
374 #endif
375 
376 #ifdef CONFIG_USING_KERNEL_DTB
377 #ifdef CONFIG_MTD_BLK
378 	board_mtd_blk_map_partitions();
379 #endif
380 	init_kernel_dtb();
381 #endif
382 	early_download();
383 
384 	/*
385 	 * pmucru isn't referenced on some platforms, so pmucru driver can't
386 	 * probe that the "assigned-clocks" is unused.
387 	 */
388 	clks_probe();
389 #ifdef CONFIG_DM_REGULATOR
390 	if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR)))
391 		debug("%s: Can't enable boot on regulator\n", __func__);
392 #endif
393 
394 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN
395 	io_domain_init();
396 #endif
397 
398 	set_armclk_rate();
399 
400 #ifdef CONFIG_DM_DVFS
401 	dvfs_init(true);
402 #endif
403 
404 	return rk_board_init();
405 }
406 
407 int interrupt_debugger_init(void)
408 {
409 #ifdef CONFIG_ROCKCHIP_DEBUGGER
410 	return rockchip_debugger_init();
411 #else
412 	return 0;
413 #endif
414 }
415 
416 int board_fdt_fixup(void *blob)
417 {
418 	/* Common fixup for DRM */
419 #ifdef CONFIG_DRM_ROCKCHIP
420 	rockchip_display_fixup(blob);
421 #endif
422 
423 	return rk_board_fdt_fixup(blob);
424 }
425 
426 #if defined(CONFIG_ARM64_BOOT_AARCH32) || !defined(CONFIG_ARM64)
427 /*
428  * Common for OP-TEE:
429  *	64-bit & 32-bit mode: share memory dcache is always enabled;
430  *
431  * Common for U-Boot:
432  *	64-bit mode: MMU table is static defined in rkxxx.c file, all memory
433  *		     regions are mapped. That's good to match OP-TEE MMU policy.
434  *
435  *	32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where
436  *		     the OP-TEE region has been reserved, so it can not be
437  *		     mapped(i.e. dcache is disabled). That's *NOT* good to match
438  *		     OP-TEE MMU policy.
439  *
440  * For the data coherence when communication between U-Boot and OP-TEE, U-Boot
441  * should follow OP-TEE MMU policy.
442  *
443  * So 32-bit mode U-Boot should map OP-TEE share memory as dcache enabled.
444  */
445 int board_initr_caches_fixup(void)
446 {
447 #ifdef CONFIG_OPTEE_CLIENT
448 	struct memblock mem;
449 
450 	mem.base = 0;
451 	mem.size = 0;
452 
453 	optee_get_shm_config(&mem.base, &mem.size);
454 	if (mem.size)
455 		mmu_set_region_dcache_behaviour(mem.base, mem.size,
456 						DCACHE_WRITEBACK);
457 #endif
458 	return 0;
459 }
460 #endif
461 
462 void arch_preboot_os(uint32_t bootm_state)
463 {
464 	if (bootm_state & BOOTM_STATE_OS_PREP)
465 		hotkey_run(HK_CLI_OS_PRE);
466 }
467 
468 void enable_caches(void)
469 {
470 	icache_enable();
471 	dcache_enable();
472 }
473 
474 #ifdef CONFIG_LMB
475 /*
476  * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize".
477  * This makes lmb_alloc_base() always alloc from tail of sdram.
478  * If we don't assign it, bi_dram[0] is used by default and it may cause
479  * lmb_alloc_base() fail when bi_dram[0] range is small.
480  */
481 void board_lmb_reserve(struct lmb *lmb)
482 {
483 	char bootm_mapsize[32];
484 	char bootm_low[32];
485 	u64 start, size;
486 	int i;
487 
488 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
489 		if (!gd->bd->bi_dram[i].size)
490 			break;
491 	}
492 
493 	start = gd->bd->bi_dram[i - 1].start;
494 	size = gd->bd->bi_dram[i - 1].size;
495 
496 	/*
497 	 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+),
498 	 * otherwise "Unable to handle kernel paging request at virtual address ...".
499 	 *
500 	 * So that we hope limit highest address at 768M, but there comes the the
501 	 * problem: ramdisk is a compressed image and it expands after descompress,
502 	 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...".
503 	 *
504 	 * We make a appointment that the highest memory address is 512MB, it
505 	 * makes lmb alloc safer.
506 	 */
507 #ifndef CONFIG_ARM64
508 	if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) {
509 		start = gd->bd->bi_dram[i - 2].start;
510 		size = gd->bd->bi_dram[i - 2].size;
511 	}
512 
513 	if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M))
514 		size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start;
515 #endif
516 	sprintf(bootm_low, "0x%llx", start);
517 	sprintf(bootm_mapsize, "0x%llx", size);
518 	env_set("bootm_low", bootm_low);
519 	env_set("bootm_mapsize", bootm_mapsize);
520 }
521 #endif
522 
523 #ifdef CONFIG_BIDRAM
524 int board_bidram_reserve(struct bidram *bidram)
525 {
526 	struct memblock mem;
527 	int ret;
528 
529 	/* ATF */
530 	mem = param_parse_atf_mem();
531 	ret = bidram_reserve(MEM_ATF, mem.base, mem.size);
532 	if (ret)
533 		return ret;
534 
535 	/* PSTORE/ATAGS/SHM */
536 	mem = param_parse_common_resv_mem();
537 	ret = bidram_reserve(MEM_SHM, mem.base, mem.size);
538 	if (ret)
539 		return ret;
540 
541 	/* OP-TEE */
542 	mem = param_parse_optee_mem();
543 	ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size);
544 	if (ret)
545 		return ret;
546 
547 	return 0;
548 }
549 
550 parse_fn_t board_bidram_parse_fn(void)
551 {
552 	return param_parse_ddr_mem;
553 }
554 #endif
555 
556 #ifdef CONFIG_ROCKCHIP_AMP
557 void cpu_secondary_init_r(void)
558 {
559 	amp_cpus_on();
560 }
561 #endif
562 
563 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
564     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
565 int board_init_f_init_serial(void)
566 {
567 	struct tag *t = atags_get_tag(ATAG_SERIAL);
568 
569 	if (t) {
570 		gd->serial.using_pre_serial = t->u.serial.enable;
571 		gd->serial.baudrate = t->u.serial.baudrate;
572 		gd->serial.addr = t->u.serial.addr;
573 		gd->serial.id = t->u.serial.id;
574 
575 		debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n",
576 		      __func__, gd->serial.using_pre_serial,
577 		      gd->serial.addr, gd->serial.baudrate,
578 		      gd->serial.id);
579 	}
580 
581 	return 0;
582 }
583 #endif
584 
585 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
586 #include <fdt_support.h>
587 #include <usb.h>
588 #include <usb/dwc2_udc.h>
589 
590 static struct dwc2_plat_otg_data otg_data = {
591 	.rx_fifo_sz	= 512,
592 	.np_tx_fifo_sz	= 16,
593 	.tx_fifo_sz	= 128,
594 };
595 
596 int board_usb_init(int index, enum usb_init_type init)
597 {
598 	const void *blob = gd->fdt_blob;
599 	const fdt32_t *reg;
600 	fdt_addr_t addr;
601 	int node;
602 
603 	/* find the usb_otg node */
604 	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
605 
606 retry:
607 	if (node > 0) {
608 		reg = fdt_getprop(blob, node, "reg", NULL);
609 		if (!reg)
610 			return -EINVAL;
611 
612 		addr = fdt_translate_address(blob, node, reg);
613 		if (addr == OF_BAD_ADDR) {
614 			pr_err("Not found usb_otg address\n");
615 			return -EINVAL;
616 		}
617 
618 #if defined(CONFIG_ROCKCHIP_RK3288)
619 		if (addr != 0xff580000) {
620 			node = fdt_node_offset_by_compatible(blob, node,
621 							     "snps,dwc2");
622 			goto retry;
623 		}
624 #endif
625 	} else {
626 		/*
627 		 * With kernel dtb support, rk3288 dwc2 otg node
628 		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
629 		 * with the compatible "rockchip,rk3288_usb20_otg",
630 		 * and rk3368 also use the "dwc_otg_310" driver with
631 		 * the compatible "rockchip,rk3368-usb".
632 		 */
633 #if defined(CONFIG_ROCKCHIP_RK3288)
634 		node = fdt_node_offset_by_compatible(blob, -1,
635 				"rockchip,rk3288_usb20_otg");
636 #elif defined(CONFIG_ROCKCHIP_RK3368)
637 		node = fdt_node_offset_by_compatible(blob, -1,
638 				"rockchip,rk3368-usb");
639 #endif
640 		if (node > 0) {
641 			goto retry;
642 		} else {
643 			pr_err("Not found usb_otg device\n");
644 			return -ENODEV;
645 		}
646 	}
647 
648 	otg_data.regs_otg = (uintptr_t)addr;
649 
650 	return dwc2_udc_probe(&otg_data);
651 }
652 
653 int board_usb_cleanup(int index, enum usb_init_type init)
654 {
655 	return 0;
656 }
657 #endif
658 
659 static void bootm_no_reloc(void)
660 {
661 	char *ramdisk_high;
662 	char *fdt_high;
663 
664 	if (!env_get_yesno("bootm-no-reloc"))
665 		return;
666 
667 	ramdisk_high = env_get("initrd_high");
668 	fdt_high = env_get("fdt_high");
669 
670 	if (!fdt_high) {
671 		env_set_hex("fdt_high", -1UL);
672 		printf("Fdt ");
673 	}
674 
675 	if (!ramdisk_high) {
676 		env_set_hex("initrd_high", -1UL);
677 		printf("Ramdisk ");
678 	}
679 
680 	if (!fdt_high || !ramdisk_high)
681 		printf("skip relocation\n");
682 }
683 
684 int bootm_board_start(void)
685 {
686 	/*
687 	 * print console record data
688 	 *
689 	 * On some rockchip platforms, uart debug and sdmmc pin are multiplex.
690 	 * If boot from sdmmc mode, the console data would be record in buffer,
691 	 * we switch to uart debug function in order to print it after loading
692 	 * images.
693 	 */
694 #if defined(CONFIG_CONSOLE_RECORD)
695 	if (!strcmp("mmc", env_get("devtype")) &&
696 	    !strcmp("1", env_get("devnum"))) {
697 		printf("IOMUX: sdmmc => uart debug");
698 		pinctrl_select_state(gd->cur_serial_dev, "default");
699 		console_record_print_purge();
700 	}
701 #endif
702 	/* disable bootm relcation to save boot time */
703 	bootm_no_reloc();
704 
705 	/* sysmem */
706 	hotkey_run(HK_SYSMEM);
707 	sysmem_overflow_check();
708 
709 	return 0;
710 }
711 
712 /*
713  * Implement it to support CLI command:
714  *   - Android: bootm [aosp addr]
715  *   - FIT:     bootm [fit addr]
716  *   - uImage:  bootm [uimage addr]
717  *
718  * Purpose:
719  *   - The original bootm command args require fdt addr on AOSP,
720  *     which is not flexible on rockchip boot/recovery.img.
721  *   - Take Android/FIT/uImage image into sysmem management to avoid image
722  *     memory overlap.
723  */
724 #if defined(CONFIG_ANDROID_BOOTLOADER) ||	\
725 	defined(CONFIG_ROCKCHIP_FIT_IMAGE) ||	\
726 	defined(CONFIG_ROCKCHIP_UIMAGE)
727 int board_do_bootm(int argc, char * const argv[])
728 {
729 	int format;
730 	void *img;
731 
732 	if (argc != 2)
733 		return 0;
734 
735 	img = (void *)simple_strtoul(argv[1], NULL, 16);
736 	format = (genimg_get_format(img));
737 
738 	/* Android */
739 #ifdef CONFIG_ANDROID_BOOT_IMAGE
740 	if (format == IMAGE_FORMAT_ANDROID) {
741 		struct andr_img_hdr *hdr;
742 		ulong load_addr;
743 		ulong size;
744 		int ret;
745 
746 		hdr = (struct andr_img_hdr *)img;
747 		printf("BOOTM: transferring to board Android\n");
748 
749 #ifdef CONFIG_USING_KERNEL_DTB
750 		sysmem_free((phys_addr_t)gd->fdt_blob);
751 		/* erase magic */
752 		fdt_set_magic((void *)gd->fdt_blob, ~0);
753 		gd->fdt_blob = NULL;
754 #endif
755 		load_addr = env_get_ulong("kernel_addr_r", 16, 0);
756 		load_addr -= hdr->page_size;
757 		size = android_image_get_end(hdr) - (ulong)hdr;
758 
759 		if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size))
760 			return -ENOMEM;
761 
762 		ret = android_image_memcpy_separate(hdr, &load_addr);
763 		if (ret) {
764 			printf("board do bootm failed, ret=%d\n", ret);
765 			return ret;
766 		}
767 
768 		return android_bootloader_boot_kernel(load_addr);
769 	}
770 #endif
771 
772 	/* FIT */
773 #if IMAGE_ENABLE_FIT
774 	if (format == IMAGE_FORMAT_FIT) {
775 		char boot_cmd[64];
776 
777 		printf("BOOTM: transferring to board FIT\n");
778 		snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]);
779 		return run_command(boot_cmd, 0);
780 	}
781 #endif
782 
783 	/* uImage */
784 #if defined(CONFIG_IMAGE_FORMAT_LEGACY)
785 	if (format == IMAGE_FORMAT_LEGACY &&
786 	    image_get_type(img) == IH_TYPE_MULTI) {
787 		char boot_cmd[64];
788 
789 		printf("BOOTM: transferring to board uImage\n");
790 		snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]);
791 		return run_command(boot_cmd, 0);
792 	}
793 #endif
794 
795 	return 0;
796 }
797 #endif
798 
799 void autoboot_command_fail_handle(void)
800 {
801 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
802 #ifdef CONFIG_ANDROID_AB
803 	run_command("fastboot usb 0;", 0);  /* use fastboot to ative slot */
804 #else
805 	run_command("rockusb 0 ${devtype} ${devnum}", 0);
806 	run_command("fastboot usb 0;", 0);
807 #endif
808 #endif
809 }
810 
811 #ifdef CONFIG_FIT_ROLLBACK_PROTECT
812 
813 #define FIT_ROLLBACK_INDEX_LOCATION	0x66697472	/* "fitr" */
814 
815 int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
816 {
817 #ifdef CONFIG_OPTEE_CLIENT
818 	u64 index;
819 	int ret;
820 
821 	ret = trusty_read_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, &index);
822 	if (ret) {
823 		if (ret != TEE_ERROR_ITEM_NOT_FOUND)
824 			return ret;
825 
826 		*otp_index = fit_index;
827 		printf("Initial otp index as %d\n", fit_index);
828 	}
829 
830 	*otp_index = index;
831 #else
832 	*otp_index = 0;
833 #endif
834 
835 	return 0;
836 }
837 
838 static int fit_write_trusty_rollback_index(u32 trusty_index)
839 {
840 	if (!trusty_index)
841 		return 0;
842 
843 	return trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION,
844 					   (u64)trusty_index);
845 }
846 #endif
847 
848 void board_quiesce_devices(void *images)
849 {
850 	hotkey_run(HK_CMDLINE);
851 	hotkey_run(HK_CLI_OS_GO);
852 
853 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
854 	/* Destroy atags makes next warm boot safer */
855 	atags_destroy();
856 #endif
857 
858 #ifdef CONFIG_FIT_ROLLBACK_PROTECT
859 	int ret;
860 
861 	ret = fit_write_trusty_rollback_index(gd->rollback_index);
862 	if (ret) {
863 		panic("Failed to write fit rollback index %d, ret=%d",
864 		      gd->rollback_index, ret);
865 	}
866 #endif
867 
868 #ifdef CONFIG_ROCKCHIP_HW_DECOMPRESS
869 	misc_decompress_cleanup();
870 #endif
871 }
872