xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/board.c (revision b283d2ae7bf9dec650d82c6b10cb92ddd9d9ce5d)
1 /*
2  * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 #include <common.h>
7 #include <clk.h>
8 #include <dm.h>
9 #include <ram.h>
10 #include <syscon.h>
11 #include <asm/io.h>
12 #include <asm/gpio.h>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/periph.h>
15 #include <asm/arch/boot_mode.h>
16 #ifdef CONFIG_DM_CHARGE_DISPLAY
17 #include <power/charge_display.h>
18 #endif
19 #ifdef CONFIG_DM_REGULATOR
20 #include <power/regulator.h>
21 #endif
22 #ifdef CONFIG_DRM_ROCKCHIP
23 #include <video_rockchip.h>
24 #endif
25 
26 DECLARE_GLOBAL_DATA_PTR;
27 
28 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
29 int fb_set_reboot_flag(void)
30 {
31 	printf("Setting reboot to fastboot flag ...\n");
32 	/* Set boot mode to fastboot */
33 	writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);
34 
35 	return 0;
36 }
37 
38 #define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
39 static int fastboot_key_pressed(void)
40 {
41 	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
42 	gpio_direction_input(FASTBOOT_KEY_GPIO);
43 	return !gpio_get_value(FASTBOOT_KEY_GPIO);
44 }
45 #endif
46 
47 #ifdef CONFIG_DM_CHARGE_DISPLAY
48 static int charge_display(void)
49 {
50 	int ret;
51 	struct udevice *dev;
52 
53 	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
54 	if (ret) {
55 		if (ret != -ENODEV) {
56 			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
57 			return ret;
58 		}
59 		return 0;
60 	}
61 
62 	return charge_display_show(dev);
63 }
64 #endif
65 
66 __weak int rk_board_init(void)
67 {
68 	return 0;
69 }
70 
71 __weak int rk_board_late_init(void)
72 {
73 	return 0;
74 }
75 
76 int board_late_init(void)
77 {
78 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
79 	if (fastboot_key_pressed()) {
80 		printf("fastboot key pressed!\n");
81 		fb_set_reboot_flag();
82 	}
83 #endif
84 
85 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
86 	setup_boot_mode();
87 #endif
88 
89 #ifdef CONFIG_DM_CHARGE_DISPLAY
90 	charge_display();
91 #endif
92 
93 #ifdef CONFIG_DRM_ROCKCHIP
94 	rockchip_show_logo();
95 #endif
96 
97 	return rk_board_late_init();
98 }
99 
100 int board_init(void)
101 {
102 	int ret;
103 
104 #ifdef CONFIG_DM_REGULATOR
105 	ret = regulators_enable_boot_on(false);
106 	if (ret)
107 		debug("%s: Cannot enable boot on regulator\n", __func__);
108 #endif
109 
110 	return rk_board_init();
111 }
112 
113 #if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
114 void enable_caches(void)
115 {
116 	/* Enable D-cache. I-cache is already enabled in start.S */
117 	dcache_enable();
118 }
119 #endif
120 
121 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
122 #include <usb.h>
123 #include <usb/dwc2_udc.h>
124 
125 static struct dwc2_plat_otg_data otg_data = {
126 	.rx_fifo_sz	= 512,
127 	.np_tx_fifo_sz	= 16,
128 	.tx_fifo_sz	= 128,
129 };
130 
131 int board_usb_init(int index, enum usb_init_type init)
132 {
133 	int node;
134 	const char *mode;
135 	bool matched = false;
136 	const void *blob = gd->fdt_blob;
137 
138 	/* find the usb_otg node */
139 	node = fdt_node_offset_by_compatible(blob, -1,
140 					"snps,dwc2");
141 
142 	while (node > 0) {
143 		mode = fdt_getprop(blob, node, "dr_mode", NULL);
144 		if (mode && strcmp(mode, "otg") == 0) {
145 			matched = true;
146 			break;
147 		}
148 
149 		node = fdt_node_offset_by_compatible(blob, node,
150 					"snps,dwc2");
151 	}
152 	if (!matched) {
153 		debug("Not found usb_otg device\n");
154 		return -ENODEV;
155 	}
156 	otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
157 
158 	return dwc2_udc_probe(&otg_data);
159 }
160 
161 int board_usb_cleanup(int index, enum usb_init_type init)
162 {
163 	return 0;
164 }
165 #endif
166