1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <amp.h> 9 #include <android_bootloader.h> 10 #include <android_image.h> 11 #include <bidram.h> 12 #include <boot_rkimg.h> 13 #include <cli.h> 14 #include <clk.h> 15 #include <console.h> 16 #include <debug_uart.h> 17 #include <dm.h> 18 #include <dvfs.h> 19 #include <io-domain.h> 20 #include <image.h> 21 #include <key.h> 22 #include <memblk.h> 23 #include <misc.h> 24 #include <of_live.h> 25 #include <mtd_blk.h> 26 #include <ram.h> 27 #include <rockchip_debugger.h> 28 #include <syscon.h> 29 #include <sysmem.h> 30 #include <video_rockchip.h> 31 #include <asm/io.h> 32 #include <asm/gpio.h> 33 #include <dm/uclass-internal.h> 34 #include <dm/root.h> 35 #include <power/charge_display.h> 36 #include <power/regulator.h> 37 #include <optee_include/OpteeClientInterface.h> 38 #include <optee_include/OpteeClientApiLib.h> 39 #include <optee_include/tee_api_defines.h> 40 #include <asm/arch/boot_mode.h> 41 #include <asm/arch/clock.h> 42 #include <asm/arch/cpu.h> 43 #include <asm/arch/hotkey.h> 44 #include <asm/arch/param.h> 45 #include <asm/arch/periph.h> 46 #include <asm/arch/resource_img.h> 47 #include <asm/arch/rk_atags.h> 48 #include <asm/arch/vendor.h> 49 #ifdef CONFIG_ROCKCHIP_EINK_DISPLAY 50 #include <rk_eink.h> 51 #endif 52 DECLARE_GLOBAL_DATA_PTR; 53 54 __weak int rk_board_late_init(void) 55 { 56 return 0; 57 } 58 59 __weak int rk_board_fdt_fixup(void *blob) 60 { 61 return 0; 62 } 63 64 __weak int soc_clk_dump(void) 65 { 66 return 0; 67 } 68 69 __weak int set_armclk_rate(void) 70 { 71 return 0; 72 } 73 74 __weak int rk_board_init(void) 75 { 76 return 0; 77 } 78 79 /* 80 * define serialno max length, the max length is 512 Bytes 81 * The remaining bytes are used to ensure that the first 512 bytes 82 * are valid when executing 'env_set("serial#", value)'. 83 */ 84 #define VENDOR_SN_MAX 513 85 #define CPUID_LEN 0x10 86 #define CPUID_OFF 0x07 87 88 #define MAX_ETHERNET 0x2 89 90 static int rockchip_set_ethaddr(void) 91 { 92 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 93 char buf[ARP_HLEN_ASCII + 1], mac[16]; 94 u8 ethaddr[ARP_HLEN * MAX_ETHERNET] = {0}; 95 int ret, i; 96 bool need_write = false, randomed = false; 97 98 ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr)); 99 for (i = 0; i < MAX_ETHERNET; i++) { 100 if (ret <= 0 || !is_valid_ethaddr(ðaddr[i * ARP_HLEN])) { 101 if (!randomed) { 102 net_random_ethaddr(ðaddr[i * ARP_HLEN]); 103 randomed = true; 104 } else { 105 if (i > 0) { 106 memcpy(ðaddr[i * ARP_HLEN], 107 ðaddr[(i - 1) * ARP_HLEN], 108 ARP_HLEN); 109 ethaddr[i * ARP_HLEN] |= 0x02; 110 ethaddr[i * ARP_HLEN] += (i << 2); 111 } 112 } 113 114 need_write = true; 115 } 116 117 if (is_valid_ethaddr(ðaddr[i * ARP_HLEN])) { 118 sprintf(buf, "%pM", ðaddr[i * ARP_HLEN]); 119 if (i == 0) 120 memcpy(mac, "ethaddr", sizeof("ethaddr")); 121 else 122 sprintf(mac, "eth%daddr", i); 123 env_set(mac, buf); 124 } 125 } 126 127 if (need_write) { 128 ret = vendor_storage_write(VENDOR_LAN_MAC_ID, 129 ethaddr, sizeof(ethaddr)); 130 if (ret < 0) 131 printf("%s: vendor_storage_write failed %d\n", 132 __func__, ret); 133 } 134 #endif 135 136 return 0; 137 } 138 139 static int rockchip_set_serialno(void) 140 { 141 u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; 142 u8 cpuid[CPUID_LEN] = {0}; 143 char serialno_str[VENDOR_SN_MAX]; 144 int ret = 0, i; 145 u64 serialno; 146 147 /* Read serial number from vendor storage part */ 148 memset(serialno_str, 0, VENDOR_SN_MAX); 149 150 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 151 ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1)); 152 if (ret > 0) { 153 i = strlen(serialno_str); 154 for (; i > 0; i--) { 155 if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') || 156 (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') || 157 (serialno_str[i] >= '0' && serialno_str[i] <= '9')) 158 break; 159 } 160 161 serialno_str[i + 1] = 0x0; 162 env_set("serial#", serialno_str); 163 } else { 164 #endif 165 #if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP) 166 struct udevice *dev; 167 168 /* retrieve the device */ 169 if (IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)) 170 ret = uclass_get_device_by_driver(UCLASS_MISC, 171 DM_GET_DRIVER(rockchip_efuse), 172 &dev); 173 else 174 ret = uclass_get_device_by_driver(UCLASS_MISC, 175 DM_GET_DRIVER(rockchip_otp), 176 &dev); 177 178 if (ret) { 179 printf("%s: could not find efuse/otp device\n", __func__); 180 return ret; 181 } 182 183 /* read the cpu_id range from the efuses */ 184 ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid)); 185 if (ret) { 186 printf("%s: read cpuid from efuse/otp failed, ret=%d\n", 187 __func__, ret); 188 return ret; 189 } 190 #else 191 /* generate random cpuid */ 192 for (i = 0; i < CPUID_LEN; i++) 193 cpuid[i] = (u8)(rand()); 194 #endif 195 /* Generate the serial number based on CPU ID */ 196 for (i = 0; i < 8; i++) { 197 low[i] = cpuid[1 + (i << 1)]; 198 high[i] = cpuid[i << 1]; 199 } 200 201 serialno = crc32_no_comp(0, low, 8); 202 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; 203 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); 204 205 env_set("serial#", serialno_str); 206 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 207 } 208 #endif 209 210 return ret; 211 } 212 213 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) 214 int fb_set_reboot_flag(void) 215 { 216 printf("Setting reboot to fastboot flag ...\n"); 217 writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); 218 219 return 0; 220 } 221 #endif 222 223 #ifdef CONFIG_ROCKCHIP_USB_BOOT 224 static int boot_from_udisk(void) 225 { 226 struct blk_desc *desc; 227 char *devtype; 228 char *devnum; 229 230 devtype = env_get("devtype"); 231 devnum = env_get("devnum"); 232 233 /* Booting priority: mmc1 > udisk */ 234 if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1")) 235 return 0; 236 237 if (!run_command("usb start", -1)) { 238 desc = blk_get_devnum_by_type(IF_TYPE_USB, 0); 239 if (!desc) { 240 printf("No usb device found\n"); 241 return -ENODEV; 242 } 243 244 if (!run_command("rkimgtest usb 0", -1)) { 245 rockchip_set_bootdev(desc); 246 env_set("devtype", "usb"); 247 env_set("devnum", "0"); 248 printf("Boot from usb 0\n"); 249 } else { 250 printf("No usb dev 0 found\n"); 251 return -ENODEV; 252 } 253 } 254 255 return 0; 256 } 257 #endif 258 259 static void env_fixup(void) 260 { 261 struct memblock mem; 262 ulong u_addr_r; 263 phys_size_t end; 264 char *addr_r; 265 266 #ifdef ENV_MEM_LAYOUT_SETTINGS1 267 const char *env_addr0[] = { 268 "scriptaddr", "pxefile_addr_r", 269 "fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r", 270 }; 271 const char *env_addr1[] = { 272 "scriptaddr1", "pxefile_addr1_r", 273 "fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r", 274 }; 275 int i; 276 277 /* 128M is a typical ram size for most platform, so as default here */ 278 if (gd->ram_size <= SZ_128M) { 279 /* Replace orignal xxx_addr_r */ 280 for (i = 0; i < ARRAY_SIZE(env_addr1); i++) { 281 addr_r = env_get(env_addr1[i]); 282 if (addr_r) 283 env_set(env_addr0[i], addr_r); 284 } 285 } 286 #endif 287 /* No BL32 ? */ 288 if (!(gd->flags & GD_FLG_BL32_ENABLED)) { 289 /* 290 * [1] Move kernel to lower address if possible. 291 */ 292 addr_r = env_get("kernel_addr_no_low_bl32_r"); 293 if (addr_r) 294 env_set("kernel_addr_r", addr_r); 295 296 /* 297 * [2] Move ramdisk at BL32 position if need. 298 * 299 * 0x0a200000 and 0x08400000 are rockchip traditional address 300 * of BL32 and ramdisk: 301 * 302 * |------------|------------| 303 * | BL32 | ramdisk | 304 * |------------|------------| 305 * 306 * Move ramdisk to BL32 address to fix sysmem alloc failed 307 * issue on the board with critical memory(ie. 256MB). 308 */ 309 if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) { 310 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 311 if (u_addr_r == 0x0a200000) 312 env_set("ramdisk_addr_r", "0x08400000"); 313 } 314 } else { 315 mem = param_parse_optee_mem(); 316 317 /* 318 * [1] Move kernel forward if possible. 319 */ 320 if (mem.base > SZ_128M) { 321 addr_r = env_get("kernel_addr_no_low_bl32_r"); 322 if (addr_r) 323 env_set("kernel_addr_r", addr_r); 324 } 325 326 /* 327 * [2] Move ramdisk backward if optee enlarge. 328 */ 329 end = mem.base + mem.size; 330 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 331 if (u_addr_r >= mem.base && u_addr_r < end) 332 env_set_hex("ramdisk_addr_r", end); 333 } 334 } 335 336 static void cmdline_handle(void) 337 { 338 struct blk_desc *dev_desc; 339 340 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 341 struct tag *t; 342 343 t = atags_get_tag(ATAG_PUB_KEY); 344 if (t) { 345 /* Pass if efuse/otp programmed */ 346 if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED) 347 env_update("bootargs", "fuse.programmed=1"); 348 else 349 env_update("bootargs", "fuse.programmed=0"); 350 } 351 #endif 352 dev_desc = rockchip_get_bootdev(); 353 if (!dev_desc) 354 return; 355 356 if (get_bcb_recovery_msg() == BCB_MSG_RECOVERY_RK_FWUPDATE) { 357 if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 1) 358 env_update("bootargs", "sdfwupdate"); 359 else if (dev_desc->if_type == IF_TYPE_USB && dev_desc->devnum == 0) 360 env_update("bootargs", "usbfwupdate"); 361 } 362 } 363 364 int board_late_init(void) 365 { 366 rockchip_set_ethaddr(); 367 rockchip_set_serialno(); 368 setup_download_mode(); 369 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 370 setup_boot_mode(); 371 #endif 372 #ifdef CONFIG_AMP 373 amp_cpus_on(); 374 #endif 375 #ifdef CONFIG_ROCKCHIP_USB_BOOT 376 boot_from_udisk(); 377 #endif 378 #ifdef CONFIG_DM_CHARGE_DISPLAY 379 charge_display(); 380 #endif 381 #ifdef CONFIG_DRM_ROCKCHIP 382 rockchip_show_logo(); 383 #endif 384 #ifdef CONFIG_ROCKCHIP_EINK_DISPLAY 385 rockchip_eink_show_uboot_logo(); 386 #endif 387 env_fixup(); 388 soc_clk_dump(); 389 cmdline_handle(); 390 391 return rk_board_late_init(); 392 } 393 394 static void early_download(void) 395 { 396 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \ 397 (CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0) 398 if (pwrkey_download_init()) 399 printf("Pwrkey download init failed\n"); 400 #endif 401 402 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 403 if (is_hotkey(HK_BROM_DNL)) { 404 printf("Enter bootrom download..."); 405 flushc(); 406 writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); 407 do_reset(NULL, 0, 0, NULL); 408 printf("failed!\n"); 409 } 410 #endif 411 } 412 413 static void board_debug_init(void) 414 { 415 if (!gd->serial.using_pre_serial && 416 !(gd->flags & GD_FLG_DISABLE_CONSOLE)) 417 debug_uart_init(); 418 419 if (tstc()) { 420 gd->console_evt = getc(); 421 if (gd->console_evt <= 0x1a) /* 'z' */ 422 printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1); 423 } 424 425 if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI)) 426 printf("Cmd interface: disabled\n"); 427 } 428 429 #ifdef CONFIG_MTD_BLK 430 static void board_mtd_blk_map_partitions(void) 431 { 432 struct blk_desc *dev_desc; 433 434 dev_desc = rockchip_get_bootdev(); 435 if (dev_desc) 436 mtd_blk_map_partitions(dev_desc); 437 } 438 #endif 439 440 int board_init(void) 441 { 442 board_debug_init(); 443 444 #ifdef DEBUG 445 soc_clk_dump(); 446 #endif 447 448 #ifdef CONFIG_USING_KERNEL_DTB 449 #ifdef CONFIG_MTD_BLK 450 board_mtd_blk_map_partitions(); 451 #endif 452 init_kernel_dtb(); 453 #endif 454 early_download(); 455 456 /* 457 * pmucru isn't referenced on some platforms, so pmucru driver can't 458 * probe that the "assigned-clocks" is unused. 459 */ 460 clks_probe(); 461 #ifdef CONFIG_DM_REGULATOR 462 if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR))) 463 debug("%s: Can't enable boot on regulator\n", __func__); 464 #endif 465 466 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN 467 io_domain_init(); 468 #endif 469 470 set_armclk_rate(); 471 472 #ifdef CONFIG_DM_DVFS 473 dvfs_init(true); 474 #endif 475 476 return rk_board_init(); 477 } 478 479 int interrupt_debugger_init(void) 480 { 481 #ifdef CONFIG_ROCKCHIP_DEBUGGER 482 return rockchip_debugger_init(); 483 #else 484 return 0; 485 #endif 486 } 487 488 int board_fdt_fixup(void *blob) 489 { 490 /* Common fixup for DRM */ 491 #ifdef CONFIG_DRM_ROCKCHIP 492 rockchip_display_fixup(blob); 493 #endif 494 495 return rk_board_fdt_fixup(blob); 496 } 497 498 #if defined(CONFIG_ARM64_BOOT_AARCH32) || !defined(CONFIG_ARM64) 499 /* 500 * Common for OP-TEE: 501 * 64-bit & 32-bit mode: share memory dcache is always enabled; 502 * 503 * Common for U-Boot: 504 * 64-bit mode: MMU table is static defined in rkxxx.c file, all memory 505 * regions are mapped. That's good to match OP-TEE MMU policy. 506 * 507 * 32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where 508 * the OP-TEE region has been reserved, so it can not be 509 * mapped(i.e. dcache is disabled). That's *NOT* good to match 510 * OP-TEE MMU policy. 511 * 512 * For the data coherence when communication between U-Boot and OP-TEE, U-Boot 513 * should follow OP-TEE MMU policy. 514 * 515 * So 32-bit mode U-Boot should map OP-TEE share memory as dcache enabled. 516 */ 517 int board_initr_caches_fixup(void) 518 { 519 #ifdef CONFIG_OPTEE_CLIENT 520 struct memblock mem; 521 522 mem.base = 0; 523 mem.size = 0; 524 525 optee_get_shm_config(&mem.base, &mem.size); 526 if (mem.size) 527 mmu_set_region_dcache_behaviour(mem.base, mem.size, 528 DCACHE_WRITEBACK); 529 #endif 530 return 0; 531 } 532 #endif 533 534 void arch_preboot_os(uint32_t bootm_state) 535 { 536 if (bootm_state & BOOTM_STATE_OS_PREP) 537 hotkey_run(HK_CLI_OS_PRE); 538 } 539 540 void enable_caches(void) 541 { 542 icache_enable(); 543 dcache_enable(); 544 } 545 546 #ifdef CONFIG_LMB 547 /* 548 * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize". 549 * This makes lmb_alloc_base() always alloc from tail of sdram. 550 * If we don't assign it, bi_dram[0] is used by default and it may cause 551 * lmb_alloc_base() fail when bi_dram[0] range is small. 552 */ 553 void board_lmb_reserve(struct lmb *lmb) 554 { 555 char bootm_mapsize[32]; 556 char bootm_low[32]; 557 u64 start, size; 558 int i; 559 560 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 561 if (!gd->bd->bi_dram[i].size) 562 break; 563 } 564 565 start = gd->bd->bi_dram[i - 1].start; 566 size = gd->bd->bi_dram[i - 1].size; 567 568 /* 569 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+), 570 * otherwise "Unable to handle kernel paging request at virtual address ...". 571 * 572 * So that we hope limit highest address at 768M, but there comes the the 573 * problem: ramdisk is a compressed image and it expands after descompress, 574 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...". 575 * 576 * We make a appointment that the highest memory address is 512MB, it 577 * makes lmb alloc safer. 578 */ 579 #ifndef CONFIG_ARM64 580 if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) { 581 start = gd->bd->bi_dram[i - 2].start; 582 size = gd->bd->bi_dram[i - 2].size; 583 } 584 585 if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) 586 size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start; 587 #endif 588 sprintf(bootm_low, "0x%llx", start); 589 sprintf(bootm_mapsize, "0x%llx", size); 590 env_set("bootm_low", bootm_low); 591 env_set("bootm_mapsize", bootm_mapsize); 592 } 593 #endif 594 595 #ifdef CONFIG_BIDRAM 596 int board_bidram_reserve(struct bidram *bidram) 597 { 598 struct memblock mem; 599 int ret; 600 601 /* ATF */ 602 mem = param_parse_atf_mem(); 603 ret = bidram_reserve(MEM_ATF, mem.base, mem.size); 604 if (ret) 605 return ret; 606 607 /* PSTORE/ATAGS/SHM */ 608 mem = param_parse_common_resv_mem(); 609 ret = bidram_reserve(MEM_SHM, mem.base, mem.size); 610 if (ret) 611 return ret; 612 613 /* OP-TEE */ 614 mem = param_parse_optee_mem(); 615 ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size); 616 if (ret) 617 return ret; 618 619 return 0; 620 } 621 622 parse_fn_t board_bidram_parse_fn(void) 623 { 624 return param_parse_ddr_mem; 625 } 626 #endif 627 628 int board_init_f_boot_flags(void) 629 { 630 int boot_flags = 0; 631 632 /* pre-loader serial */ 633 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \ 634 defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) 635 struct tag *t; 636 637 t = atags_get_tag(ATAG_SERIAL); 638 if (t) { 639 gd->serial.using_pre_serial = 1; 640 gd->serial.enable = t->u.serial.enable; 641 gd->serial.baudrate = t->u.serial.baudrate; 642 gd->serial.addr = t->u.serial.addr; 643 gd->serial.id = t->u.serial.id; 644 gd->baudrate = CONFIG_BAUDRATE; 645 if (!t->u.serial.enable) 646 boot_flags |= GD_FLG_DISABLE_CONSOLE; 647 debug("preloader: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n", 648 gd->serial.enable, gd->serial.addr, 649 gd->serial.baudrate, gd->serial.id); 650 } else 651 #endif 652 { 653 gd->baudrate = CONFIG_BAUDRATE; 654 gd->serial.baudrate = CONFIG_BAUDRATE; 655 gd->serial.addr = CONFIG_DEBUG_UART_BASE; 656 } 657 658 /* The highest priority to turn off (override) console */ 659 #if defined(CONFIG_DISABLE_CONSOLE) 660 boot_flags |= GD_FLG_DISABLE_CONSOLE; 661 #endif 662 663 return boot_flags; 664 } 665 666 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 667 #include <fdt_support.h> 668 #include <usb.h> 669 #include <usb/dwc2_udc.h> 670 671 static struct dwc2_plat_otg_data otg_data = { 672 .rx_fifo_sz = 512, 673 .np_tx_fifo_sz = 16, 674 .tx_fifo_sz = 128, 675 }; 676 677 int board_usb_init(int index, enum usb_init_type init) 678 { 679 const void *blob = gd->fdt_blob; 680 const fdt32_t *reg; 681 fdt_addr_t addr; 682 int node; 683 684 /* find the usb_otg node */ 685 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); 686 687 retry: 688 if (node > 0) { 689 reg = fdt_getprop(blob, node, "reg", NULL); 690 if (!reg) 691 return -EINVAL; 692 693 addr = fdt_translate_address(blob, node, reg); 694 if (addr == OF_BAD_ADDR) { 695 pr_err("Not found usb_otg address\n"); 696 return -EINVAL; 697 } 698 699 #if defined(CONFIG_ROCKCHIP_RK3288) 700 if (addr != 0xff580000) { 701 node = fdt_node_offset_by_compatible(blob, node, 702 "snps,dwc2"); 703 goto retry; 704 } 705 #endif 706 } else { 707 /* 708 * With kernel dtb support, rk3288 dwc2 otg node 709 * use the rockchip legacy dwc2 driver "dwc_otg_310" 710 * with the compatible "rockchip,rk3288_usb20_otg", 711 * and rk3368 also use the "dwc_otg_310" driver with 712 * the compatible "rockchip,rk3368-usb". 713 */ 714 #if defined(CONFIG_ROCKCHIP_RK3288) 715 node = fdt_node_offset_by_compatible(blob, -1, 716 "rockchip,rk3288_usb20_otg"); 717 #elif defined(CONFIG_ROCKCHIP_RK3368) 718 node = fdt_node_offset_by_compatible(blob, -1, 719 "rockchip,rk3368-usb"); 720 #endif 721 if (node > 0) { 722 goto retry; 723 } else { 724 pr_err("Not found usb_otg device\n"); 725 return -ENODEV; 726 } 727 } 728 729 otg_data.regs_otg = (uintptr_t)addr; 730 731 return dwc2_udc_probe(&otg_data); 732 } 733 734 int board_usb_cleanup(int index, enum usb_init_type init) 735 { 736 return 0; 737 } 738 #endif 739 740 static void bootm_no_reloc(void) 741 { 742 char *ramdisk_high; 743 char *fdt_high; 744 745 if (!env_get_yesno("bootm-no-reloc")) 746 return; 747 748 ramdisk_high = env_get("initrd_high"); 749 fdt_high = env_get("fdt_high"); 750 751 if (!fdt_high) { 752 env_set_hex("fdt_high", -1UL); 753 printf("Fdt "); 754 } 755 756 if (!ramdisk_high) { 757 env_set_hex("initrd_high", -1UL); 758 printf("Ramdisk "); 759 } 760 761 if (!fdt_high || !ramdisk_high) 762 printf("skip relocation\n"); 763 } 764 765 int bootm_board_start(void) 766 { 767 /* 768 * print console record data 769 * 770 * On some rockchip platforms, uart debug and sdmmc pin are multiplex. 771 * If boot from sdmmc mode, the console data would be record in buffer, 772 * we switch to uart debug function in order to print it after loading 773 * images. 774 */ 775 #if defined(CONFIG_CONSOLE_RECORD) 776 if (!strcmp("mmc", env_get("devtype")) && 777 !strcmp("1", env_get("devnum"))) { 778 printf("IOMUX: sdmmc => uart debug"); 779 pinctrl_select_state(gd->cur_serial_dev, "default"); 780 console_record_print_purge(); 781 } 782 #endif 783 /* disable bootm relcation to save boot time */ 784 bootm_no_reloc(); 785 786 /* PCBA test needs more permission */ 787 if (get_bcb_recovery_msg() == BCB_MSG_RECOVERY_PCBA) 788 env_update("bootargs", "androidboot.selinux=permissive"); 789 790 /* sysmem */ 791 hotkey_run(HK_SYSMEM); 792 sysmem_overflow_check(); 793 794 return 0; 795 } 796 797 /* 798 * Implement it to support CLI command: 799 * - Android: bootm [aosp addr] 800 * - FIT: bootm [fit addr] 801 * - uImage: bootm [uimage addr] 802 * 803 * Purpose: 804 * - The original bootm command args require fdt addr on AOSP, 805 * which is not flexible on rockchip boot/recovery.img. 806 * - Take Android/FIT/uImage image into sysmem management to avoid image 807 * memory overlap. 808 */ 809 #if defined(CONFIG_ANDROID_BOOTLOADER) || \ 810 defined(CONFIG_ROCKCHIP_FIT_IMAGE) || \ 811 defined(CONFIG_ROCKCHIP_UIMAGE) 812 int board_do_bootm(int argc, char * const argv[]) 813 { 814 int format; 815 void *img; 816 817 if (argc != 2) 818 return 0; 819 820 img = (void *)simple_strtoul(argv[1], NULL, 16); 821 format = (genimg_get_format(img)); 822 823 /* Android */ 824 #ifdef CONFIG_ANDROID_BOOT_IMAGE 825 if (format == IMAGE_FORMAT_ANDROID) { 826 struct andr_img_hdr *hdr; 827 ulong load_addr; 828 ulong size; 829 int ret; 830 831 hdr = (struct andr_img_hdr *)img; 832 printf("BOOTM: transferring to board Android\n"); 833 834 #ifdef CONFIG_USING_KERNEL_DTB 835 sysmem_free((phys_addr_t)gd->fdt_blob); 836 /* erase magic */ 837 fdt_set_magic((void *)gd->fdt_blob, ~0); 838 gd->fdt_blob = NULL; 839 #endif 840 load_addr = env_get_ulong("kernel_addr_r", 16, 0); 841 load_addr -= hdr->page_size; 842 size = android_image_get_end(hdr) - (ulong)hdr; 843 844 if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size)) 845 return -ENOMEM; 846 847 ret = android_image_memcpy_separate(hdr, &load_addr); 848 if (ret) { 849 printf("board do bootm failed, ret=%d\n", ret); 850 return ret; 851 } 852 853 return android_bootloader_boot_kernel(load_addr); 854 } 855 #endif 856 857 /* FIT */ 858 #if IMAGE_ENABLE_FIT 859 if (format == IMAGE_FORMAT_FIT) { 860 char boot_cmd[64]; 861 862 printf("BOOTM: transferring to board FIT\n"); 863 snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]); 864 return run_command(boot_cmd, 0); 865 } 866 #endif 867 868 /* uImage */ 869 #if defined(CONFIG_IMAGE_FORMAT_LEGACY) 870 if (format == IMAGE_FORMAT_LEGACY && 871 image_get_type(img) == IH_TYPE_MULTI) { 872 char boot_cmd[64]; 873 874 printf("BOOTM: transferring to board uImage\n"); 875 snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]); 876 return run_command(boot_cmd, 0); 877 } 878 #endif 879 880 return 0; 881 } 882 #endif 883 884 void autoboot_command_fail_handle(void) 885 { 886 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE 887 #ifdef CONFIG_ANDROID_AB 888 run_command("fastboot usb 0;", 0); /* use fastboot to ative slot */ 889 #else 890 run_command("rockusb 0 ${devtype} ${devnum}", 0); 891 run_command("fastboot usb 0;", 0); 892 #endif 893 #endif 894 } 895 896 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 897 898 #define FIT_ROLLBACK_INDEX_LOCATION 0x66697472 /* "fitr" */ 899 900 int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index) 901 { 902 #ifdef CONFIG_OPTEE_CLIENT 903 u64 index; 904 int ret; 905 906 ret = trusty_read_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, &index); 907 if (ret) { 908 if (ret != TEE_ERROR_ITEM_NOT_FOUND) 909 return ret; 910 911 index = 0; 912 printf("Initial otp index as %d\n", fit_index); 913 } 914 915 *otp_index = (uint32_t)index; 916 #else 917 *otp_index = 0; 918 #endif 919 920 return 0; 921 } 922 923 static int fit_write_trusty_rollback_index(u32 trusty_index) 924 { 925 if (!trusty_index) 926 return 0; 927 928 return trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, 929 (u64)trusty_index); 930 } 931 #endif 932 933 void board_quiesce_devices(void *images) 934 { 935 hotkey_run(HK_CMDLINE); 936 hotkey_run(HK_CLI_OS_GO); 937 938 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 939 /* Destroy atags makes next warm boot safer */ 940 atags_destroy(); 941 #endif 942 943 #ifdef CONFIG_ROCKCHIP_REBOOT_TEST 944 do_reset(NULL, 0, 0, NULL); 945 #endif 946 947 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 948 int ret; 949 950 ret = fit_write_trusty_rollback_index(gd->rollback_index); 951 if (ret) { 952 panic("Failed to write fit rollback index %d, ret=%d", 953 gd->rollback_index, ret); 954 } 955 #endif 956 957 #ifdef CONFIG_ROCKCHIP_HW_DECOMPRESS 958 misc_decompress_cleanup(); 959 #endif 960 } 961