1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <amp.h> 9 #include <android_ab.h> 10 #include <android_bootloader.h> 11 #include <android_image.h> 12 #include <bidram.h> 13 #include <boot_rkimg.h> 14 #include <cli.h> 15 #include <clk.h> 16 #include <console.h> 17 #include <debug_uart.h> 18 #include <dm.h> 19 #include <dvfs.h> 20 #include <io-domain.h> 21 #include <image.h> 22 #include <key.h> 23 #include <memblk.h> 24 #include <misc.h> 25 #include <of_live.h> 26 #include <mtd_blk.h> 27 #include <ram.h> 28 #include <rockchip_debugger.h> 29 #include <syscon.h> 30 #include <sysmem.h> 31 #include <video_rockchip.h> 32 #include <asm/io.h> 33 #include <asm/gpio.h> 34 #include <android_avb/rk_avb_ops_user.h> 35 #include <dm/uclass-internal.h> 36 #include <dm/root.h> 37 #include <power/charge_display.h> 38 #include <power/regulator.h> 39 #include <optee_include/OpteeClientInterface.h> 40 #include <optee_include/OpteeClientApiLib.h> 41 #include <optee_include/tee_api_defines.h> 42 #include <asm/arch/boot_mode.h> 43 #include <asm/arch/clock.h> 44 #include <asm/arch/cpu.h> 45 #include <asm/arch/hotkey.h> 46 #include <asm/arch/param.h> 47 #include <asm/arch/periph.h> 48 #include <asm/arch/resource_img.h> 49 #include <asm/arch/rk_atags.h> 50 #include <asm/arch/vendor.h> 51 #ifdef CONFIG_ROCKCHIP_EINK_DISPLAY 52 #include <rk_eink.h> 53 #endif 54 DECLARE_GLOBAL_DATA_PTR; 55 56 __weak int rk_board_late_init(void) 57 { 58 return 0; 59 } 60 61 __weak int rk_board_fdt_fixup(void *blob) 62 { 63 return 0; 64 } 65 66 __weak int soc_clk_dump(void) 67 { 68 return 0; 69 } 70 71 __weak int set_armclk_rate(void) 72 { 73 return 0; 74 } 75 76 __weak int rk_board_init(void) 77 { 78 return 0; 79 } 80 81 /* 82 * define serialno max length, the max length is 512 Bytes 83 * The remaining bytes are used to ensure that the first 512 bytes 84 * are valid when executing 'env_set("serial#", value)'. 85 */ 86 #define VENDOR_SN_MAX 513 87 #define CPUID_LEN 0x10 88 #define CPUID_OFF 0x07 89 90 #define MAX_ETHERNET 0x2 91 92 static int rockchip_set_ethaddr(void) 93 { 94 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 95 char buf[ARP_HLEN_ASCII + 1], mac[16]; 96 u8 ethaddr[ARP_HLEN * MAX_ETHERNET] = {0}; 97 int ret, i; 98 bool need_write = false, randomed = false; 99 100 ret = vendor_storage_read(LAN_MAC_ID, ethaddr, sizeof(ethaddr)); 101 for (i = 0; i < MAX_ETHERNET; i++) { 102 if (ret <= 0 || !is_valid_ethaddr(ðaddr[i * ARP_HLEN])) { 103 if (!randomed) { 104 net_random_ethaddr(ðaddr[i * ARP_HLEN]); 105 randomed = true; 106 } else { 107 if (i > 0) { 108 memcpy(ðaddr[i * ARP_HLEN], 109 ðaddr[(i - 1) * ARP_HLEN], 110 ARP_HLEN); 111 ethaddr[i * ARP_HLEN] |= 0x02; 112 ethaddr[i * ARP_HLEN] += (i << 2); 113 } 114 } 115 116 need_write = true; 117 } 118 119 if (is_valid_ethaddr(ðaddr[i * ARP_HLEN])) { 120 sprintf(buf, "%pM", ðaddr[i * ARP_HLEN]); 121 if (i == 0) 122 memcpy(mac, "ethaddr", sizeof("ethaddr")); 123 else 124 sprintf(mac, "eth%daddr", i); 125 env_set(mac, buf); 126 } 127 } 128 129 if (need_write) { 130 ret = vendor_storage_write(LAN_MAC_ID, 131 ethaddr, sizeof(ethaddr)); 132 if (ret < 0) 133 printf("%s: vendor_storage_write failed %d\n", 134 __func__, ret); 135 } 136 #endif 137 138 return 0; 139 } 140 141 static int rockchip_set_serialno(void) 142 { 143 u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; 144 u8 cpuid[CPUID_LEN] = {0}; 145 char serialno_str[VENDOR_SN_MAX]; 146 int ret = 0, i; 147 u64 serialno; 148 149 /* Read serial number from vendor storage part */ 150 memset(serialno_str, 0, VENDOR_SN_MAX); 151 152 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 153 ret = vendor_storage_read(SN_ID, serialno_str, (VENDOR_SN_MAX-1)); 154 if (ret > 0) { 155 i = strlen(serialno_str); 156 for (; i > 0; i--) { 157 if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') || 158 (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') || 159 (serialno_str[i] >= '0' && serialno_str[i] <= '9')) 160 break; 161 } 162 163 serialno_str[i + 1] = 0x0; 164 env_set("serial#", serialno_str); 165 } else { 166 #endif 167 #if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP) 168 struct udevice *dev; 169 170 /* retrieve the device */ 171 if (IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)) 172 ret = uclass_get_device_by_driver(UCLASS_MISC, 173 DM_GET_DRIVER(rockchip_efuse), 174 &dev); 175 else 176 ret = uclass_get_device_by_driver(UCLASS_MISC, 177 DM_GET_DRIVER(rockchip_otp), 178 &dev); 179 180 if (ret) { 181 printf("%s: could not find efuse/otp device\n", __func__); 182 return ret; 183 } 184 185 /* read the cpu_id range from the efuses */ 186 ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid)); 187 if (ret) { 188 printf("%s: read cpuid from efuse/otp failed, ret=%d\n", 189 __func__, ret); 190 return ret; 191 } 192 #else 193 /* generate random cpuid */ 194 for (i = 0; i < CPUID_LEN; i++) 195 cpuid[i] = (u8)(rand()); 196 #endif 197 /* Generate the serial number based on CPU ID */ 198 for (i = 0; i < 8; i++) { 199 low[i] = cpuid[1 + (i << 1)]; 200 high[i] = cpuid[i << 1]; 201 } 202 203 serialno = crc32_no_comp(0, low, 8); 204 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; 205 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); 206 207 env_set("serial#", serialno_str); 208 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 209 } 210 #endif 211 212 return ret; 213 } 214 215 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) 216 int fb_set_reboot_flag(void) 217 { 218 printf("Setting reboot to fastboot flag ...\n"); 219 writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); 220 221 return 0; 222 } 223 #endif 224 225 #ifdef CONFIG_ROCKCHIP_USB_BOOT 226 static int boot_from_udisk(void) 227 { 228 struct blk_desc *desc; 229 char *devtype; 230 char *devnum; 231 232 devtype = env_get("devtype"); 233 devnum = env_get("devnum"); 234 235 /* Booting priority: mmc1 > udisk */ 236 if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1")) 237 return 0; 238 239 if (!run_command("usb start", -1)) { 240 desc = blk_get_devnum_by_type(IF_TYPE_USB, 0); 241 if (!desc) { 242 printf("No usb device found\n"); 243 return -ENODEV; 244 } 245 246 if (!run_command("rkimgtest usb 0", -1)) { 247 rockchip_set_bootdev(desc); 248 env_set("devtype", "usb"); 249 env_set("devnum", "0"); 250 printf("Boot from usb 0\n"); 251 } else { 252 printf("No usb dev 0 found\n"); 253 return -ENODEV; 254 } 255 } 256 257 return 0; 258 } 259 #endif 260 261 static void env_fixup(void) 262 { 263 struct memblock mem; 264 ulong u_addr_r; 265 phys_size_t end; 266 char *addr_r; 267 268 #ifdef ENV_MEM_LAYOUT_SETTINGS1 269 const char *env_addr0[] = { 270 "scriptaddr", "pxefile_addr_r", 271 "fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r", 272 }; 273 const char *env_addr1[] = { 274 "scriptaddr1", "pxefile_addr1_r", 275 "fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r", 276 }; 277 int i; 278 279 /* 128M is a typical ram size for most platform, so as default here */ 280 if (gd->ram_size <= SZ_128M) { 281 /* Replace orignal xxx_addr_r */ 282 for (i = 0; i < ARRAY_SIZE(env_addr1); i++) { 283 addr_r = env_get(env_addr1[i]); 284 if (addr_r) 285 env_set(env_addr0[i], addr_r); 286 } 287 } 288 #endif 289 /* No BL32 ? */ 290 if (!(gd->flags & GD_FLG_BL32_ENABLED)) { 291 /* 292 * [1] Move kernel to lower address if possible. 293 */ 294 addr_r = env_get("kernel_addr_no_low_bl32_r"); 295 if (addr_r) 296 env_set("kernel_addr_r", addr_r); 297 298 /* 299 * [2] Move ramdisk at BL32 position if need. 300 * 301 * 0x0a200000 and 0x08400000 are rockchip traditional address 302 * of BL32 and ramdisk: 303 * 304 * |------------|------------| 305 * | BL32 | ramdisk | 306 * |------------|------------| 307 * 308 * Move ramdisk to BL32 address to fix sysmem alloc failed 309 * issue on the board with critical memory(ie. 256MB). 310 */ 311 if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) { 312 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 313 if (u_addr_r == 0x0a200000) 314 env_set("ramdisk_addr_r", "0x08400000"); 315 } 316 } else { 317 mem = param_parse_optee_mem(); 318 319 /* 320 * [1] Move kernel forward if possible. 321 */ 322 if (mem.base > SZ_128M) { 323 addr_r = env_get("kernel_addr_no_low_bl32_r"); 324 if (addr_r) 325 env_set("kernel_addr_r", addr_r); 326 } 327 328 /* 329 * [2] Move ramdisk backward if optee enlarge. 330 */ 331 end = mem.base + mem.size; 332 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 333 if (u_addr_r >= mem.base && u_addr_r < end) 334 env_set_hex("ramdisk_addr_r", end); 335 } 336 } 337 338 static void cmdline_handle(void) 339 { 340 struct blk_desc *dev_desc; 341 342 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 343 struct tag *t; 344 345 t = atags_get_tag(ATAG_PUB_KEY); 346 if (t) { 347 /* Pass if efuse/otp programmed */ 348 if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED) 349 env_update("bootargs", "fuse.programmed=1"); 350 else 351 env_update("bootargs", "fuse.programmed=0"); 352 } 353 #endif 354 dev_desc = rockchip_get_bootdev(); 355 if (!dev_desc) 356 return; 357 358 /* 359 * From rk356x, the sd/udisk update flag was moved from 360 * IDB to Android BCB. 361 */ 362 if (get_bcb_recovery_msg() == BCB_MSG_RECOVERY_RK_FWUPDATE) { 363 if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 1) 364 env_update("bootargs", "sdfwupdate"); 365 else if (dev_desc->if_type == IF_TYPE_USB && dev_desc->devnum == 0) 366 env_update("bootargs", "usbfwupdate"); 367 } 368 } 369 370 int board_late_init(void) 371 { 372 rockchip_set_ethaddr(); 373 rockchip_set_serialno(); 374 setup_download_mode(); 375 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 376 setup_boot_mode(); 377 #endif 378 #ifdef CONFIG_ROCKCHIP_USB_BOOT 379 boot_from_udisk(); 380 #endif 381 #ifdef CONFIG_DM_CHARGE_DISPLAY 382 charge_display(); 383 #endif 384 #ifdef CONFIG_DRM_ROCKCHIP 385 rockchip_show_logo(); 386 #endif 387 #ifdef CONFIG_ROCKCHIP_EINK_DISPLAY 388 rockchip_eink_show_uboot_logo(); 389 #endif 390 env_fixup(); 391 soc_clk_dump(); 392 cmdline_handle(); 393 #ifdef CONFIG_AMP 394 amp_cpus_on(); 395 #endif 396 return rk_board_late_init(); 397 } 398 399 static void early_download(void) 400 { 401 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \ 402 (CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0) 403 if (pwrkey_download_init()) 404 printf("Pwrkey download init failed\n"); 405 #endif 406 407 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 408 if (is_hotkey(HK_BROM_DNL)) { 409 printf("Enter bootrom download..."); 410 flushc(); 411 writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); 412 do_reset(NULL, 0, 0, NULL); 413 printf("failed!\n"); 414 } 415 #endif 416 } 417 418 static void board_debug_init(void) 419 { 420 if (!gd->serial.using_pre_serial && 421 !(gd->flags & GD_FLG_DISABLE_CONSOLE)) 422 debug_uart_init(); 423 424 if (tstc()) { 425 gd->console_evt = getc(); 426 if (gd->console_evt <= 0x1a) /* 'z' */ 427 printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1); 428 } 429 430 if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI)) 431 printf("Cmd interface: disabled\n"); 432 } 433 434 #ifdef CONFIG_MTD_BLK 435 static void board_mtd_blk_map_partitions(void) 436 { 437 struct blk_desc *dev_desc; 438 439 dev_desc = rockchip_get_bootdev(); 440 if (dev_desc) 441 mtd_blk_map_partitions(dev_desc); 442 } 443 #endif 444 445 int board_init(void) 446 { 447 board_debug_init(); 448 449 #ifdef DEBUG 450 soc_clk_dump(); 451 #endif 452 453 #ifdef CONFIG_USING_KERNEL_DTB 454 #ifdef CONFIG_MTD_BLK 455 board_mtd_blk_map_partitions(); 456 #endif 457 init_kernel_dtb(); 458 #endif 459 early_download(); 460 461 /* 462 * pmucru isn't referenced on some platforms, so pmucru driver can't 463 * probe that the "assigned-clocks" is unused. 464 */ 465 clks_probe(); 466 #ifdef CONFIG_DM_REGULATOR 467 if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR))) 468 debug("%s: Can't enable boot on regulator\n", __func__); 469 #endif 470 471 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN 472 io_domain_init(); 473 #endif 474 475 set_armclk_rate(); 476 477 #ifdef CONFIG_DM_DVFS 478 dvfs_init(true); 479 #endif 480 481 #ifdef CONFIG_ANDROID_AB 482 if (ab_decrease_tries()) 483 printf("Decrease ab tries count fail!\n"); 484 #endif 485 486 return rk_board_init(); 487 } 488 489 int interrupt_debugger_init(void) 490 { 491 #ifdef CONFIG_ROCKCHIP_DEBUGGER 492 return rockchip_debugger_init(); 493 #else 494 return 0; 495 #endif 496 } 497 498 int board_fdt_fixup(void *blob) 499 { 500 /* Common fixup for DRM */ 501 #ifdef CONFIG_DRM_ROCKCHIP 502 rockchip_display_fixup(blob); 503 #endif 504 505 return rk_board_fdt_fixup(blob); 506 } 507 508 #if defined(CONFIG_ARM64_BOOT_AARCH32) || !defined(CONFIG_ARM64) 509 /* 510 * Common for OP-TEE: 511 * 64-bit & 32-bit mode: share memory dcache is always enabled; 512 * 513 * Common for U-Boot: 514 * 64-bit mode: MMU table is static defined in rkxxx.c file, all memory 515 * regions are mapped. That's good to match OP-TEE MMU policy. 516 * 517 * 32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where 518 * the OP-TEE region has been reserved, so it can not be 519 * mapped(i.e. dcache is disabled). That's *NOT* good to match 520 * OP-TEE MMU policy. 521 * 522 * For the data coherence when communication between U-Boot and OP-TEE, U-Boot 523 * should follow OP-TEE MMU policy. 524 * 525 * So 32-bit mode U-Boot should map OP-TEE share memory as dcache enabled. 526 */ 527 int board_initr_caches_fixup(void) 528 { 529 #ifdef CONFIG_OPTEE_CLIENT 530 struct memblock mem; 531 532 mem.base = 0; 533 mem.size = 0; 534 535 optee_get_shm_config(&mem.base, &mem.size); 536 if (mem.size) 537 mmu_set_region_dcache_behaviour(mem.base, mem.size, 538 DCACHE_WRITEBACK); 539 #endif 540 return 0; 541 } 542 #endif 543 544 void arch_preboot_os(uint32_t bootm_state) 545 { 546 if (bootm_state & BOOTM_STATE_OS_PREP) 547 hotkey_run(HK_CLI_OS_PRE); 548 } 549 550 void enable_caches(void) 551 { 552 icache_enable(); 553 dcache_enable(); 554 } 555 556 #ifdef CONFIG_LMB 557 /* 558 * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize". 559 * This makes lmb_alloc_base() always alloc from tail of sdram. 560 * If we don't assign it, bi_dram[0] is used by default and it may cause 561 * lmb_alloc_base() fail when bi_dram[0] range is small. 562 */ 563 void board_lmb_reserve(struct lmb *lmb) 564 { 565 char bootm_mapsize[32]; 566 char bootm_low[32]; 567 u64 start, size; 568 int i; 569 570 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 571 if (!gd->bd->bi_dram[i].size) 572 break; 573 } 574 575 start = gd->bd->bi_dram[i - 1].start; 576 size = gd->bd->bi_dram[i - 1].size; 577 578 /* 579 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+), 580 * otherwise "Unable to handle kernel paging request at virtual address ...". 581 * 582 * So that we hope limit highest address at 768M, but there comes the the 583 * problem: ramdisk is a compressed image and it expands after descompress, 584 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...". 585 * 586 * We make a appointment that the highest memory address is 512MB, it 587 * makes lmb alloc safer. 588 */ 589 #ifndef CONFIG_ARM64 590 if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) { 591 start = gd->bd->bi_dram[i - 2].start; 592 size = gd->bd->bi_dram[i - 2].size; 593 } 594 595 if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) 596 size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start; 597 #endif 598 sprintf(bootm_low, "0x%llx", start); 599 sprintf(bootm_mapsize, "0x%llx", size); 600 env_set("bootm_low", bootm_low); 601 env_set("bootm_mapsize", bootm_mapsize); 602 } 603 #endif 604 605 #ifdef CONFIG_BIDRAM 606 int board_bidram_reserve(struct bidram *bidram) 607 { 608 struct memblock mem; 609 int ret; 610 611 /* ATF */ 612 mem = param_parse_atf_mem(); 613 ret = bidram_reserve(MEM_ATF, mem.base, mem.size); 614 if (ret) 615 return ret; 616 617 /* PSTORE/ATAGS/SHM */ 618 mem = param_parse_common_resv_mem(); 619 ret = bidram_reserve(MEM_SHM, mem.base, mem.size); 620 if (ret) 621 return ret; 622 623 /* OP-TEE */ 624 mem = param_parse_optee_mem(); 625 ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size); 626 if (ret) 627 return ret; 628 629 return 0; 630 } 631 632 int board_sysmem_reserve(struct sysmem *sysmem) 633 { 634 #ifdef CONFIG_SKIP_RELOCATE_UBOOT 635 if (!sysmem_alloc_base_by_name("NO-RELOC-CODE", 636 CONFIG_SYS_TEXT_BASE, SZ_2M)) { 637 printf("Failed to reserve sysmem for U-Boot code\n"); 638 return -ENOMEM; 639 } 640 #endif 641 return 0; 642 } 643 644 parse_fn_t board_bidram_parse_fn(void) 645 { 646 return param_parse_ddr_mem; 647 } 648 #endif 649 650 int board_init_f_boot_flags(void) 651 { 652 int boot_flags = 0; 653 654 /* pre-loader serial */ 655 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \ 656 defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) 657 struct tag *t; 658 659 t = atags_get_tag(ATAG_SERIAL); 660 if (t) { 661 gd->serial.using_pre_serial = 1; 662 gd->serial.enable = t->u.serial.enable; 663 gd->serial.baudrate = t->u.serial.baudrate; 664 gd->serial.addr = t->u.serial.addr; 665 gd->serial.id = t->u.serial.id; 666 gd->baudrate = CONFIG_BAUDRATE; 667 if (!t->u.serial.enable) 668 boot_flags |= GD_FLG_DISABLE_CONSOLE; 669 debug("preloader: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n", 670 gd->serial.enable, gd->serial.addr, 671 gd->serial.baudrate, gd->serial.id); 672 } else 673 #endif 674 { 675 gd->baudrate = CONFIG_BAUDRATE; 676 gd->serial.baudrate = CONFIG_BAUDRATE; 677 gd->serial.addr = CONFIG_DEBUG_UART_BASE; 678 } 679 680 /* The highest priority to turn off (override) console */ 681 #if defined(CONFIG_DISABLE_CONSOLE) 682 boot_flags |= GD_FLG_DISABLE_CONSOLE; 683 #endif 684 685 return boot_flags; 686 } 687 688 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 689 #include <fdt_support.h> 690 #include <usb.h> 691 #include <usb/dwc2_udc.h> 692 693 static struct dwc2_plat_otg_data otg_data = { 694 .rx_fifo_sz = 512, 695 .np_tx_fifo_sz = 16, 696 .tx_fifo_sz = 128, 697 }; 698 699 int board_usb_init(int index, enum usb_init_type init) 700 { 701 const void *blob = gd->fdt_blob; 702 const fdt32_t *reg; 703 fdt_addr_t addr; 704 int node; 705 706 /* find the usb_otg node */ 707 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); 708 709 retry: 710 if (node > 0) { 711 reg = fdt_getprop(blob, node, "reg", NULL); 712 if (!reg) 713 return -EINVAL; 714 715 addr = fdt_translate_address(blob, node, reg); 716 if (addr == OF_BAD_ADDR) { 717 pr_err("Not found usb_otg address\n"); 718 return -EINVAL; 719 } 720 721 #if defined(CONFIG_ROCKCHIP_RK3288) 722 if (addr != 0xff580000) { 723 node = fdt_node_offset_by_compatible(blob, node, 724 "snps,dwc2"); 725 goto retry; 726 } 727 #endif 728 } else { 729 /* 730 * With kernel dtb support, rk3288 dwc2 otg node 731 * use the rockchip legacy dwc2 driver "dwc_otg_310" 732 * with the compatible "rockchip,rk3288_usb20_otg", 733 * and rk3368 also use the "dwc_otg_310" driver with 734 * the compatible "rockchip,rk3368-usb". 735 */ 736 #if defined(CONFIG_ROCKCHIP_RK3288) 737 node = fdt_node_offset_by_compatible(blob, -1, 738 "rockchip,rk3288_usb20_otg"); 739 #elif defined(CONFIG_ROCKCHIP_RK3368) 740 node = fdt_node_offset_by_compatible(blob, -1, 741 "rockchip,rk3368-usb"); 742 #endif 743 if (node > 0) { 744 goto retry; 745 } else { 746 pr_err("Not found usb_otg device\n"); 747 return -ENODEV; 748 } 749 } 750 751 otg_data.regs_otg = (uintptr_t)addr; 752 753 return dwc2_udc_probe(&otg_data); 754 } 755 756 int board_usb_cleanup(int index, enum usb_init_type init) 757 { 758 return 0; 759 } 760 #endif 761 762 static void bootm_no_reloc(void) 763 { 764 char *ramdisk_high; 765 char *fdt_high; 766 767 if (!env_get_yesno("bootm-no-reloc")) 768 return; 769 770 ramdisk_high = env_get("initrd_high"); 771 fdt_high = env_get("fdt_high"); 772 773 if (!fdt_high) { 774 env_set_hex("fdt_high", -1UL); 775 printf("Fdt "); 776 } 777 778 if (!ramdisk_high) { 779 env_set_hex("initrd_high", -1UL); 780 printf("Ramdisk "); 781 } 782 783 if (!fdt_high || !ramdisk_high) 784 printf("skip relocation\n"); 785 } 786 787 int bootm_board_start(void) 788 { 789 /* 790 * print console record data 791 * 792 * On some rockchip platforms, uart debug and sdmmc pin are multiplex. 793 * If boot from sdmmc mode, the console data would be record in buffer, 794 * we switch to uart debug function in order to print it after loading 795 * images. 796 */ 797 #if defined(CONFIG_CONSOLE_RECORD) 798 if (!strcmp("mmc", env_get("devtype")) && 799 !strcmp("1", env_get("devnum"))) { 800 printf("IOMUX: sdmmc => uart debug"); 801 pinctrl_select_state(gd->cur_serial_dev, "default"); 802 console_record_print_purge(); 803 } 804 #endif 805 /* disable bootm relcation to save boot time */ 806 bootm_no_reloc(); 807 808 /* PCBA test needs more permission */ 809 if (get_bcb_recovery_msg() == BCB_MSG_RECOVERY_PCBA) 810 env_update("bootargs", "androidboot.selinux=permissive"); 811 812 /* sysmem */ 813 hotkey_run(HK_SYSMEM); 814 sysmem_overflow_check(); 815 816 return 0; 817 } 818 819 int bootm_image_populate_dtb(void *img) 820 { 821 if ((gd->flags & GD_FLG_KDTB_READY) && !gd->fdt_blob_kern) 822 sysmem_free((phys_addr_t)gd->fdt_blob); 823 else 824 gd->fdt_blob = (void *)env_get_ulong("fdt_addr_r", 16, 0); 825 826 return resource_populate_dtb(img, (void *)gd->fdt_blob); 827 } 828 829 /* 830 * Implement it to support CLI command: 831 * - Android: bootm [aosp addr] 832 * - FIT: bootm [fit addr] 833 * - uImage: bootm [uimage addr] 834 * 835 * Purpose: 836 * - The original bootm command args require fdt addr on AOSP, 837 * which is not flexible on rockchip boot/recovery.img. 838 * - Take Android/FIT/uImage image into sysmem management to avoid image 839 * memory overlap. 840 */ 841 #if defined(CONFIG_ANDROID_BOOTLOADER) || \ 842 defined(CONFIG_ROCKCHIP_FIT_IMAGE) || \ 843 defined(CONFIG_ROCKCHIP_UIMAGE) 844 int board_do_bootm(int argc, char * const argv[]) 845 { 846 int format; 847 void *img; 848 849 if (argc != 2) 850 return 0; 851 852 img = (void *)simple_strtoul(argv[1], NULL, 16); 853 format = (genimg_get_format(img)); 854 855 /* Android */ 856 #ifdef CONFIG_ANDROID_BOOT_IMAGE 857 if (format == IMAGE_FORMAT_ANDROID) { 858 struct andr_img_hdr *hdr; 859 ulong load_addr; 860 ulong size; 861 int ret; 862 863 hdr = (struct andr_img_hdr *)img; 864 printf("BOOTM: transferring to board Android\n"); 865 866 load_addr = env_get_ulong("kernel_addr_r", 16, 0); 867 load_addr -= hdr->page_size; 868 size = android_image_get_end(hdr) - (ulong)hdr; 869 870 if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size)) 871 return -ENOMEM; 872 873 ret = bootm_image_populate_dtb(img); 874 if (ret) { 875 printf("bootm can't read dtb\n"); 876 return ret; 877 } 878 879 ret = android_image_memcpy_separate(hdr, &load_addr); 880 if (ret) { 881 printf("board do bootm failed, ret=%d\n", ret); 882 return ret; 883 } 884 885 return android_bootloader_boot_kernel(load_addr); 886 } 887 #endif 888 889 /* FIT */ 890 #if IMAGE_ENABLE_FIT 891 if (format == IMAGE_FORMAT_FIT) { 892 char boot_cmd[64]; 893 int ret; 894 895 printf("BOOTM: transferring to board FIT\n"); 896 897 ret = bootm_image_populate_dtb(img); 898 if (ret) { 899 printf("bootm can't read dtb\n"); 900 return ret; 901 } 902 snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]); 903 return run_command(boot_cmd, 0); 904 } 905 #endif 906 907 /* uImage */ 908 #if 0 909 #if defined(CONFIG_IMAGE_FORMAT_LEGACY) 910 if (format == IMAGE_FORMAT_LEGACY && 911 image_get_type(img) == IH_TYPE_MULTI) { 912 char boot_cmd[64]; 913 914 printf("BOOTM: transferring to board uImage\n"); 915 snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]); 916 return run_command(boot_cmd, 0); 917 } 918 #endif 919 #endif 920 return 0; 921 } 922 #endif 923 924 void autoboot_command_fail_handle(void) 925 { 926 #ifdef CONFIG_ANDROID_AB 927 if (rk_avb_ab_have_bootable_slot() == true) 928 run_command("reset;", 0); 929 else 930 run_command("fastboot usb 0;", 0); 931 #endif 932 933 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE 934 run_command("rockusb 0 ${devtype} ${devnum}", 0); 935 run_command("fastboot usb 0;", 0); 936 #endif 937 938 } 939 940 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 941 942 #define FIT_ROLLBACK_INDEX_LOCATION 0x66697472 /* "fitr" */ 943 944 int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index) 945 { 946 #ifdef CONFIG_OPTEE_CLIENT 947 u64 index; 948 int ret; 949 950 ret = trusty_read_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, &index); 951 if (ret) { 952 if (ret != TEE_ERROR_ITEM_NOT_FOUND) 953 return ret; 954 955 index = 0; 956 printf("Initial otp index as %d\n", fit_index); 957 } 958 959 *otp_index = (uint32_t)index; 960 #else 961 *otp_index = 0; 962 #endif 963 964 return 0; 965 } 966 967 static int fit_write_trusty_rollback_index(u32 trusty_index) 968 { 969 if (!trusty_index) 970 return 0; 971 972 return trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, 973 (u64)trusty_index); 974 } 975 #endif 976 977 void board_quiesce_devices(void *images) 978 { 979 hotkey_run(HK_CMDLINE); 980 hotkey_run(HK_CLI_OS_GO); 981 982 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 983 /* Destroy atags makes next warm boot safer */ 984 atags_destroy(); 985 #endif 986 987 #ifdef CONFIG_ROCKCHIP_REBOOT_TEST 988 do_reset(NULL, 0, 0, NULL); 989 #endif 990 991 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 992 int ret; 993 994 ret = fit_write_trusty_rollback_index(gd->rollback_index); 995 if (ret) { 996 panic("Failed to write fit rollback index %d, ret=%d", 997 gd->rollback_index, ret); 998 } 999 #endif 1000 1001 #ifdef CONFIG_ROCKCHIP_HW_DECOMPRESS 1002 misc_decompress_cleanup(); 1003 #endif 1004 } 1005