xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/board.c (revision 3ef56e61c8cbfdfdca155f5b1e2cd4d5cb5e048a)
1 /*
2  * (C) Copyright 2015 Google, Inc
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <clk.h>
9 #include <dm.h>
10 #include <ram.h>
11 #include <asm/io.h>
12 
13 DECLARE_GLOBAL_DATA_PTR;
14 
15 int board_init(void)
16 {
17 	return 0;
18 }
19 
20 int dram_init(void)
21 {
22 	struct ram_info ram;
23 	struct udevice *dev;
24 	int ret;
25 
26 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
27 	if (ret) {
28 		debug("DRAM init failed: %d\n", ret);
29 		return ret;
30 	}
31 	ret = ram_get_info(dev, &ram);
32 	if (ret) {
33 		debug("Cannot get DRAM size: %d\n", ret);
34 		return ret;
35 	}
36 	debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
37 	gd->ram_size = ram.size;
38 
39 	return 0;
40 }
41 
42 #ifndef CONFIG_SYS_DCACHE_OFF
43 void enable_caches(void)
44 {
45 	/* Enable D-cache. I-cache is already enabled in start.S */
46 	dcache_enable();
47 }
48 #endif
49 
50 void lowlevel_init(void)
51 {
52 }
53 
54 static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
55 		       char * const argv[])
56 {
57 	struct udevice *dev;
58 
59 	for (uclass_first_device(UCLASS_CLK, &dev);
60 	     dev;
61 	     uclass_next_device(&dev)) {
62 		ulong rate;
63 
64 		rate = clk_get_rate(dev);
65 		printf("%s: %lu\n", dev->name, rate);
66 	}
67 
68 	return 0;
69 }
70 
71 U_BOOT_CMD(
72 	clock, 2, 1, do_clock,
73 	"display information about clocks",
74 	""
75 );
76