1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <amp.h> 9 #include <android_bootloader.h> 10 #include <android_image.h> 11 #include <bidram.h> 12 #include <boot_rkimg.h> 13 #include <cli.h> 14 #include <clk.h> 15 #include <console.h> 16 #include <debug_uart.h> 17 #include <dm.h> 18 #include <dvfs.h> 19 #include <io-domain.h> 20 #include <image.h> 21 #include <key.h> 22 #include <memblk.h> 23 #include <misc.h> 24 #include <of_live.h> 25 #include <mtd_blk.h> 26 #include <ram.h> 27 #include <rockchip_debugger.h> 28 #include <syscon.h> 29 #include <sysmem.h> 30 #include <video_rockchip.h> 31 #include <asm/io.h> 32 #include <asm/gpio.h> 33 #include <dm/uclass-internal.h> 34 #include <dm/root.h> 35 #include <power/charge_display.h> 36 #include <power/regulator.h> 37 #include <optee_include/OpteeClientInterface.h> 38 #include <optee_include/tee_api_defines.h> 39 #include <asm/arch/boot_mode.h> 40 #include <asm/arch/clock.h> 41 #include <asm/arch/cpu.h> 42 #include <asm/arch/hotkey.h> 43 #include <asm/arch/param.h> 44 #include <asm/arch/periph.h> 45 #include <asm/arch/resource_img.h> 46 #include <asm/arch/rk_atags.h> 47 #include <asm/arch/vendor.h> 48 49 DECLARE_GLOBAL_DATA_PTR; 50 51 __weak int rk_board_late_init(void) 52 { 53 return 0; 54 } 55 56 __weak int rk_board_fdt_fixup(void *blob) 57 { 58 return 0; 59 } 60 61 __weak int soc_clk_dump(void) 62 { 63 return 0; 64 } 65 66 __weak int set_armclk_rate(void) 67 { 68 return 0; 69 } 70 71 __weak int rk_board_init(void) 72 { 73 return 0; 74 } 75 76 /* 77 * define serialno max length, the max length is 512 Bytes 78 * The remaining bytes are used to ensure that the first 512 bytes 79 * are valid when executing 'env_set("serial#", value)'. 80 */ 81 #define VENDOR_SN_MAX 513 82 #define CPUID_LEN 0x10 83 #define CPUID_OFF 0x07 84 85 static int rockchip_set_ethaddr(void) 86 { 87 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 88 char buf[ARP_HLEN_ASCII + 1]; 89 u8 ethaddr[ARP_HLEN]; 90 int ret; 91 92 ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr)); 93 if (ret > 0 && is_valid_ethaddr(ethaddr)) { 94 sprintf(buf, "%pM", ethaddr); 95 env_set("ethaddr", buf); 96 } 97 #endif 98 return 0; 99 } 100 101 static int rockchip_set_serialno(void) 102 { 103 u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; 104 u8 cpuid[CPUID_LEN] = {0}; 105 char serialno_str[VENDOR_SN_MAX]; 106 int ret = 0, i; 107 u64 serialno; 108 109 /* Read serial number from vendor storage part */ 110 memset(serialno_str, 0, VENDOR_SN_MAX); 111 112 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 113 ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1)); 114 if (ret > 0) { 115 i = strlen(serialno_str); 116 for (; i > 0; i--) { 117 if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') || 118 (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') || 119 (serialno_str[i] >= '0' && serialno_str[i] <= '9')) 120 break; 121 } 122 123 serialno_str[i + 1] = 0x0; 124 env_set("serial#", serialno_str); 125 } else { 126 #endif 127 #ifdef CONFIG_ROCKCHIP_EFUSE 128 struct udevice *dev; 129 130 /* retrieve the device */ 131 ret = uclass_get_device_by_driver(UCLASS_MISC, 132 DM_GET_DRIVER(rockchip_efuse), 133 &dev); 134 if (ret) { 135 printf("%s: could not find efuse device\n", __func__); 136 return ret; 137 } 138 139 /* read the cpu_id range from the efuses */ 140 ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid)); 141 if (ret) { 142 printf("%s: read cpuid from efuses failed, ret=%d\n", 143 __func__, ret); 144 return ret; 145 } 146 #else 147 /* generate random cpuid */ 148 for (i = 0; i < CPUID_LEN; i++) 149 cpuid[i] = (u8)(rand()); 150 #endif 151 /* Generate the serial number based on CPU ID */ 152 for (i = 0; i < 8; i++) { 153 low[i] = cpuid[1 + (i << 1)]; 154 high[i] = cpuid[i << 1]; 155 } 156 157 serialno = crc32_no_comp(0, low, 8); 158 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; 159 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); 160 161 env_set("serial#", serialno_str); 162 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 163 } 164 #endif 165 166 return ret; 167 } 168 169 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) 170 int fb_set_reboot_flag(void) 171 { 172 printf("Setting reboot to fastboot flag ...\n"); 173 writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); 174 175 return 0; 176 } 177 #endif 178 179 #ifdef CONFIG_ROCKCHIP_USB_BOOT 180 static int boot_from_udisk(void) 181 { 182 struct blk_desc *desc; 183 char *devtype; 184 char *devnum; 185 186 devtype = env_get("devtype"); 187 devnum = env_get("devnum"); 188 189 /* Booting priority: mmc1 > udisk */ 190 if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1")) 191 return 0; 192 193 if (!run_command("usb start", -1)) { 194 desc = blk_get_devnum_by_type(IF_TYPE_USB, 0); 195 if (!desc) { 196 printf("No usb device found\n"); 197 return -ENODEV; 198 } 199 200 if (!run_command("rkimgtest usb 0", -1)) { 201 rockchip_set_bootdev(desc); 202 env_set("devtype", "usb"); 203 env_set("devnum", "0"); 204 printf("Boot from usb 0\n"); 205 } else { 206 printf("No usb dev 0 found\n"); 207 return -ENODEV; 208 } 209 } 210 211 return 0; 212 } 213 #endif 214 215 static void env_fixup(void) 216 { 217 struct memblock mem; 218 ulong u_addr_r; 219 phys_size_t end; 220 char *addr_r; 221 222 #ifdef ENV_MEM_LAYOUT_SETTINGS1 223 const char *env_addr0[] = { 224 "scriptaddr", "pxefile_addr_r", 225 "fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r", 226 }; 227 const char *env_addr1[] = { 228 "scriptaddr1", "pxefile_addr1_r", 229 "fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r", 230 }; 231 int i; 232 233 /* 128M is a typical ram size for most platform, so as default here */ 234 if (gd->ram_size <= SZ_128M) { 235 /* Replace orignal xxx_addr_r */ 236 for (i = 0; i < ARRAY_SIZE(env_addr1); i++) { 237 addr_r = env_get(env_addr1[i]); 238 if (addr_r) 239 env_set(env_addr0[i], addr_r); 240 } 241 } 242 #endif 243 /* If BL32 is disabled, move kernel to lower address. */ 244 if (!(gd->flags & GD_FLG_BL32_ENABLED)) { 245 addr_r = env_get("kernel_addr_no_bl32_r"); 246 if (addr_r) 247 env_set("kernel_addr_r", addr_r); 248 249 /* 250 * 0x0a200000 and 0x08400000 are rockchip traditional address 251 * of BL32 and ramdisk: 252 * 253 * |------------|------------| 254 * | BL32 | ramdisk | 255 * |------------|------------| 256 * 257 * Move ramdisk to BL32 address to fix sysmem alloc failed 258 * issue on the board with critical memory(ie. 256MB). 259 */ 260 if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) { 261 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 262 if (u_addr_r == 0x0a200000) 263 env_set("ramdisk_addr_r", "0x08400000"); 264 } 265 266 /* If BL32 is enlarged, move ramdisk right behind it */ 267 } else { 268 mem = param_parse_optee_mem(); 269 end = mem.base + mem.size; 270 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 271 if (u_addr_r >= mem.base && u_addr_r < end) 272 env_set_hex("ramdisk_addr_r", end); 273 } 274 } 275 276 static void cmdline_handle(void) 277 { 278 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 279 struct tag *t; 280 281 t = atags_get_tag(ATAG_PUB_KEY); 282 if (t) { 283 /* Pass if efuse/otp programmed */ 284 if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED) 285 env_update("bootargs", "fuse.programmed=1"); 286 else 287 env_update("bootargs", "fuse.programmed=0"); 288 } 289 #endif 290 } 291 292 int board_late_init(void) 293 { 294 rockchip_set_ethaddr(); 295 rockchip_set_serialno(); 296 setup_download_mode(); 297 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 298 setup_boot_mode(); 299 #endif 300 #ifdef CONFIG_ROCKCHIP_USB_BOOT 301 boot_from_udisk(); 302 #endif 303 #ifdef CONFIG_DM_CHARGE_DISPLAY 304 charge_display(); 305 #endif 306 #ifdef CONFIG_DRM_ROCKCHIP 307 rockchip_show_logo(); 308 #endif 309 env_fixup(); 310 soc_clk_dump(); 311 cmdline_handle(); 312 313 return rk_board_late_init(); 314 } 315 316 static void early_download(void) 317 { 318 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \ 319 (CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0) 320 if (pwrkey_download_init()) 321 printf("Pwrkey download init failed\n"); 322 #endif 323 324 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 325 if (is_hotkey(HK_BROM_DNL)) { 326 printf("Enter bootrom download..."); 327 flushc(); 328 writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); 329 do_reset(NULL, 0, 0, NULL); 330 printf("failed!\n"); 331 } 332 #endif 333 } 334 335 static void board_debug_init(void) 336 { 337 if (!gd->serial.using_pre_serial) 338 board_debug_uart_init(); 339 340 if (tstc()) { 341 gd->console_evt = getc(); 342 if (gd->console_evt <= 0x1a) /* 'z' */ 343 printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1); 344 } 345 346 if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI)) 347 printf("Cmd interface: disabled\n"); 348 } 349 350 #ifdef CONFIG_MTD_BLK 351 static void board_mtd_blk_map_partitions(void) 352 { 353 struct blk_desc *dev_desc; 354 355 dev_desc = rockchip_get_bootdev(); 356 if (dev_desc) 357 mtd_blk_map_partitions(dev_desc); 358 } 359 #endif 360 361 int board_init(void) 362 { 363 board_debug_init(); 364 365 #ifdef DEBUG 366 soc_clk_dump(); 367 #endif 368 369 #ifdef CONFIG_USING_KERNEL_DTB 370 #ifdef CONFIG_MTD_BLK 371 board_mtd_blk_map_partitions(); 372 #endif 373 init_kernel_dtb(); 374 #endif 375 early_download(); 376 377 /* 378 * pmucru isn't referenced on some platforms, so pmucru driver can't 379 * probe that the "assigned-clocks" is unused. 380 */ 381 clks_probe(); 382 #ifdef CONFIG_DM_REGULATOR 383 if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR))) 384 debug("%s: Can't enable boot on regulator\n", __func__); 385 #endif 386 387 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN 388 io_domain_init(); 389 #endif 390 391 set_armclk_rate(); 392 393 #ifdef CONFIG_DM_DVFS 394 dvfs_init(true); 395 #endif 396 397 return rk_board_init(); 398 } 399 400 int interrupt_debugger_init(void) 401 { 402 #ifdef CONFIG_ROCKCHIP_DEBUGGER 403 return rockchip_debugger_init(); 404 #else 405 return 0; 406 #endif 407 } 408 409 int board_fdt_fixup(void *blob) 410 { 411 /* Common fixup for DRM */ 412 #ifdef CONFIG_DRM_ROCKCHIP 413 rockchip_display_fixup(blob); 414 #endif 415 416 return rk_board_fdt_fixup(blob); 417 } 418 419 #if defined(CONFIG_ARM64_BOOT_AARCH32) || \ 420 (!defined(CONFIG_ARM64) && defined(CONFIG_OPTEE_V2)) 421 /* 422 * (1) Fixup MMU region attr for OP-TEE on (AArch32 + ARMv8) 423 * 424 * What ever U-Boot is 64-bit or 32-bit mode, the OP-TEE is always 64-bit mode. 425 * 426 * Common for OP-TEE: 427 * 64-bit mode: dcache is always enabled; 428 * 32-bit mode: dcache is always disabled(Due to rockchip sip calls); 429 * 430 * Common for U-Boot: 431 * 64-bit mode: MMU table is static defined in rkxxx.c file, all memory 432 * regions are mapped. That's good to match OP-TEE MMU policy. 433 * 434 * 32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where 435 * the OP-TEE region has been reserved, so it can not be 436 * mapped(i.e. dcache is disabled). That's also good to match 437 * OP-TEE MMU policy. 438 * 439 * For the data coherence when communication between U-Boot and OP-TEE, U-Boot 440 * should follow OP-TEE MMU policy. 441 * 442 * Here is the special: 443 * When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot is 32-bit mode while 444 * OP-TEE is still 64-bit mode. U-Boot would not map MMU table for OP-TEE 445 * region(but OP-TEE requires it cacheable) so we fixup here. 446 * 447 * 448 * (2) Fixup MMU region attr for OP-TEE on (ARMv7 + CONFIG_OPTEE_V2) 449 * 450 * OP-TEE for CONFIG_OPTEE_V1: dcache is always disabled; 451 * OP-TEE for CONFIG_OPTEE_V2: dcache is always enabled; 452 * 453 * So U-Boot should map OP-TEE memory as dcache enabled for CONFIG_OPTEE_V2. 454 */ 455 int board_initr_caches_fixup(void) 456 { 457 struct memblock mem; 458 459 mem = param_parse_optee_mem(); 460 if (mem.size) 461 mmu_set_region_dcache_behaviour(mem.base, mem.size, 462 DCACHE_WRITEBACK); 463 return 0; 464 } 465 #endif 466 467 void arch_preboot_os(uint32_t bootm_state) 468 { 469 if (bootm_state & BOOTM_STATE_OS_PREP) 470 hotkey_run(HK_CLI_OS_PRE); 471 } 472 473 void enable_caches(void) 474 { 475 icache_enable(); 476 dcache_enable(); 477 } 478 479 #ifdef CONFIG_LMB 480 /* 481 * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize". 482 * This makes lmb_alloc_base() always alloc from tail of sdram. 483 * If we don't assign it, bi_dram[0] is used by default and it may cause 484 * lmb_alloc_base() fail when bi_dram[0] range is small. 485 */ 486 void board_lmb_reserve(struct lmb *lmb) 487 { 488 char bootm_mapsize[32]; 489 char bootm_low[32]; 490 u64 start, size; 491 int i; 492 493 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 494 if (!gd->bd->bi_dram[i].size) 495 break; 496 } 497 498 start = gd->bd->bi_dram[i - 1].start; 499 size = gd->bd->bi_dram[i - 1].size; 500 501 /* 502 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+), 503 * otherwise "Unable to handle kernel paging request at virtual address ...". 504 * 505 * So that we hope limit highest address at 768M, but there comes the the 506 * problem: ramdisk is a compressed image and it expands after descompress, 507 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...". 508 * 509 * We make a appointment that the highest memory address is 512MB, it 510 * makes lmb alloc safer. 511 */ 512 #ifndef CONFIG_ARM64 513 if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) { 514 start = gd->bd->bi_dram[i - 2].start; 515 size = gd->bd->bi_dram[i - 2].size; 516 } 517 518 if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) 519 size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start; 520 #endif 521 sprintf(bootm_low, "0x%llx", start); 522 sprintf(bootm_mapsize, "0x%llx", size); 523 env_set("bootm_low", bootm_low); 524 env_set("bootm_mapsize", bootm_mapsize); 525 } 526 #endif 527 528 #ifdef CONFIG_BIDRAM 529 int board_bidram_reserve(struct bidram *bidram) 530 { 531 struct memblock mem; 532 int ret; 533 534 /* ATF */ 535 mem = param_parse_atf_mem(); 536 ret = bidram_reserve(MEM_ATF, mem.base, mem.size); 537 if (ret) 538 return ret; 539 540 /* PSTORE/ATAGS/SHM */ 541 mem = param_parse_common_resv_mem(); 542 ret = bidram_reserve(MEM_SHM, mem.base, mem.size); 543 if (ret) 544 return ret; 545 546 /* OP-TEE */ 547 mem = param_parse_optee_mem(); 548 ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size); 549 if (ret) 550 return ret; 551 552 return 0; 553 } 554 555 parse_fn_t board_bidram_parse_fn(void) 556 { 557 return param_parse_ddr_mem; 558 } 559 #endif 560 561 #ifdef CONFIG_ROCKCHIP_AMP 562 void cpu_secondary_init_r(void) 563 { 564 amp_cpus_on(); 565 } 566 #endif 567 568 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \ 569 defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) 570 int board_init_f_init_serial(void) 571 { 572 struct tag *t = atags_get_tag(ATAG_SERIAL); 573 574 if (t) { 575 gd->serial.using_pre_serial = t->u.serial.enable; 576 gd->serial.addr = t->u.serial.addr; 577 gd->serial.baudrate = t->u.serial.baudrate; 578 gd->serial.id = t->u.serial.id; 579 580 debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n", 581 __func__, gd->serial.using_pre_serial, 582 gd->serial.addr, gd->serial.baudrate, 583 gd->serial.id); 584 } 585 586 return 0; 587 } 588 #endif 589 590 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 591 #include <fdt_support.h> 592 #include <usb.h> 593 #include <usb/dwc2_udc.h> 594 595 static struct dwc2_plat_otg_data otg_data = { 596 .rx_fifo_sz = 512, 597 .np_tx_fifo_sz = 16, 598 .tx_fifo_sz = 128, 599 }; 600 601 int board_usb_init(int index, enum usb_init_type init) 602 { 603 const void *blob = gd->fdt_blob; 604 const fdt32_t *reg; 605 fdt_addr_t addr; 606 int node; 607 608 /* find the usb_otg node */ 609 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); 610 611 retry: 612 if (node > 0) { 613 reg = fdt_getprop(blob, node, "reg", NULL); 614 if (!reg) 615 return -EINVAL; 616 617 addr = fdt_translate_address(blob, node, reg); 618 if (addr == OF_BAD_ADDR) { 619 pr_err("Not found usb_otg address\n"); 620 return -EINVAL; 621 } 622 623 #if defined(CONFIG_ROCKCHIP_RK3288) 624 if (addr != 0xff580000) { 625 node = fdt_node_offset_by_compatible(blob, node, 626 "snps,dwc2"); 627 goto retry; 628 } 629 #endif 630 } else { 631 /* 632 * With kernel dtb support, rk3288 dwc2 otg node 633 * use the rockchip legacy dwc2 driver "dwc_otg_310" 634 * with the compatible "rockchip,rk3288_usb20_otg", 635 * and rk3368 also use the "dwc_otg_310" driver with 636 * the compatible "rockchip,rk3368-usb". 637 */ 638 #if defined(CONFIG_ROCKCHIP_RK3288) 639 node = fdt_node_offset_by_compatible(blob, -1, 640 "rockchip,rk3288_usb20_otg"); 641 #elif defined(CONFIG_ROCKCHIP_RK3368) 642 node = fdt_node_offset_by_compatible(blob, -1, 643 "rockchip,rk3368-usb"); 644 #endif 645 if (node > 0) { 646 goto retry; 647 } else { 648 pr_err("Not found usb_otg device\n"); 649 return -ENODEV; 650 } 651 } 652 653 otg_data.regs_otg = (uintptr_t)addr; 654 655 return dwc2_udc_probe(&otg_data); 656 } 657 658 int board_usb_cleanup(int index, enum usb_init_type init) 659 { 660 return 0; 661 } 662 #endif 663 664 static void bootm_no_reloc(void) 665 { 666 char *ramdisk_high; 667 char *fdt_high; 668 669 if (!env_get_yesno("bootm-no-reloc")) 670 return; 671 672 ramdisk_high = env_get("initrd_high"); 673 fdt_high = env_get("fdt_high"); 674 675 if (!fdt_high) { 676 env_set_hex("fdt_high", -1UL); 677 printf("Fdt "); 678 } 679 680 if (!ramdisk_high) { 681 env_set_hex("initrd_high", -1UL); 682 printf("Ramdisk "); 683 } 684 685 if (!fdt_high || !ramdisk_high) 686 printf("skip relocation\n"); 687 } 688 689 int bootm_board_start(void) 690 { 691 /* 692 * print console record data 693 * 694 * On some rockchip platforms, uart debug and sdmmc pin are multiplex. 695 * If boot from sdmmc mode, the console data would be record in buffer, 696 * we switch to uart debug function in order to print it after loading 697 * images. 698 */ 699 #if defined(CONFIG_CONSOLE_RECORD) 700 if (!strcmp("mmc", env_get("devtype")) && 701 !strcmp("1", env_get("devnum"))) { 702 printf("IOMUX: sdmmc => uart debug"); 703 pinctrl_select_state(gd->cur_serial_dev, "default"); 704 console_record_print_purge(); 705 } 706 #endif 707 /* disable bootm relcation to save boot time */ 708 bootm_no_reloc(); 709 710 /* sysmem */ 711 hotkey_run(HK_SYSMEM); 712 sysmem_overflow_check(); 713 714 return 0; 715 } 716 717 /* 718 * Implement it to support CLI command: 719 * - Android: bootm [aosp addr] 720 * - FIT: bootm [fit addr] 721 * - uImage: bootm [uimage addr] 722 * 723 * Purpose: 724 * - The original bootm command args require fdt addr on AOSP, 725 * which is not flexible on rockchip boot/recovery.img. 726 * - Take Android/FIT/uImage image into sysmem management to avoid image 727 * memory overlap. 728 */ 729 #if defined(CONFIG_ANDROID_BOOTLOADER) || \ 730 defined(CONFIG_ROCKCHIP_FIT_IMAGE) || \ 731 defined(CONFIG_ROCKCHIP_UIMAGE) 732 int board_do_bootm(int argc, char * const argv[]) 733 { 734 int format; 735 void *img; 736 737 if (argc != 2) 738 return 0; 739 740 img = (void *)simple_strtoul(argv[1], NULL, 16); 741 format = (genimg_get_format(img)); 742 743 /* Android */ 744 #ifdef CONFIG_ANDROID_BOOT_IMAGE 745 if (format == IMAGE_FORMAT_ANDROID) { 746 struct andr_img_hdr *hdr; 747 ulong load_addr; 748 ulong size; 749 int ret; 750 751 hdr = (struct andr_img_hdr *)img; 752 printf("BOOTM: transferring to board Android\n"); 753 754 #ifdef CONFIG_USING_KERNEL_DTB 755 sysmem_free((phys_addr_t)gd->fdt_blob); 756 /* erase magic */ 757 fdt_set_magic((void *)gd->fdt_blob, ~0); 758 gd->fdt_blob = NULL; 759 #endif 760 load_addr = env_get_ulong("kernel_addr_r", 16, 0); 761 load_addr -= hdr->page_size; 762 size = android_image_get_end(hdr) - (ulong)hdr; 763 764 if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size)) 765 return -ENOMEM; 766 767 ret = android_image_memcpy_separate(hdr, &load_addr); 768 if (ret) { 769 printf("board do bootm failed, ret=%d\n", ret); 770 return ret; 771 } 772 773 return android_bootloader_boot_kernel(load_addr); 774 } 775 #endif 776 777 /* FIT */ 778 #if IMAGE_ENABLE_FIT 779 if (format == IMAGE_FORMAT_FIT) { 780 char boot_cmd[64]; 781 782 printf("BOOTM: transferring to board FIT\n"); 783 snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]); 784 return run_command(boot_cmd, 0); 785 } 786 #endif 787 788 /* uImage */ 789 #if defined(CONFIG_IMAGE_FORMAT_LEGACY) 790 if (format == IMAGE_FORMAT_LEGACY && 791 image_get_type(img) == IH_TYPE_MULTI) { 792 char boot_cmd[64]; 793 794 printf("BOOTM: transferring to board uImage\n"); 795 snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]); 796 return run_command(boot_cmd, 0); 797 } 798 #endif 799 800 return 0; 801 } 802 #endif 803 804 void autoboot_command_fail_handle(void) 805 { 806 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE 807 #ifdef CONFIG_ANDROID_AB 808 run_command("fastboot usb 0;", 0); /* use fastboot to ative slot */ 809 #else 810 run_command("rockusb 0 ${devtype} ${devnum}", 0); 811 run_command("fastboot usb 0;", 0); 812 #endif 813 #endif 814 } 815 816 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 817 818 #define FIT_ROLLBACK_INDEX_LOCATION 0x66697472 /* "fitr" */ 819 820 int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index) 821 { 822 #ifdef CONFIG_OPTEE_CLIENT 823 u64 index; 824 int ret; 825 826 ret = trusty_read_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, &index); 827 if (ret) { 828 if (ret != TEE_ERROR_ITEM_NOT_FOUND) 829 return ret; 830 831 *otp_index = fit_index; 832 printf("Initial otp index as %d\n", fit_index); 833 } 834 835 *otp_index = index; 836 #else 837 *otp_index = 0; 838 #endif 839 840 return 0; 841 } 842 843 static int fit_write_trusty_rollback_index(u32 trusty_index) 844 { 845 if (!trusty_index) 846 return 0; 847 848 return trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, 849 (u64)trusty_index); 850 } 851 #endif 852 853 void board_quiesce_devices(void *images) 854 { 855 hotkey_run(HK_CMDLINE); 856 hotkey_run(HK_CLI_OS_GO); 857 858 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 859 /* Destroy atags makes next warm boot safer */ 860 atags_destroy(); 861 #endif 862 863 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 864 int ret; 865 866 ret = fit_write_trusty_rollback_index(gd->rollback_index); 867 if (ret) { 868 panic("Failed to write fit rollback index %d, ret=%d", 869 gd->rollback_index, ret); 870 } 871 #endif 872 873 #ifdef CONFIG_ROCKCHIP_HW_DECOMPRESS 874 misc_decompress_cleanup(); 875 #endif 876 } 877