1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #include <common.h> 7 #include <clk.h> 8 #include <dm.h> 9 #include <debug_uart.h> 10 #include <ram.h> 11 #include <syscon.h> 12 #include <asm/io.h> 13 #include <asm/arch/vendor.h> 14 #include <misc.h> 15 #include <asm/gpio.h> 16 #include <asm/arch/clock.h> 17 #include <asm/arch/periph.h> 18 #include <asm/arch/boot_mode.h> 19 #include <asm/arch/rk_atags.h> 20 #ifdef CONFIG_DM_CHARGE_DISPLAY 21 #include <power/charge_display.h> 22 #endif 23 #ifdef CONFIG_DM_REGULATOR 24 #include <power/regulator.h> 25 #endif 26 #ifdef CONFIG_DRM_ROCKCHIP 27 #include <video_rockchip.h> 28 #endif 29 #ifdef CONFIG_ROCKCHIP_DEBUGGER 30 #include <rockchip_debugger.h> 31 #endif 32 #ifdef CONFIG_DM_RAMDISK 33 #include <ramdisk.h> 34 #endif 35 #include <mmc.h> 36 #include <of_live.h> 37 #include <dm/root.h> 38 39 DECLARE_GLOBAL_DATA_PTR; 40 /* define serialno max length, the max length is 512 Bytes 41 * The remaining bytes are used to ensure that the first 512 bytes 42 * are valid when executing 'env_set("serial#", value)'. 43 */ 44 #define VENDOR_SN_MAX 513 45 #define CPUID_LEN 0x10 46 #define CPUID_OFF 0x7 47 48 static int rockchip_set_serialno(void) 49 { 50 char serialno_str[VENDOR_SN_MAX]; 51 int ret = 0, i; 52 u8 cpuid[CPUID_LEN] = {0}; 53 u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; 54 u64 serialno; 55 56 /* Read serial number from vendor storage part */ 57 memset(serialno_str, 0, VENDOR_SN_MAX); 58 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 59 ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1)); 60 if (ret > 0) { 61 env_set("serial#", serialno_str); 62 } else { 63 #endif 64 #ifdef CONFIG_ROCKCHIP_EFUSE 65 struct udevice *dev; 66 67 /* retrieve the device */ 68 ret = uclass_get_device_by_driver(UCLASS_MISC, 69 DM_GET_DRIVER(rockchip_efuse), &dev); 70 if (ret) { 71 printf("%s: could not find efuse device\n", __func__); 72 return ret; 73 } 74 /* read the cpu_id range from the efuses */ 75 ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid)); 76 if (ret) { 77 printf("%s: reading cpuid from the efuses failed\n", __func__); 78 return ret; 79 } 80 #else 81 /* generate random cpuid */ 82 for (i = 0; i < CPUID_LEN; i++) { 83 cpuid[i] = (u8)(rand()); 84 } 85 #endif 86 /* Generate the serial number based on CPU ID */ 87 for (i = 0; i < 8; i++) { 88 low[i] = cpuid[1 + (i << 1)]; 89 high[i] = cpuid[i << 1]; 90 } 91 serialno = crc32_no_comp(0, low, 8); 92 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; 93 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); 94 95 env_set("serial#", serialno_str); 96 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 97 } 98 #endif 99 return ret; 100 } 101 102 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) 103 int fb_set_reboot_flag(void) 104 { 105 printf("Setting reboot to fastboot flag ...\n"); 106 /* Set boot mode to fastboot */ 107 writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); 108 109 return 0; 110 } 111 #endif 112 113 #ifdef CONFIG_DM_CHARGE_DISPLAY 114 static int charge_display(void) 115 { 116 int ret; 117 struct udevice *dev; 118 119 ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev); 120 if (ret) { 121 if (ret != -ENODEV) { 122 debug("Get UCLASS CHARGE DISPLAY failed: %d\n", ret); 123 return ret; 124 } else { 125 debug("Can't find charge display driver\n"); 126 } 127 return 0; 128 } 129 130 return charge_display_show(dev); 131 } 132 #endif 133 134 __weak int rk_board_init(void) 135 { 136 return 0; 137 } 138 139 __weak int rk_board_late_init(void) 140 { 141 return 0; 142 } 143 144 __weak int soc_clk_dump(void) 145 { 146 return 0; 147 } 148 149 __weak int set_armclk_rate(void) 150 { 151 return 0; 152 } 153 154 int board_late_init(void) 155 { 156 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 157 setup_boot_mode(); 158 #endif 159 160 #ifdef CONFIG_DM_CHARGE_DISPLAY 161 charge_display(); 162 #endif 163 164 #ifdef CONFIG_DRM_ROCKCHIP 165 rockchip_show_logo(); 166 #endif 167 rockchip_set_serialno(); 168 169 soc_clk_dump(); 170 171 return rk_board_late_init(); 172 } 173 174 #ifdef CONFIG_USING_KERNEL_DTB 175 #include <asm/arch/resource_img.h> 176 177 int init_kernel_dtb(void) 178 { 179 int ret = 0; 180 ulong fdt_addr = 0; 181 182 #ifdef CONFIG_DM_MMC 183 ret = mmc_initialize(gd->bd); 184 if (ret) 185 debug("%s: mmc initialized failed, ret=%d\n", __func__ ,ret); 186 #else 187 ret = bramdisk_initialize(); 188 if (ret) 189 debug("%s: bramdisk initialized failed, ret=%d\n", __func__, ret); 190 #endif 191 192 fdt_addr = env_get_ulong("fdt_addr_r", 16, 0); 193 if (!fdt_addr) { 194 printf("No Found FDT Load Address.\n"); 195 return -1; 196 } 197 198 ret = rockchip_read_dtb_file((void *)fdt_addr); 199 if (ret < 0) { 200 printf("%s dtb in resource read fail\n", __func__); 201 return 0; 202 } 203 204 of_live_build((void *)fdt_addr, (struct device_node **)&gd->of_root); 205 206 dm_scan_fdt((void *)fdt_addr, false); 207 208 gd->fdt_blob = (void *)fdt_addr; 209 210 printf("Using kernel dtb\n"); 211 212 return 0; 213 } 214 #endif 215 216 217 int board_init(void) 218 { 219 int ret; 220 221 board_debug_uart_init(); 222 223 #ifdef CONFIG_USING_KERNEL_DTB 224 init_kernel_dtb(); 225 #endif 226 /* 227 * pmucru isn't referenced on some platforms, so pmucru driver can't 228 * probe that the "assigned-clocks" is unused. 229 */ 230 clks_probe(); 231 #ifdef CONFIG_DM_REGULATOR 232 ret = regulators_enable_boot_on(false); 233 if (ret) 234 debug("%s: Cannot enable boot on regulator\n", __func__); 235 #endif 236 set_armclk_rate(); 237 238 return rk_board_init(); 239 } 240 241 int interrupt_debugger_init(void) 242 { 243 int ret = 0; 244 245 #ifdef CONFIG_ROCKCHIP_DEBUGGER 246 ret = rockchip_debugger_init(); 247 #endif 248 return ret; 249 } 250 251 int board_fdt_fixup(void *blob) 252 { 253 __maybe_unused int ret = 0; 254 255 #ifdef CONFIG_DRM_ROCKCHIP 256 rockchip_display_fixup(blob); 257 #endif 258 259 #ifdef CONFIG_ROCKCHIP_RK3288 260 /* RK3288W HDMI Revision ID is 0x1A */ 261 if (readl(0xff980004) == 0x1A) { 262 ret = fdt_setprop_string(blob, 0, 263 "compatible", "rockchip,rk3288w"); 264 if (ret) 265 printf("fdt set compatible failed: %d\n", ret); 266 } 267 #endif 268 269 return ret; 270 } 271 272 void enable_caches(void) 273 { 274 icache_enable(); 275 dcache_enable(); 276 } 277 278 /* 279 * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize". 280 * This makes lmb_alloc_base() always alloc from tail of sdram. 281 * If we don't assign it, bi_dram[0] is used by default and it may cause 282 * lmb_alloc_base() fail when bi_dram[0] range is small. 283 */ 284 void board_lmb_reserve(struct lmb *lmb) 285 { 286 u64 start, size; 287 char bootm_low[32]; 288 char bootm_mapsize[32]; 289 int i; 290 291 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 292 if (!gd->bd->bi_dram[i].size) 293 break; 294 } 295 296 start = gd->bd->bi_dram[i - 1].start; 297 size = gd->bd->bi_dram[i - 1].size; 298 299 /* 300 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area, otherwise 301 * "Unable to handle kernel paging request at virtual address ...". 302 * If so, using low address region, i.e before tustos region(132MB). 303 */ 304 #ifndef ARM64 305 if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_768M)) { 306 start = gd->bd->bi_dram[i - 2].start; 307 size = gd->bd->bi_dram[i - 2].size; 308 } 309 310 if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_768M)) 311 size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_768M - start; 312 #endif 313 sprintf(bootm_low, "0x%llx", start); 314 sprintf(bootm_mapsize, "0x%llx", size); 315 env_set("bootm_low", bootm_low); 316 env_set("bootm_mapsize", bootm_mapsize); 317 } 318 319 #ifdef CONFIG_ROCKCHIP_PRELOADER_SERIAL 320 int board_init_f_init_serial(void) 321 { 322 struct tag *t = atags_get_tag(ATAG_SERIAL); 323 324 if (t) { 325 gd->serial.using_pre_serial = t->u.serial.enable; 326 gd->serial.addr = t->u.serial.addr; 327 gd->serial.baudrate = t->u.serial.baudrate; 328 gd->serial.id = t->u.serial.id; 329 330 debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n", 331 __func__, gd->serial.using_pre_serial, 332 gd->serial.addr, gd->serial.baudrate, 333 gd->serial.id); 334 } 335 336 return 0; 337 } 338 #endif 339 340 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 341 #include <fdt_support.h> 342 #include <usb.h> 343 #include <usb/dwc2_udc.h> 344 345 static struct dwc2_plat_otg_data otg_data = { 346 .rx_fifo_sz = 512, 347 .np_tx_fifo_sz = 16, 348 .tx_fifo_sz = 128, 349 }; 350 351 int board_usb_init(int index, enum usb_init_type init) 352 { 353 int node; 354 const char *mode; 355 fdt_addr_t addr; 356 const fdt32_t *reg; 357 bool matched = false; 358 const void *blob = gd->fdt_blob; 359 360 /* find the usb_otg node */ 361 node = fdt_node_offset_by_compatible(blob, -1, 362 "snps,dwc2"); 363 364 while (node > 0) { 365 mode = fdt_getprop(blob, node, "dr_mode", NULL); 366 if (mode && strcmp(mode, "otg") == 0) { 367 matched = true; 368 break; 369 } 370 371 node = fdt_node_offset_by_compatible(blob, node, 372 "snps,dwc2"); 373 } 374 375 if (!matched) { 376 /* 377 * With kernel dtb support, rk3288 dwc2 otg node 378 * use the rockchip legacy dwc2 driver "dwc_otg_310" 379 * with the compatible "rockchip,rk3288_usb20_otg", 380 * and rk3368 also use the "dwc_otg_310" driver with 381 * the compatible "rockchip,rk3368-usb". 382 */ 383 #if defined(CONFIG_ROCKCHIP_RK3288) 384 node = fdt_node_offset_by_compatible(blob, -1, 385 "rockchip,rk3288_usb20_otg"); 386 #elif defined(CONFIG_ROCKCHIP_RK3368) 387 node = fdt_node_offset_by_compatible(blob, -1, 388 "rockchip,rk3368-usb"); 389 #endif 390 391 if (node > 0) { 392 matched = true; 393 } else { 394 pr_err("Not found usb_otg device\n"); 395 return -ENODEV; 396 } 397 } 398 399 reg = fdt_getprop(blob, node, "reg", NULL); 400 if (!reg) 401 return -EINVAL; 402 403 addr = fdt_translate_address(blob, node, reg); 404 if (addr == OF_BAD_ADDR) { 405 pr_err("Not found usb_otg address\n"); 406 return -EINVAL; 407 } 408 409 otg_data.regs_otg = (uintptr_t)addr; 410 411 return dwc2_udc_probe(&otg_data); 412 } 413 414 int board_usb_cleanup(int index, enum usb_init_type init) 415 { 416 return 0; 417 } 418 #endif 419