xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/board.c (revision 1636e7c2d44abbfb7db4fa675149e822d0b2cc99)
1 /*
2  * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 #include <common.h>
7 #include <clk.h>
8 #include <dm.h>
9 #include <debug_uart.h>
10 #include <ram.h>
11 #include <syscon.h>
12 #include <asm/io.h>
13 #include <asm/arch/vendor.h>
14 #include <misc.h>
15 #include <asm/gpio.h>
16 #include <asm/arch/clock.h>
17 #include <asm/arch/periph.h>
18 #include <asm/arch/boot_mode.h>
19 #ifdef CONFIG_DM_CHARGE_DISPLAY
20 #include <power/charge_display.h>
21 #endif
22 #ifdef CONFIG_DM_REGULATOR
23 #include <power/regulator.h>
24 #endif
25 #ifdef CONFIG_DRM_ROCKCHIP
26 #include <video_rockchip.h>
27 #endif
28 #include <mmc.h>
29 #include <of_live.h>
30 #include <dm/root.h>
31 
32 DECLARE_GLOBAL_DATA_PTR;
33 /* define serialno max length, the max length is 512 Bytes
34  * The remaining bytes are used to ensure that the first 512 bytes
35  * are valid when executing 'env_set("serial#", value)'.
36  */
37 #define VENDOR_SN_MAX	513
38 #define CPUID_LEN       0x10
39 #define CPUID_OFF       0x7
40 
41 static int rockchip_set_serialno(void)
42 {
43 	char serialno_str[VENDOR_SN_MAX];
44 	int ret = 0, i;
45 	u8 cpuid[CPUID_LEN] = {0};
46 	u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2];
47 	u64 serialno;
48 
49 	/* Read serial number from vendor storage part */
50 	memset(serialno_str, 0, VENDOR_SN_MAX);
51 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
52 	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
53 	if (ret > 0) {
54 		env_set("serial#", serialno_str);
55 	} else {
56 #endif
57 #ifdef CONFIG_ROCKCHIP_EFUSE
58 		struct udevice *dev;
59 
60 		/* retrieve the device */
61 		ret = uclass_get_device_by_driver(UCLASS_MISC,
62 						  DM_GET_DRIVER(rockchip_efuse), &dev);
63 		if (ret) {
64 			printf("%s: could not find efuse device\n", __func__);
65 			return ret;
66 		}
67 		/* read the cpu_id range from the efuses */
68 		ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid));
69 		if (ret) {
70 			printf("%s: reading cpuid from the efuses failed\n", __func__);
71 			return ret;
72 		}
73 #else
74 		/* generate random cpuid */
75 		for (i = 0; i < CPUID_LEN; i++) {
76 			cpuid[i] = (u8)(rand());
77 		}
78 #endif
79 		/* Generate the serial number based on CPU ID */
80 		for (i = 0; i < 8; i++) {
81 			low[i] = cpuid[1 + (i << 1)];
82 			high[i] = cpuid[i << 1];
83 		}
84 		serialno = crc32_no_comp(0, low, 8);
85 		serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
86 		snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
87 
88 		env_set("serial#", serialno_str);
89 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
90 	}
91 #endif
92 	return ret;
93 }
94 
95 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
96 int fb_set_reboot_flag(void)
97 {
98 	printf("Setting reboot to fastboot flag ...\n");
99 	/* Set boot mode to fastboot */
100 	writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);
101 
102 	return 0;
103 }
104 #endif
105 
106 #ifdef CONFIG_DM_CHARGE_DISPLAY
107 static int charge_display(void)
108 {
109 	int ret;
110 	struct udevice *dev;
111 
112 	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
113 	if (ret) {
114 		if (ret != -ENODEV) {
115 			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
116 			return ret;
117 		}
118 		return 0;
119 	}
120 
121 	return charge_display_show(dev);
122 }
123 #endif
124 
125 __weak int rk_board_init(void)
126 {
127 	return 0;
128 }
129 
130 __weak int rk_board_late_init(void)
131 {
132 	return 0;
133 }
134 
135 __weak int soc_clk_dump(void)
136 {
137 	return 0;
138 }
139 
140 int board_late_init(void)
141 {
142 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
143 	setup_boot_mode();
144 #endif
145 
146 #ifdef CONFIG_DM_CHARGE_DISPLAY
147 	charge_display();
148 #endif
149 
150 #ifdef CONFIG_DRM_ROCKCHIP
151 	rockchip_show_logo();
152 #endif
153 	rockchip_set_serialno();
154 
155 	soc_clk_dump();
156 
157 	return rk_board_late_init();
158 }
159 
160 #ifdef CONFIG_USING_KERNEL_DTB
161 #include <asm/arch/resource_img.h>
162 
163 int init_kernel_dtb(void)
164 {
165 	int ret = 0;
166 	struct mmc *mmc;
167 	struct udevice *dev;
168 	ulong fdt_addr = 0;
169 
170 	ret = mmc_initialize(gd->bd);
171 	if (ret)
172 		goto scan_nand;
173 	mmc = find_mmc_device(0);
174 	if (!mmc) {
175 		printf("no mmc device at slot 0\n");
176 		goto scan_nand;
177 	}
178 	ret = mmc_init(mmc);
179 	if (!ret)
180 		goto init_dtb;
181 	printf("%s mmc init fail %d\n", __func__, ret);
182 scan_nand:
183 	ret = uclass_get_device(UCLASS_RKNAND, 0, &dev);
184 	if (ret) {
185 		printf("%s: Cannot find rknand device\n", __func__);
186 		return -1;
187 	}
188 
189 init_dtb:
190 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
191 	if (!fdt_addr) {
192 		printf("No Found FDT Load Address.\n");
193 		return -1;
194 	}
195 
196 	ret = rockchip_read_dtb_file((void *)fdt_addr);
197 	if (ret < 0) {
198 		printf("%s dtb in resource read fail\n", __func__);
199 		return 0;
200 	}
201 
202 	of_live_build((void *)fdt_addr, (struct device_node **)&gd->of_root);
203 
204 	dm_scan_fdt((void *)fdt_addr, false);
205 
206 	gd->fdt_blob = (void *)fdt_addr;
207 
208 	return 0;
209 }
210 #endif
211 
212 
213 int board_init(void)
214 {
215 	int ret;
216 
217 #if !defined(CONFIG_SUPPORT_SPL)
218 	board_debug_uart_init();
219 #endif
220 #ifdef CONFIG_USING_KERNEL_DTB
221 	init_kernel_dtb();
222 #endif
223 	/*
224 	 * pmucru isn't referenced on some platforms, so pmucru driver can't
225 	 * probe that the "assigned-clocks" is unused.
226 	 */
227 	clks_probe();
228 #ifdef CONFIG_DM_REGULATOR
229 	ret = regulators_enable_boot_on(false);
230 	if (ret)
231 		debug("%s: Cannot enable boot on regulator\n", __func__);
232 #endif
233 
234 	return rk_board_init();
235 }
236 
237 int board_fdt_fixup(void *blob)
238 {
239 	__maybe_unused int ret = 0;
240 
241 #ifdef CONFIG_DRM_ROCKCHIP
242 	rockchip_display_fixup(blob);
243 #endif
244 
245 #ifdef CONFIG_ROCKCHIP_RK3288
246 	/* RK3288W HDMI Revision ID is 0x1A */
247 	if (readl(0xff980004) == 0x1A) {
248 		ret = fdt_setprop_string(blob, 0,
249 					 "compatible", "rockchip,rk3288w");
250 		if (ret)
251 			printf("fdt set compatible failed: %d\n", ret);
252 	}
253 #endif
254 
255 	return ret;
256 }
257 
258 #if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
259 void enable_caches(void)
260 {
261 	/* Enable D-cache. I-cache is already enabled in start.S */
262 	dcache_enable();
263 }
264 #endif
265 
266 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
267 #include <fdt_support.h>
268 #include <usb.h>
269 #include <usb/dwc2_udc.h>
270 
271 static struct dwc2_plat_otg_data otg_data = {
272 	.rx_fifo_sz	= 512,
273 	.np_tx_fifo_sz	= 16,
274 	.tx_fifo_sz	= 128,
275 };
276 
277 int board_usb_init(int index, enum usb_init_type init)
278 {
279 	int node;
280 	const char *mode;
281 	fdt_addr_t addr;
282 	const fdt32_t *reg;
283 	bool matched = false;
284 	const void *blob = gd->fdt_blob;
285 
286 	/* find the usb_otg node */
287 	node = fdt_node_offset_by_compatible(blob, -1,
288 					"snps,dwc2");
289 
290 	while (node > 0) {
291 		mode = fdt_getprop(blob, node, "dr_mode", NULL);
292 		if (mode && strcmp(mode, "otg") == 0) {
293 			matched = true;
294 			break;
295 		}
296 
297 		node = fdt_node_offset_by_compatible(blob, node,
298 					"snps,dwc2");
299 	}
300 	if (!matched) {
301 		debug("Not found usb_otg device\n");
302 		return -ENODEV;
303 	}
304 
305 	reg = fdt_getprop(blob, node, "reg", NULL);
306 	if (!reg)
307 		return -EINVAL;
308 
309 	addr = fdt_translate_address(blob, node, reg);
310 	if (addr == OF_BAD_ADDR) {
311 		pr_err("Not found usb_otg address\n");
312 		return -EINVAL;
313 	}
314 
315 	otg_data.regs_otg = (uintptr_t)addr;
316 
317 	return dwc2_udc_probe(&otg_data);
318 }
319 
320 int board_usb_cleanup(int index, enum usb_init_type init)
321 {
322 	return 0;
323 }
324 #endif
325