1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <amp.h> 9 #include <android_ab.h> 10 #include <android_bootloader.h> 11 #include <android_image.h> 12 #include <bidram.h> 13 #include <boot_rkimg.h> 14 #include <cli.h> 15 #include <clk.h> 16 #include <console.h> 17 #include <debug_uart.h> 18 #include <dm.h> 19 #include <dvfs.h> 20 #include <io-domain.h> 21 #include <image.h> 22 #include <key.h> 23 #include <memblk.h> 24 #include <misc.h> 25 #include <of_live.h> 26 #include <mtd_blk.h> 27 #include <ram.h> 28 #include <rockchip_debugger.h> 29 #include <syscon.h> 30 #include <sysmem.h> 31 #include <video_rockchip.h> 32 #include <asm/io.h> 33 #include <asm/gpio.h> 34 #include <android_avb/rk_avb_ops_user.h> 35 #include <dm/uclass-internal.h> 36 #include <dm/root.h> 37 #include <power/charge_display.h> 38 #include <power/regulator.h> 39 #include <optee_include/OpteeClientInterface.h> 40 #include <optee_include/OpteeClientApiLib.h> 41 #include <optee_include/tee_api_defines.h> 42 #include <asm/arch/boot_mode.h> 43 #include <asm/arch/clock.h> 44 #include <asm/arch/cpu.h> 45 #include <asm/arch/hotkey.h> 46 #include <asm/arch/param.h> 47 #include <asm/arch/periph.h> 48 #include <asm/arch/resource_img.h> 49 #include <asm/arch/rk_atags.h> 50 #include <asm/arch/vendor.h> 51 #ifdef CONFIG_ROCKCHIP_EINK_DISPLAY 52 #include <rk_eink.h> 53 #endif 54 DECLARE_GLOBAL_DATA_PTR; 55 56 __weak int rk_board_late_init(void) 57 { 58 return 0; 59 } 60 61 __weak int rk_board_fdt_fixup(void *blob) 62 { 63 return 0; 64 } 65 66 __weak int soc_clk_dump(void) 67 { 68 return 0; 69 } 70 71 __weak int set_armclk_rate(void) 72 { 73 return 0; 74 } 75 76 __weak int rk_board_init(void) 77 { 78 return 0; 79 } 80 81 /* 82 * define serialno max length, the max length is 512 Bytes 83 * The remaining bytes are used to ensure that the first 512 bytes 84 * are valid when executing 'env_set("serial#", value)'. 85 */ 86 #define VENDOR_SN_MAX 513 87 #define CPUID_LEN 0x10 88 #define CPUID_OFF 0x07 89 90 #define MAX_ETHERNET 0x2 91 92 static int rockchip_set_ethaddr(void) 93 { 94 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 95 char buf[ARP_HLEN_ASCII + 1], mac[16]; 96 u8 ethaddr[ARP_HLEN * MAX_ETHERNET] = {0}; 97 int ret, i; 98 bool need_write = false, randomed = false; 99 100 ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr)); 101 for (i = 0; i < MAX_ETHERNET; i++) { 102 if (ret <= 0 || !is_valid_ethaddr(ðaddr[i * ARP_HLEN])) { 103 if (!randomed) { 104 net_random_ethaddr(ðaddr[i * ARP_HLEN]); 105 randomed = true; 106 } else { 107 if (i > 0) { 108 memcpy(ðaddr[i * ARP_HLEN], 109 ðaddr[(i - 1) * ARP_HLEN], 110 ARP_HLEN); 111 ethaddr[i * ARP_HLEN] |= 0x02; 112 ethaddr[i * ARP_HLEN] += (i << 2); 113 } 114 } 115 116 need_write = true; 117 } 118 119 if (is_valid_ethaddr(ðaddr[i * ARP_HLEN])) { 120 sprintf(buf, "%pM", ðaddr[i * ARP_HLEN]); 121 if (i == 0) 122 memcpy(mac, "ethaddr", sizeof("ethaddr")); 123 else 124 sprintf(mac, "eth%daddr", i); 125 env_set(mac, buf); 126 } 127 } 128 129 if (need_write) { 130 ret = vendor_storage_write(VENDOR_LAN_MAC_ID, 131 ethaddr, sizeof(ethaddr)); 132 if (ret < 0) 133 printf("%s: vendor_storage_write failed %d\n", 134 __func__, ret); 135 } 136 #endif 137 138 return 0; 139 } 140 141 static int rockchip_set_serialno(void) 142 { 143 u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; 144 u8 cpuid[CPUID_LEN] = {0}; 145 char serialno_str[VENDOR_SN_MAX]; 146 int ret = 0, i; 147 u64 serialno; 148 149 /* Read serial number from vendor storage part */ 150 memset(serialno_str, 0, VENDOR_SN_MAX); 151 152 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 153 ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1)); 154 if (ret > 0) { 155 i = strlen(serialno_str); 156 for (; i > 0; i--) { 157 if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') || 158 (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') || 159 (serialno_str[i] >= '0' && serialno_str[i] <= '9')) 160 break; 161 } 162 163 serialno_str[i + 1] = 0x0; 164 env_set("serial#", serialno_str); 165 } else { 166 #endif 167 #if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP) 168 struct udevice *dev; 169 170 /* retrieve the device */ 171 if (IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)) 172 ret = uclass_get_device_by_driver(UCLASS_MISC, 173 DM_GET_DRIVER(rockchip_efuse), 174 &dev); 175 else 176 ret = uclass_get_device_by_driver(UCLASS_MISC, 177 DM_GET_DRIVER(rockchip_otp), 178 &dev); 179 180 if (ret) { 181 printf("%s: could not find efuse/otp device\n", __func__); 182 return ret; 183 } 184 185 /* read the cpu_id range from the efuses */ 186 ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid)); 187 if (ret) { 188 printf("%s: read cpuid from efuse/otp failed, ret=%d\n", 189 __func__, ret); 190 return ret; 191 } 192 #else 193 /* generate random cpuid */ 194 for (i = 0; i < CPUID_LEN; i++) 195 cpuid[i] = (u8)(rand()); 196 #endif 197 /* Generate the serial number based on CPU ID */ 198 for (i = 0; i < 8; i++) { 199 low[i] = cpuid[1 + (i << 1)]; 200 high[i] = cpuid[i << 1]; 201 } 202 203 serialno = crc32_no_comp(0, low, 8); 204 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; 205 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); 206 207 env_set("serial#", serialno_str); 208 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 209 } 210 #endif 211 212 return ret; 213 } 214 215 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) 216 int fb_set_reboot_flag(void) 217 { 218 printf("Setting reboot to fastboot flag ...\n"); 219 writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); 220 221 return 0; 222 } 223 #endif 224 225 #ifdef CONFIG_ROCKCHIP_USB_BOOT 226 static int boot_from_udisk(void) 227 { 228 struct blk_desc *desc; 229 char *devtype; 230 char *devnum; 231 232 devtype = env_get("devtype"); 233 devnum = env_get("devnum"); 234 235 /* Booting priority: mmc1 > udisk */ 236 if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1")) 237 return 0; 238 239 if (!run_command("usb start", -1)) { 240 desc = blk_get_devnum_by_type(IF_TYPE_USB, 0); 241 if (!desc) { 242 printf("No usb device found\n"); 243 return -ENODEV; 244 } 245 246 if (!run_command("rkimgtest usb 0", -1)) { 247 rockchip_set_bootdev(desc); 248 env_set("devtype", "usb"); 249 env_set("devnum", "0"); 250 printf("Boot from usb 0\n"); 251 } else { 252 printf("No usb dev 0 found\n"); 253 return -ENODEV; 254 } 255 } 256 257 return 0; 258 } 259 #endif 260 261 static void env_fixup(void) 262 { 263 struct memblock mem; 264 ulong u_addr_r; 265 phys_size_t end; 266 char *addr_r; 267 268 #ifdef ENV_MEM_LAYOUT_SETTINGS1 269 const char *env_addr0[] = { 270 "scriptaddr", "pxefile_addr_r", 271 "fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r", 272 }; 273 const char *env_addr1[] = { 274 "scriptaddr1", "pxefile_addr1_r", 275 "fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r", 276 }; 277 int i; 278 279 /* 128M is a typical ram size for most platform, so as default here */ 280 if (gd->ram_size <= SZ_128M) { 281 /* Replace orignal xxx_addr_r */ 282 for (i = 0; i < ARRAY_SIZE(env_addr1); i++) { 283 addr_r = env_get(env_addr1[i]); 284 if (addr_r) 285 env_set(env_addr0[i], addr_r); 286 } 287 } 288 #endif 289 /* No BL32 ? */ 290 if (!(gd->flags & GD_FLG_BL32_ENABLED)) { 291 /* 292 * [1] Move kernel to lower address if possible. 293 */ 294 addr_r = env_get("kernel_addr_no_low_bl32_r"); 295 if (addr_r) 296 env_set("kernel_addr_r", addr_r); 297 298 /* 299 * [2] Move ramdisk at BL32 position if need. 300 * 301 * 0x0a200000 and 0x08400000 are rockchip traditional address 302 * of BL32 and ramdisk: 303 * 304 * |------------|------------| 305 * | BL32 | ramdisk | 306 * |------------|------------| 307 * 308 * Move ramdisk to BL32 address to fix sysmem alloc failed 309 * issue on the board with critical memory(ie. 256MB). 310 */ 311 if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) { 312 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 313 if (u_addr_r == 0x0a200000) 314 env_set("ramdisk_addr_r", "0x08400000"); 315 } 316 } else { 317 mem = param_parse_optee_mem(); 318 319 /* 320 * [1] Move kernel forward if possible. 321 */ 322 if (mem.base > SZ_128M) { 323 addr_r = env_get("kernel_addr_no_low_bl32_r"); 324 if (addr_r) 325 env_set("kernel_addr_r", addr_r); 326 } 327 328 /* 329 * [2] Move ramdisk backward if optee enlarge. 330 */ 331 end = mem.base + mem.size; 332 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 333 if (u_addr_r >= mem.base && u_addr_r < end) 334 env_set_hex("ramdisk_addr_r", end); 335 } 336 } 337 338 static void cmdline_handle(void) 339 { 340 struct blk_desc *dev_desc; 341 342 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 343 struct tag *t; 344 345 t = atags_get_tag(ATAG_PUB_KEY); 346 if (t) { 347 /* Pass if efuse/otp programmed */ 348 if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED) 349 env_update("bootargs", "fuse.programmed=1"); 350 else 351 env_update("bootargs", "fuse.programmed=0"); 352 } 353 #endif 354 dev_desc = rockchip_get_bootdev(); 355 if (!dev_desc) 356 return; 357 358 if (get_bcb_recovery_msg() == BCB_MSG_RECOVERY_RK_FWUPDATE) { 359 if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 1) 360 env_update("bootargs", "sdfwupdate"); 361 else if (dev_desc->if_type == IF_TYPE_USB && dev_desc->devnum == 0) 362 env_update("bootargs", "usbfwupdate"); 363 } 364 } 365 366 int board_late_init(void) 367 { 368 rockchip_set_ethaddr(); 369 rockchip_set_serialno(); 370 setup_download_mode(); 371 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 372 setup_boot_mode(); 373 #endif 374 #ifdef CONFIG_AMP 375 amp_cpus_on(); 376 #endif 377 #ifdef CONFIG_ROCKCHIP_USB_BOOT 378 boot_from_udisk(); 379 #endif 380 #ifdef CONFIG_DM_CHARGE_DISPLAY 381 charge_display(); 382 #endif 383 #ifdef CONFIG_DRM_ROCKCHIP 384 rockchip_show_logo(); 385 #endif 386 #ifdef CONFIG_ROCKCHIP_EINK_DISPLAY 387 rockchip_eink_show_uboot_logo(); 388 #endif 389 env_fixup(); 390 soc_clk_dump(); 391 cmdline_handle(); 392 393 return rk_board_late_init(); 394 } 395 396 static void early_download(void) 397 { 398 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \ 399 (CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0) 400 if (pwrkey_download_init()) 401 printf("Pwrkey download init failed\n"); 402 #endif 403 404 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 405 if (is_hotkey(HK_BROM_DNL)) { 406 printf("Enter bootrom download..."); 407 flushc(); 408 writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); 409 do_reset(NULL, 0, 0, NULL); 410 printf("failed!\n"); 411 } 412 #endif 413 } 414 415 static void board_debug_init(void) 416 { 417 if (!gd->serial.using_pre_serial && 418 !(gd->flags & GD_FLG_DISABLE_CONSOLE)) 419 debug_uart_init(); 420 421 if (tstc()) { 422 gd->console_evt = getc(); 423 if (gd->console_evt <= 0x1a) /* 'z' */ 424 printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1); 425 } 426 427 if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI)) 428 printf("Cmd interface: disabled\n"); 429 } 430 431 #ifdef CONFIG_MTD_BLK 432 static void board_mtd_blk_map_partitions(void) 433 { 434 struct blk_desc *dev_desc; 435 436 dev_desc = rockchip_get_bootdev(); 437 if (dev_desc) 438 mtd_blk_map_partitions(dev_desc); 439 } 440 #endif 441 442 int board_init(void) 443 { 444 board_debug_init(); 445 446 #ifdef DEBUG 447 soc_clk_dump(); 448 #endif 449 450 #ifdef CONFIG_USING_KERNEL_DTB 451 #ifdef CONFIG_MTD_BLK 452 board_mtd_blk_map_partitions(); 453 #endif 454 init_kernel_dtb(); 455 #endif 456 early_download(); 457 458 /* 459 * pmucru isn't referenced on some platforms, so pmucru driver can't 460 * probe that the "assigned-clocks" is unused. 461 */ 462 clks_probe(); 463 #ifdef CONFIG_DM_REGULATOR 464 if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR))) 465 debug("%s: Can't enable boot on regulator\n", __func__); 466 #endif 467 468 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN 469 io_domain_init(); 470 #endif 471 472 set_armclk_rate(); 473 474 #ifdef CONFIG_DM_DVFS 475 dvfs_init(true); 476 #endif 477 478 #ifdef CONFIG_ANDROID_AB 479 if (ab_decrease_tries()) 480 printf("Decrease ab tries count fail!\n"); 481 #endif 482 483 return rk_board_init(); 484 } 485 486 int interrupt_debugger_init(void) 487 { 488 #ifdef CONFIG_ROCKCHIP_DEBUGGER 489 return rockchip_debugger_init(); 490 #else 491 return 0; 492 #endif 493 } 494 495 int board_fdt_fixup(void *blob) 496 { 497 /* Common fixup for DRM */ 498 #ifdef CONFIG_DRM_ROCKCHIP 499 rockchip_display_fixup(blob); 500 #endif 501 502 return rk_board_fdt_fixup(blob); 503 } 504 505 #if defined(CONFIG_ARM64_BOOT_AARCH32) || !defined(CONFIG_ARM64) 506 /* 507 * Common for OP-TEE: 508 * 64-bit & 32-bit mode: share memory dcache is always enabled; 509 * 510 * Common for U-Boot: 511 * 64-bit mode: MMU table is static defined in rkxxx.c file, all memory 512 * regions are mapped. That's good to match OP-TEE MMU policy. 513 * 514 * 32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where 515 * the OP-TEE region has been reserved, so it can not be 516 * mapped(i.e. dcache is disabled). That's *NOT* good to match 517 * OP-TEE MMU policy. 518 * 519 * For the data coherence when communication between U-Boot and OP-TEE, U-Boot 520 * should follow OP-TEE MMU policy. 521 * 522 * So 32-bit mode U-Boot should map OP-TEE share memory as dcache enabled. 523 */ 524 int board_initr_caches_fixup(void) 525 { 526 #ifdef CONFIG_OPTEE_CLIENT 527 struct memblock mem; 528 529 mem.base = 0; 530 mem.size = 0; 531 532 optee_get_shm_config(&mem.base, &mem.size); 533 if (mem.size) 534 mmu_set_region_dcache_behaviour(mem.base, mem.size, 535 DCACHE_WRITEBACK); 536 #endif 537 return 0; 538 } 539 #endif 540 541 void arch_preboot_os(uint32_t bootm_state) 542 { 543 if (bootm_state & BOOTM_STATE_OS_PREP) 544 hotkey_run(HK_CLI_OS_PRE); 545 } 546 547 void enable_caches(void) 548 { 549 icache_enable(); 550 dcache_enable(); 551 } 552 553 #ifdef CONFIG_LMB 554 /* 555 * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize". 556 * This makes lmb_alloc_base() always alloc from tail of sdram. 557 * If we don't assign it, bi_dram[0] is used by default and it may cause 558 * lmb_alloc_base() fail when bi_dram[0] range is small. 559 */ 560 void board_lmb_reserve(struct lmb *lmb) 561 { 562 char bootm_mapsize[32]; 563 char bootm_low[32]; 564 u64 start, size; 565 int i; 566 567 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 568 if (!gd->bd->bi_dram[i].size) 569 break; 570 } 571 572 start = gd->bd->bi_dram[i - 1].start; 573 size = gd->bd->bi_dram[i - 1].size; 574 575 /* 576 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+), 577 * otherwise "Unable to handle kernel paging request at virtual address ...". 578 * 579 * So that we hope limit highest address at 768M, but there comes the the 580 * problem: ramdisk is a compressed image and it expands after descompress, 581 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...". 582 * 583 * We make a appointment that the highest memory address is 512MB, it 584 * makes lmb alloc safer. 585 */ 586 #ifndef CONFIG_ARM64 587 if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) { 588 start = gd->bd->bi_dram[i - 2].start; 589 size = gd->bd->bi_dram[i - 2].size; 590 } 591 592 if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) 593 size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start; 594 #endif 595 sprintf(bootm_low, "0x%llx", start); 596 sprintf(bootm_mapsize, "0x%llx", size); 597 env_set("bootm_low", bootm_low); 598 env_set("bootm_mapsize", bootm_mapsize); 599 } 600 #endif 601 602 #ifdef CONFIG_BIDRAM 603 int board_bidram_reserve(struct bidram *bidram) 604 { 605 struct memblock mem; 606 int ret; 607 608 /* ATF */ 609 mem = param_parse_atf_mem(); 610 ret = bidram_reserve(MEM_ATF, mem.base, mem.size); 611 if (ret) 612 return ret; 613 614 /* PSTORE/ATAGS/SHM */ 615 mem = param_parse_common_resv_mem(); 616 ret = bidram_reserve(MEM_SHM, mem.base, mem.size); 617 if (ret) 618 return ret; 619 620 /* OP-TEE */ 621 mem = param_parse_optee_mem(); 622 ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size); 623 if (ret) 624 return ret; 625 626 return 0; 627 } 628 629 parse_fn_t board_bidram_parse_fn(void) 630 { 631 return param_parse_ddr_mem; 632 } 633 #endif 634 635 int board_init_f_boot_flags(void) 636 { 637 int boot_flags = 0; 638 639 /* pre-loader serial */ 640 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \ 641 defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) 642 struct tag *t; 643 644 t = atags_get_tag(ATAG_SERIAL); 645 if (t) { 646 gd->serial.using_pre_serial = 1; 647 gd->serial.enable = t->u.serial.enable; 648 gd->serial.baudrate = t->u.serial.baudrate; 649 gd->serial.addr = t->u.serial.addr; 650 gd->serial.id = t->u.serial.id; 651 gd->baudrate = CONFIG_BAUDRATE; 652 if (!t->u.serial.enable) 653 boot_flags |= GD_FLG_DISABLE_CONSOLE; 654 debug("preloader: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n", 655 gd->serial.enable, gd->serial.addr, 656 gd->serial.baudrate, gd->serial.id); 657 } else 658 #endif 659 { 660 gd->baudrate = CONFIG_BAUDRATE; 661 gd->serial.baudrate = CONFIG_BAUDRATE; 662 gd->serial.addr = CONFIG_DEBUG_UART_BASE; 663 } 664 665 /* The highest priority to turn off (override) console */ 666 #if defined(CONFIG_DISABLE_CONSOLE) 667 boot_flags |= GD_FLG_DISABLE_CONSOLE; 668 #endif 669 670 return boot_flags; 671 } 672 673 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 674 #include <fdt_support.h> 675 #include <usb.h> 676 #include <usb/dwc2_udc.h> 677 678 static struct dwc2_plat_otg_data otg_data = { 679 .rx_fifo_sz = 512, 680 .np_tx_fifo_sz = 16, 681 .tx_fifo_sz = 128, 682 }; 683 684 int board_usb_init(int index, enum usb_init_type init) 685 { 686 const void *blob = gd->fdt_blob; 687 const fdt32_t *reg; 688 fdt_addr_t addr; 689 int node; 690 691 /* find the usb_otg node */ 692 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); 693 694 retry: 695 if (node > 0) { 696 reg = fdt_getprop(blob, node, "reg", NULL); 697 if (!reg) 698 return -EINVAL; 699 700 addr = fdt_translate_address(blob, node, reg); 701 if (addr == OF_BAD_ADDR) { 702 pr_err("Not found usb_otg address\n"); 703 return -EINVAL; 704 } 705 706 #if defined(CONFIG_ROCKCHIP_RK3288) 707 if (addr != 0xff580000) { 708 node = fdt_node_offset_by_compatible(blob, node, 709 "snps,dwc2"); 710 goto retry; 711 } 712 #endif 713 } else { 714 /* 715 * With kernel dtb support, rk3288 dwc2 otg node 716 * use the rockchip legacy dwc2 driver "dwc_otg_310" 717 * with the compatible "rockchip,rk3288_usb20_otg", 718 * and rk3368 also use the "dwc_otg_310" driver with 719 * the compatible "rockchip,rk3368-usb". 720 */ 721 #if defined(CONFIG_ROCKCHIP_RK3288) 722 node = fdt_node_offset_by_compatible(blob, -1, 723 "rockchip,rk3288_usb20_otg"); 724 #elif defined(CONFIG_ROCKCHIP_RK3368) 725 node = fdt_node_offset_by_compatible(blob, -1, 726 "rockchip,rk3368-usb"); 727 #endif 728 if (node > 0) { 729 goto retry; 730 } else { 731 pr_err("Not found usb_otg device\n"); 732 return -ENODEV; 733 } 734 } 735 736 otg_data.regs_otg = (uintptr_t)addr; 737 738 return dwc2_udc_probe(&otg_data); 739 } 740 741 int board_usb_cleanup(int index, enum usb_init_type init) 742 { 743 return 0; 744 } 745 #endif 746 747 static void bootm_no_reloc(void) 748 { 749 char *ramdisk_high; 750 char *fdt_high; 751 752 if (!env_get_yesno("bootm-no-reloc")) 753 return; 754 755 ramdisk_high = env_get("initrd_high"); 756 fdt_high = env_get("fdt_high"); 757 758 if (!fdt_high) { 759 env_set_hex("fdt_high", -1UL); 760 printf("Fdt "); 761 } 762 763 if (!ramdisk_high) { 764 env_set_hex("initrd_high", -1UL); 765 printf("Ramdisk "); 766 } 767 768 if (!fdt_high || !ramdisk_high) 769 printf("skip relocation\n"); 770 } 771 772 int bootm_board_start(void) 773 { 774 /* 775 * print console record data 776 * 777 * On some rockchip platforms, uart debug and sdmmc pin are multiplex. 778 * If boot from sdmmc mode, the console data would be record in buffer, 779 * we switch to uart debug function in order to print it after loading 780 * images. 781 */ 782 #if defined(CONFIG_CONSOLE_RECORD) 783 if (!strcmp("mmc", env_get("devtype")) && 784 !strcmp("1", env_get("devnum"))) { 785 printf("IOMUX: sdmmc => uart debug"); 786 pinctrl_select_state(gd->cur_serial_dev, "default"); 787 console_record_print_purge(); 788 } 789 #endif 790 /* disable bootm relcation to save boot time */ 791 bootm_no_reloc(); 792 793 /* PCBA test needs more permission */ 794 if (get_bcb_recovery_msg() == BCB_MSG_RECOVERY_PCBA) 795 env_update("bootargs", "androidboot.selinux=permissive"); 796 797 /* sysmem */ 798 hotkey_run(HK_SYSMEM); 799 sysmem_overflow_check(); 800 801 return 0; 802 } 803 804 /* 805 * Implement it to support CLI command: 806 * - Android: bootm [aosp addr] 807 * - FIT: bootm [fit addr] 808 * - uImage: bootm [uimage addr] 809 * 810 * Purpose: 811 * - The original bootm command args require fdt addr on AOSP, 812 * which is not flexible on rockchip boot/recovery.img. 813 * - Take Android/FIT/uImage image into sysmem management to avoid image 814 * memory overlap. 815 */ 816 #if defined(CONFIG_ANDROID_BOOTLOADER) || \ 817 defined(CONFIG_ROCKCHIP_FIT_IMAGE) || \ 818 defined(CONFIG_ROCKCHIP_UIMAGE) 819 int board_do_bootm(int argc, char * const argv[]) 820 { 821 int format; 822 void *img; 823 824 if (argc != 2) 825 return 0; 826 827 img = (void *)simple_strtoul(argv[1], NULL, 16); 828 format = (genimg_get_format(img)); 829 830 /* Android */ 831 #ifdef CONFIG_ANDROID_BOOT_IMAGE 832 if (format == IMAGE_FORMAT_ANDROID) { 833 struct andr_img_hdr *hdr; 834 ulong load_addr; 835 ulong size; 836 int ret; 837 838 hdr = (struct andr_img_hdr *)img; 839 printf("BOOTM: transferring to board Android\n"); 840 841 #ifdef CONFIG_USING_KERNEL_DTB 842 sysmem_free((phys_addr_t)gd->fdt_blob); 843 /* erase magic */ 844 fdt_set_magic((void *)gd->fdt_blob, ~0); 845 gd->fdt_blob = NULL; 846 #endif 847 load_addr = env_get_ulong("kernel_addr_r", 16, 0); 848 load_addr -= hdr->page_size; 849 size = android_image_get_end(hdr) - (ulong)hdr; 850 851 if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size)) 852 return -ENOMEM; 853 854 ret = android_image_memcpy_separate(hdr, &load_addr); 855 if (ret) { 856 printf("board do bootm failed, ret=%d\n", ret); 857 return ret; 858 } 859 860 return android_bootloader_boot_kernel(load_addr); 861 } 862 #endif 863 864 /* FIT */ 865 #if IMAGE_ENABLE_FIT 866 if (format == IMAGE_FORMAT_FIT) { 867 char boot_cmd[64]; 868 869 printf("BOOTM: transferring to board FIT\n"); 870 snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]); 871 return run_command(boot_cmd, 0); 872 } 873 #endif 874 875 /* uImage */ 876 #if defined(CONFIG_IMAGE_FORMAT_LEGACY) 877 if (format == IMAGE_FORMAT_LEGACY && 878 image_get_type(img) == IH_TYPE_MULTI) { 879 char boot_cmd[64]; 880 881 printf("BOOTM: transferring to board uImage\n"); 882 snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]); 883 return run_command(boot_cmd, 0); 884 } 885 #endif 886 887 return 0; 888 } 889 #endif 890 891 void autoboot_command_fail_handle(void) 892 { 893 #ifdef CONFIG_ANDROID_AB 894 if (rk_avb_ab_have_bootable_slot() == true) 895 run_command("reset;", 0); 896 else 897 run_command("fastboot usb 0;", 0); 898 #endif 899 900 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE 901 run_command("rockusb 0 ${devtype} ${devnum}", 0); 902 run_command("fastboot usb 0;", 0); 903 #endif 904 905 } 906 907 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 908 909 #define FIT_ROLLBACK_INDEX_LOCATION 0x66697472 /* "fitr" */ 910 911 int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index) 912 { 913 #ifdef CONFIG_OPTEE_CLIENT 914 u64 index; 915 int ret; 916 917 ret = trusty_read_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, &index); 918 if (ret) { 919 if (ret != TEE_ERROR_ITEM_NOT_FOUND) 920 return ret; 921 922 index = 0; 923 printf("Initial otp index as %d\n", fit_index); 924 } 925 926 *otp_index = (uint32_t)index; 927 #else 928 *otp_index = 0; 929 #endif 930 931 return 0; 932 } 933 934 static int fit_write_trusty_rollback_index(u32 trusty_index) 935 { 936 if (!trusty_index) 937 return 0; 938 939 return trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, 940 (u64)trusty_index); 941 } 942 #endif 943 944 void board_quiesce_devices(void *images) 945 { 946 hotkey_run(HK_CMDLINE); 947 hotkey_run(HK_CLI_OS_GO); 948 949 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 950 /* Destroy atags makes next warm boot safer */ 951 atags_destroy(); 952 #endif 953 954 #ifdef CONFIG_ROCKCHIP_REBOOT_TEST 955 do_reset(NULL, 0, 0, NULL); 956 #endif 957 958 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 959 int ret; 960 961 ret = fit_write_trusty_rollback_index(gd->rollback_index); 962 if (ret) { 963 panic("Failed to write fit rollback index %d, ret=%d", 964 gd->rollback_index, ret); 965 } 966 #endif 967 968 #ifdef CONFIG_ROCKCHIP_HW_DECOMPRESS 969 misc_decompress_cleanup(); 970 #endif 971 } 972