1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <amp.h> 9 #include <android_bootloader.h> 10 #include <android_image.h> 11 #include <bidram.h> 12 #include <boot_rkimg.h> 13 #include <cli.h> 14 #include <clk.h> 15 #include <console.h> 16 #include <debug_uart.h> 17 #include <dm.h> 18 #include <dvfs.h> 19 #include <io-domain.h> 20 #include <image.h> 21 #include <key.h> 22 #include <memblk.h> 23 #include <misc.h> 24 #include <of_live.h> 25 #include <mtd_blk.h> 26 #include <ram.h> 27 #include <rockchip_debugger.h> 28 #include <syscon.h> 29 #include <sysmem.h> 30 #include <video_rockchip.h> 31 #include <asm/io.h> 32 #include <asm/gpio.h> 33 #include <dm/uclass-internal.h> 34 #include <dm/root.h> 35 #include <power/charge_display.h> 36 #include <power/regulator.h> 37 #include <optee_include/OpteeClientInterface.h> 38 #include <asm/arch/boot_mode.h> 39 #include <asm/arch/clock.h> 40 #include <asm/arch/cpu.h> 41 #include <asm/arch/hotkey.h> 42 #include <asm/arch/param.h> 43 #include <asm/arch/periph.h> 44 #include <asm/arch/resource_img.h> 45 #include <asm/arch/rk_atags.h> 46 #include <asm/arch/vendor.h> 47 48 DECLARE_GLOBAL_DATA_PTR; 49 50 __weak int rk_board_late_init(void) 51 { 52 return 0; 53 } 54 55 __weak int rk_board_fdt_fixup(void *blob) 56 { 57 return 0; 58 } 59 60 __weak int soc_clk_dump(void) 61 { 62 return 0; 63 } 64 65 __weak int set_armclk_rate(void) 66 { 67 return 0; 68 } 69 70 __weak int rk_board_init(void) 71 { 72 return 0; 73 } 74 75 /* 76 * define serialno max length, the max length is 512 Bytes 77 * The remaining bytes are used to ensure that the first 512 bytes 78 * are valid when executing 'env_set("serial#", value)'. 79 */ 80 #define VENDOR_SN_MAX 513 81 #define CPUID_LEN 0x10 82 #define CPUID_OFF 0x07 83 84 static int rockchip_set_ethaddr(void) 85 { 86 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 87 char buf[ARP_HLEN_ASCII + 1]; 88 u8 ethaddr[ARP_HLEN]; 89 int ret; 90 91 ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr)); 92 if (ret > 0 && is_valid_ethaddr(ethaddr)) { 93 sprintf(buf, "%pM", ethaddr); 94 env_set("ethaddr", buf); 95 } 96 #endif 97 return 0; 98 } 99 100 static int rockchip_set_serialno(void) 101 { 102 u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; 103 u8 cpuid[CPUID_LEN] = {0}; 104 char serialno_str[VENDOR_SN_MAX]; 105 int ret = 0, i; 106 u64 serialno; 107 108 /* Read serial number from vendor storage part */ 109 memset(serialno_str, 0, VENDOR_SN_MAX); 110 111 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 112 ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1)); 113 if (ret > 0) { 114 i = strlen(serialno_str); 115 for (; i > 0; i--) { 116 if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') || 117 (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') || 118 (serialno_str[i] >= '0' && serialno_str[i] <= '9')) 119 break; 120 } 121 122 serialno_str[i + 1] = 0x0; 123 env_set("serial#", serialno_str); 124 } else { 125 #endif 126 #ifdef CONFIG_ROCKCHIP_EFUSE 127 struct udevice *dev; 128 129 /* retrieve the device */ 130 ret = uclass_get_device_by_driver(UCLASS_MISC, 131 DM_GET_DRIVER(rockchip_efuse), 132 &dev); 133 if (ret) { 134 printf("%s: could not find efuse device\n", __func__); 135 return ret; 136 } 137 138 /* read the cpu_id range from the efuses */ 139 ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid)); 140 if (ret) { 141 printf("%s: read cpuid from efuses failed, ret=%d\n", 142 __func__, ret); 143 return ret; 144 } 145 #else 146 /* generate random cpuid */ 147 for (i = 0; i < CPUID_LEN; i++) 148 cpuid[i] = (u8)(rand()); 149 #endif 150 /* Generate the serial number based on CPU ID */ 151 for (i = 0; i < 8; i++) { 152 low[i] = cpuid[1 + (i << 1)]; 153 high[i] = cpuid[i << 1]; 154 } 155 156 serialno = crc32_no_comp(0, low, 8); 157 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; 158 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); 159 160 env_set("serial#", serialno_str); 161 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 162 } 163 #endif 164 165 return ret; 166 } 167 168 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) 169 int fb_set_reboot_flag(void) 170 { 171 printf("Setting reboot to fastboot flag ...\n"); 172 writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); 173 174 return 0; 175 } 176 #endif 177 178 #ifdef CONFIG_ROCKCHIP_USB_BOOT 179 static int boot_from_udisk(void) 180 { 181 struct blk_desc *desc; 182 char *devtype; 183 char *devnum; 184 185 devtype = env_get("devtype"); 186 devnum = env_get("devnum"); 187 188 /* Booting priority: mmc1 > udisk */ 189 if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1")) 190 return 0; 191 192 if (!run_command("usb start", -1)) { 193 desc = blk_get_devnum_by_type(IF_TYPE_USB, 0); 194 if (!desc) { 195 printf("No usb device found\n"); 196 return -ENODEV; 197 } 198 199 if (!run_command("rkimgtest usb 0", -1)) { 200 rockchip_set_bootdev(desc); 201 env_set("devtype", "usb"); 202 env_set("devnum", "0"); 203 printf("Boot from usb 0\n"); 204 } else { 205 printf("No usb dev 0 found\n"); 206 return -ENODEV; 207 } 208 } 209 210 return 0; 211 } 212 #endif 213 214 static void env_fixup(void) 215 { 216 struct memblock mem; 217 ulong u_addr_r; 218 phys_size_t end; 219 char *addr_r; 220 221 #ifdef ENV_MEM_LAYOUT_SETTINGS1 222 const char *env_addr0[] = { 223 "scriptaddr", "pxefile_addr_r", 224 "fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r", 225 }; 226 const char *env_addr1[] = { 227 "scriptaddr1", "pxefile_addr1_r", 228 "fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r", 229 }; 230 int i; 231 232 /* 128M is a typical ram size for most platform, so as default here */ 233 if (gd->ram_size <= SZ_128M) { 234 /* Replace orignal xxx_addr_r */ 235 for (i = 0; i < ARRAY_SIZE(env_addr1); i++) { 236 addr_r = env_get(env_addr1[i]); 237 if (addr_r) 238 env_set(env_addr0[i], addr_r); 239 } 240 } 241 #endif 242 /* If BL32 is disabled, move kernel to lower address. */ 243 if (!(gd->flags & GD_FLG_BL32_ENABLED)) { 244 addr_r = env_get("kernel_addr_no_bl32_r"); 245 if (addr_r) 246 env_set("kernel_addr_r", addr_r); 247 248 /* 249 * 0x0a200000 and 0x08400000 are rockchip traditional address 250 * of BL32 and ramdisk: 251 * 252 * |------------|------------| 253 * | BL32 | ramdisk | 254 * |------------|------------| 255 * 256 * Move ramdisk to BL32 address to fix sysmem alloc failed 257 * issue on the board with critical memory(ie. 256MB). 258 */ 259 if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) { 260 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 261 if (u_addr_r == 0x0a200000) 262 env_set("ramdisk_addr_r", "0x08400000"); 263 } 264 265 /* If BL32 is enlarged, move ramdisk right behind it */ 266 } else { 267 mem = param_parse_optee_mem(); 268 end = mem.base + mem.size; 269 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 270 if (u_addr_r >= mem.base && u_addr_r < end) 271 env_set_hex("ramdisk_addr_r", end); 272 } 273 } 274 275 static void cmdline_handle(void) 276 { 277 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 278 struct tag *t; 279 280 t = atags_get_tag(ATAG_PUB_KEY); 281 if (t) { 282 /* Pass if efuse/otp programmed */ 283 if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED) 284 env_update("bootargs", "fuse.programmed=1"); 285 else 286 env_update("bootargs", "fuse.programmed=0"); 287 } 288 #endif 289 } 290 291 int board_late_init(void) 292 { 293 rockchip_set_ethaddr(); 294 rockchip_set_serialno(); 295 setup_download_mode(); 296 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 297 setup_boot_mode(); 298 #endif 299 #ifdef CONFIG_ROCKCHIP_USB_BOOT 300 boot_from_udisk(); 301 #endif 302 #ifdef CONFIG_DM_CHARGE_DISPLAY 303 charge_display(); 304 #endif 305 #ifdef CONFIG_DRM_ROCKCHIP 306 rockchip_show_logo(); 307 #endif 308 env_fixup(); 309 soc_clk_dump(); 310 cmdline_handle(); 311 312 return rk_board_late_init(); 313 } 314 315 static void early_download(void) 316 { 317 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \ 318 (CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0) 319 if (pwrkey_download_init()) 320 printf("Pwrkey download init failed\n"); 321 #endif 322 323 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 324 if (is_hotkey(HK_BROM_DNL)) { 325 printf("Enter bootrom download..."); 326 flushc(); 327 writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); 328 do_reset(NULL, 0, 0, NULL); 329 printf("failed!\n"); 330 } 331 #endif 332 } 333 334 static void board_debug_init(void) 335 { 336 if (!gd->serial.using_pre_serial) 337 board_debug_uart_init(); 338 339 if (tstc()) { 340 gd->console_evt = getc(); 341 if (gd->console_evt <= 0x1a) /* 'z' */ 342 printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1); 343 } 344 345 if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI)) 346 printf("CLI: off\n"); 347 } 348 349 #ifdef CONFIG_MTD_BLK 350 static void board_mtd_blk_map_partitions(void) 351 { 352 struct blk_desc *dev_desc; 353 354 dev_desc = rockchip_get_bootdev(); 355 if (dev_desc) 356 mtd_blk_map_partitions(dev_desc); 357 } 358 #endif 359 360 int board_init(void) 361 { 362 board_debug_init(); 363 364 #ifdef DEBUG 365 soc_clk_dump(); 366 #endif 367 368 #ifdef CONFIG_USING_KERNEL_DTB 369 #ifdef CONFIG_MTD_BLK 370 board_mtd_blk_map_partitions(); 371 #endif 372 init_kernel_dtb(); 373 #endif 374 early_download(); 375 376 /* 377 * pmucru isn't referenced on some platforms, so pmucru driver can't 378 * probe that the "assigned-clocks" is unused. 379 */ 380 clks_probe(); 381 #ifdef CONFIG_DM_REGULATOR 382 if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR))) 383 debug("%s: Can't enable boot on regulator\n", __func__); 384 #endif 385 386 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN 387 io_domain_init(); 388 #endif 389 390 set_armclk_rate(); 391 392 #ifdef CONFIG_DM_DVFS 393 dvfs_init(true); 394 #endif 395 396 return rk_board_init(); 397 } 398 399 int interrupt_debugger_init(void) 400 { 401 #ifdef CONFIG_ROCKCHIP_DEBUGGER 402 return rockchip_debugger_init(); 403 #else 404 return 0; 405 #endif 406 } 407 408 int board_fdt_fixup(void *blob) 409 { 410 /* Common fixup for DRM */ 411 #ifdef CONFIG_DRM_ROCKCHIP 412 rockchip_display_fixup(blob); 413 #endif 414 415 return rk_board_fdt_fixup(blob); 416 } 417 418 #if defined(CONFIG_ARM64_BOOT_AARCH32) || \ 419 (!defined(CONFIG_ARM64) && defined(CONFIG_OPTEE_V2)) 420 /* 421 * (1) Fixup MMU region attr for OP-TEE on (AArch32 + ARMv8) 422 * 423 * What ever U-Boot is 64-bit or 32-bit mode, the OP-TEE is always 64-bit mode. 424 * 425 * Common for OP-TEE: 426 * 64-bit mode: dcache is always enabled; 427 * 32-bit mode: dcache is always disabled(Due to rockchip sip calls); 428 * 429 * Common for U-Boot: 430 * 64-bit mode: MMU table is static defined in rkxxx.c file, all memory 431 * regions are mapped. That's good to match OP-TEE MMU policy. 432 * 433 * 32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where 434 * the OP-TEE region has been reserved, so it can not be 435 * mapped(i.e. dcache is disabled). That's also good to match 436 * OP-TEE MMU policy. 437 * 438 * For the data coherence when communication between U-Boot and OP-TEE, U-Boot 439 * should follow OP-TEE MMU policy. 440 * 441 * Here is the special: 442 * When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot is 32-bit mode while 443 * OP-TEE is still 64-bit mode. U-Boot would not map MMU table for OP-TEE 444 * region(but OP-TEE requires it cacheable) so we fixup here. 445 * 446 * 447 * (2) Fixup MMU region attr for OP-TEE on (ARMv7 + CONFIG_OPTEE_V2) 448 * 449 * OP-TEE for CONFIG_OPTEE_V1: dcache is always disabled; 450 * OP-TEE for CONFIG_OPTEE_V2: dcache is always enabled; 451 * 452 * So U-Boot should map OP-TEE memory as dcache enabled for CONFIG_OPTEE_V2. 453 */ 454 int board_initr_caches_fixup(void) 455 { 456 struct memblock mem; 457 458 mem = param_parse_optee_mem(); 459 if (mem.size) 460 mmu_set_region_dcache_behaviour(mem.base, mem.size, 461 DCACHE_WRITEBACK); 462 return 0; 463 } 464 #endif 465 466 void arch_preboot_os(uint32_t bootm_state) 467 { 468 if (bootm_state & BOOTM_STATE_OS_PREP) 469 hotkey_run(HK_CLI_OS_PRE); 470 } 471 472 void board_quiesce_devices(void *images) 473 { 474 hotkey_run(HK_CMDLINE); 475 hotkey_run(HK_CLI_OS_GO); 476 477 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 478 /* Destroy atags makes next warm boot safer */ 479 atags_destroy(); 480 #endif 481 482 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 483 /* TODO */ 484 printf("fit: rollback protect not implement\n"); 485 #endif 486 } 487 488 void enable_caches(void) 489 { 490 icache_enable(); 491 dcache_enable(); 492 } 493 494 #ifdef CONFIG_LMB 495 /* 496 * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize". 497 * This makes lmb_alloc_base() always alloc from tail of sdram. 498 * If we don't assign it, bi_dram[0] is used by default and it may cause 499 * lmb_alloc_base() fail when bi_dram[0] range is small. 500 */ 501 void board_lmb_reserve(struct lmb *lmb) 502 { 503 char bootm_mapsize[32]; 504 char bootm_low[32]; 505 u64 start, size; 506 int i; 507 508 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 509 if (!gd->bd->bi_dram[i].size) 510 break; 511 } 512 513 start = gd->bd->bi_dram[i - 1].start; 514 size = gd->bd->bi_dram[i - 1].size; 515 516 /* 517 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+), 518 * otherwise "Unable to handle kernel paging request at virtual address ...". 519 * 520 * So that we hope limit highest address at 768M, but there comes the the 521 * problem: ramdisk is a compressed image and it expands after descompress, 522 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...". 523 * 524 * We make a appointment that the highest memory address is 512MB, it 525 * makes lmb alloc safer. 526 */ 527 #ifndef CONFIG_ARM64 528 if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) { 529 start = gd->bd->bi_dram[i - 2].start; 530 size = gd->bd->bi_dram[i - 2].size; 531 } 532 533 if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) 534 size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start; 535 #endif 536 sprintf(bootm_low, "0x%llx", start); 537 sprintf(bootm_mapsize, "0x%llx", size); 538 env_set("bootm_low", bootm_low); 539 env_set("bootm_mapsize", bootm_mapsize); 540 } 541 #endif 542 543 #ifdef CONFIG_BIDRAM 544 int board_bidram_reserve(struct bidram *bidram) 545 { 546 struct memblock mem; 547 int ret; 548 549 /* ATF */ 550 mem = param_parse_atf_mem(); 551 ret = bidram_reserve(MEM_ATF, mem.base, mem.size); 552 if (ret) 553 return ret; 554 555 /* PSTORE/ATAGS/SHM */ 556 mem = param_parse_common_resv_mem(); 557 ret = bidram_reserve(MEM_SHM, mem.base, mem.size); 558 if (ret) 559 return ret; 560 561 /* OP-TEE */ 562 mem = param_parse_optee_mem(); 563 ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size); 564 if (ret) 565 return ret; 566 567 return 0; 568 } 569 570 parse_fn_t board_bidram_parse_fn(void) 571 { 572 return param_parse_ddr_mem; 573 } 574 #endif 575 576 #ifdef CONFIG_ROCKCHIP_AMP 577 void cpu_secondary_init_r(void) 578 { 579 amp_cpus_on(); 580 } 581 #endif 582 583 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \ 584 defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) 585 int board_init_f_init_serial(void) 586 { 587 struct tag *t = atags_get_tag(ATAG_SERIAL); 588 589 if (t) { 590 gd->serial.using_pre_serial = t->u.serial.enable; 591 gd->serial.addr = t->u.serial.addr; 592 gd->serial.baudrate = t->u.serial.baudrate; 593 gd->serial.id = t->u.serial.id; 594 595 debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n", 596 __func__, gd->serial.using_pre_serial, 597 gd->serial.addr, gd->serial.baudrate, 598 gd->serial.id); 599 } 600 601 return 0; 602 } 603 #endif 604 605 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 606 #include <fdt_support.h> 607 #include <usb.h> 608 #include <usb/dwc2_udc.h> 609 610 static struct dwc2_plat_otg_data otg_data = { 611 .rx_fifo_sz = 512, 612 .np_tx_fifo_sz = 16, 613 .tx_fifo_sz = 128, 614 }; 615 616 int board_usb_init(int index, enum usb_init_type init) 617 { 618 const void *blob = gd->fdt_blob; 619 const fdt32_t *reg; 620 fdt_addr_t addr; 621 int node; 622 623 /* find the usb_otg node */ 624 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); 625 626 retry: 627 if (node > 0) { 628 reg = fdt_getprop(blob, node, "reg", NULL); 629 if (!reg) 630 return -EINVAL; 631 632 addr = fdt_translate_address(blob, node, reg); 633 if (addr == OF_BAD_ADDR) { 634 pr_err("Not found usb_otg address\n"); 635 return -EINVAL; 636 } 637 638 #if defined(CONFIG_ROCKCHIP_RK3288) 639 if (addr != 0xff580000) { 640 node = fdt_node_offset_by_compatible(blob, node, 641 "snps,dwc2"); 642 goto retry; 643 } 644 #endif 645 } else { 646 /* 647 * With kernel dtb support, rk3288 dwc2 otg node 648 * use the rockchip legacy dwc2 driver "dwc_otg_310" 649 * with the compatible "rockchip,rk3288_usb20_otg", 650 * and rk3368 also use the "dwc_otg_310" driver with 651 * the compatible "rockchip,rk3368-usb". 652 */ 653 #if defined(CONFIG_ROCKCHIP_RK3288) 654 node = fdt_node_offset_by_compatible(blob, -1, 655 "rockchip,rk3288_usb20_otg"); 656 #elif defined(CONFIG_ROCKCHIP_RK3368) 657 node = fdt_node_offset_by_compatible(blob, -1, 658 "rockchip,rk3368-usb"); 659 #endif 660 if (node > 0) { 661 goto retry; 662 } else { 663 pr_err("Not found usb_otg device\n"); 664 return -ENODEV; 665 } 666 } 667 668 otg_data.regs_otg = (uintptr_t)addr; 669 670 return dwc2_udc_probe(&otg_data); 671 } 672 673 int board_usb_cleanup(int index, enum usb_init_type init) 674 { 675 return 0; 676 } 677 #endif 678 679 static void bootm_no_reloc(void) 680 { 681 char *ramdisk_high; 682 char *fdt_high; 683 684 if (!env_get_yesno("bootm-no-reloc")) 685 return; 686 687 ramdisk_high = env_get("initrd_high"); 688 fdt_high = env_get("fdt_high"); 689 690 if (!fdt_high) { 691 env_set_hex("fdt_high", -1UL); 692 printf("Fdt "); 693 } 694 695 if (!ramdisk_high) { 696 env_set_hex("initrd_high", -1UL); 697 printf("Ramdisk "); 698 } 699 700 if (!fdt_high || !ramdisk_high) 701 printf("skip relocation\n"); 702 } 703 704 int bootm_board_start(void) 705 { 706 /* 707 * print console record data 708 * 709 * On some rockchip platforms, uart debug and sdmmc pin are multiplex. 710 * If boot from sdmmc mode, the console data would be record in buffer, 711 * we switch to uart debug function in order to print it after loading 712 * images. 713 */ 714 #if defined(CONFIG_CONSOLE_RECORD) 715 if (!strcmp("mmc", env_get("devtype")) && 716 !strcmp("1", env_get("devnum"))) { 717 printf("IOMUX: sdmmc => uart debug"); 718 pinctrl_select_state(gd->cur_serial_dev, "default"); 719 console_record_print_purge(); 720 } 721 #endif 722 /* disable bootm relcation to save boot time */ 723 bootm_no_reloc(); 724 725 /* sysmem */ 726 hotkey_run(HK_SYSMEM); 727 sysmem_overflow_check(); 728 729 return 0; 730 } 731 732 /* 733 * Implement it to support CLI command: 734 * - Android: bootm [aosp addr] 735 * - FIT: bootm [fit addr] 736 * - uImage: bootm [uimage addr] 737 * 738 * Purpose: 739 * - The original bootm command args require fdt addr on AOSP, 740 * which is not flexible on rockchip boot/recovery.img. 741 * - Take Android/FIT/uImage image into sysmem management to avoid image 742 * memory overlap. 743 */ 744 #if defined(CONFIG_ANDROID_BOOTLOADER) || \ 745 defined(CONFIG_ROCKCHIP_FIT_IMAGE) || \ 746 defined(CONFIG_ROCKCHIP_UIMAGE) 747 int board_do_bootm(int argc, char * const argv[]) 748 { 749 int format; 750 void *img; 751 752 if (argc != 2) 753 return 0; 754 755 img = (void *)simple_strtoul(argv[1], NULL, 16); 756 format = (genimg_get_format(img)); 757 758 /* Android */ 759 #ifdef CONFIG_ANDROID_BOOT_IMAGE 760 if (format == IMAGE_FORMAT_ANDROID) { 761 struct andr_img_hdr *hdr; 762 ulong load_addr; 763 ulong size; 764 int ret; 765 766 hdr = (struct andr_img_hdr *)img; 767 printf("BOOTM: transferring to board Android\n"); 768 769 #ifdef CONFIG_USING_KERNEL_DTB 770 sysmem_free((phys_addr_t)gd->fdt_blob); 771 /* erase magic */ 772 fdt_set_magic((void *)gd->fdt_blob, ~0); 773 gd->fdt_blob = NULL; 774 #endif 775 load_addr = env_get_ulong("kernel_addr_r", 16, 0); 776 load_addr -= hdr->page_size; 777 size = android_image_get_end(hdr) - (ulong)hdr; 778 779 if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size)) 780 return -ENOMEM; 781 782 ret = android_image_memcpy_separate(hdr, &load_addr); 783 if (ret) { 784 printf("board do bootm failed, ret=%d\n", ret); 785 return ret; 786 } 787 788 return android_bootloader_boot_kernel(load_addr); 789 } 790 #endif 791 792 /* FIT */ 793 #if IMAGE_ENABLE_FIT 794 if (format == IMAGE_FORMAT_FIT) { 795 char boot_cmd[64]; 796 797 printf("BOOTM: transferring to board FIT\n"); 798 snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]); 799 return run_command(boot_cmd, 0); 800 } 801 #endif 802 803 /* uImage */ 804 #if defined(CONFIG_IMAGE_FORMAT_LEGACY) 805 if (format == IMAGE_FORMAT_LEGACY && 806 image_get_type(img) == IH_TYPE_MULTI) { 807 char boot_cmd[64]; 808 809 printf("BOOTM: transferring to board uImage\n"); 810 snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]); 811 return run_command(boot_cmd, 0); 812 } 813 #endif 814 815 return 0; 816 } 817 #endif 818 819 void autoboot_command_fail_handle(void) 820 { 821 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE 822 #ifdef CONFIG_ANDROID_AB 823 run_command("fastboot usb 0;", 0); /* use fastboot to ative slot */ 824 #else 825 run_command("rockusb 0 ${devtype} ${devnum}", 0); 826 run_command("fastboot usb 0;", 0); 827 #endif 828 #endif 829 } 830 831 int fit_board_verify_required_sigs(void) 832 { 833 uint8_t vboot = 0; 834 #ifdef CONFIG_OPTEE_CLIENT 835 int ret; 836 837 ret = trusty_read_vbootkey_enable_flag(&vboot); 838 if (ret) { 839 printf("Can't read verified-boot flag, ret=%d\n", ret); 840 return 1; 841 } 842 #endif 843 printf("## Verified-boot: %d\n", vboot); 844 845 return vboot; 846 } 847 848 #ifdef CONFIG_FIT_IMAGE_POST_PROCESS 849 void board_fit_image_post_process(void **p_image, size_t *p_size) 850 { 851 /* Avoid overriding proccessed(overlay, hw-dtb, ...) kernel dtb */ 852 #ifdef CONFIG_USING_KERNEL_DTB 853 if (!fdt_check_header(*p_image) && !fdt_check_header(gd->fdt_blob)) { 854 *p_image = (void *)gd->fdt_blob; 855 *p_size = (size_t)fdt_totalsize(gd->fdt_blob); 856 } 857 #endif 858 } 859 #endif 860