1if ARCH_ROCKCHIP 2 3config ROCKCHIP_PX30 4 bool "Support Rockchip PX30" 5 select ARM64 6 select GICV2 7 select ARM_SMCCC 8 select SUPPORT_SPL 9 select SUPPORT_TPL 10 select SPL 11 select TPL 12 select TPL_TINY_FRAMEWORK if TPL 13 14 imply SPL_SERIAL_SUPPORT 15 imply TPL_SERIAL_SUPPORT 16 select DEBUG_UART_BOARD_INIT 17 help 18 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 19 including NEON and GPU, Mali-400 graphics, several DDR3 options 20 and video codec support. Peripherals include Gigabit Ethernet, 21 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 22 23if ROCKCHIP_PX30 24 25config TPL_LDSCRIPT 26 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 27 28config TPL_TEXT_BASE 29 default 0xff0e1000 30 31config TPL_MAX_SIZE 32 default 10240 33 34config ROCKCHIP_RK3326 35 bool "Support Rockchip RK3326 " 36 help 37 RK3326 can use most code from PX30, but at some situations we have 38 to distinguish between RK3326 and PX30, so this macro gives help. 39 It is usually selected in rk3326 board defconfig. 40endif 41 42config ROCKCHIP_RK3036 43 bool "Support Rockchip RK3036" 44 select CPU_V7 45 select SUPPORT_SPL 46 select SUPPORT_TPL 47 select SPL 48 select TPL 49 select BOARD_LATE_INIT 50 select ROCKCHIP_BROM_HELPER 51 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 52 select TPL_NEEDS_SEPARATE_STACK if TPL 53 select DEBUG_UART_BOARD_INIT 54 select ARM_SMCCC 55 help 56 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 57 including NEON and GPU, Mali-400 graphics, several DDR3 options 58 and video codec support. Peripherals include Gigabit Ethernet, 59 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 60 61config ROCKCHIP_RK3128 62 bool "Support Rockchip RK3128" 63 select CPU_V7 64 select GICV2 65 select ARM_SMCCC 66 help 67 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 68 including NEON and GPU, Mali-400 graphics, several DDR3 options 69 and video codec support. Peripherals include Gigabit Ethernet, 70 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 71 72if ROCKCHIP_RK3128 73 74config ROCKCHIP_RK3126 75 bool "Support Rockchip RK3126 " 76 help 77 RK3126 can use most code from RK3128, but at some situations we have 78 to distinguish between RK3126 and RK3128, so this macro gives help. 79 It is usually selected in rk3126 board defconfig. 80 81config ROCKCHIP_PX3SE 82 bool "Support Rockchip PX3SE" 83 help 84 PX3SE is a variant of RK3128, it shares codes with RK3128, but we still 85 need this macro to distinguish PX3SE and RK3128. 86endif 87 88config ROCKCHIP_RK3066 89 bool "Support Rockchip RK3066" 90 select CPU_V7 91 select SUPPORT_SPL 92 select SUPPORT_TPL 93 select SPL 94 select TPL 95 select BOARD_LATE_INIT 96 select ROCKCHIP_BROM_HELPER 97 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 98 help 99 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 100 including NEON and GPU, Mali-400 graphics, several DDR3 options 101 and video codec support. Peripherals include ethernet, USB2 host 102 and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 103 104config ROCKCHIP_RK3188 105 bool "Support Rockchip RK3188" 106 select CPU_V7 107 select SPL_BOARD_INIT if SPL 108 select SUPPORT_SPL 109 select SPL 110 select SPL_CLK 111 select SPL_REGMAP 112 select SPL_SYSCON 113 select SPL_RAM 114 select SPL_DRIVERS_MISC_SUPPORT 115 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 116 select BOARD_LATE_INIT 117 select ROCKCHIP_BROM_HELPER 118 help 119 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 120 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two 121 video interfaces, several memory options and video codec support. 122 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, 123 UART, SPI, I2C and PWMs. 124 125config ROCKCHIP_RK322X 126 bool "Support Rockchip RK3228/RK3229" 127 select CPU_V7 128 select SUPPORT_SPL 129 select SUPPORT_TPL 130 select SPL 131 select TPL 132 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 133 select TPL_NEEDS_SEPARATE_STACK if TPL 134 select SPL_DRIVERS_MISC_SUPPORT 135 imply SPL_SERIAL_SUPPORT 136 imply TPL_SERIAL_SUPPORT 137 select ROCKCHIP_BROM_HELPER 138 select DEBUG_UART_BOARD_INIT 139 select TPL_LIBCOMMON_SUPPORT 140 select TPL_LIBGENERIC_SUPPORT 141 select GICV2 142 select ARM_SMCCC 143 help 144 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 145 including NEON and GPU, Mali-400 graphics, several DDR3 options 146 and video codec support. Peripherals include Gigabit Ethernet, 147 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 148 149if ROCKCHIP_RK322X 150 151config ROCKCHIP_RK3128X 152 bool "Support Rockchip RK3128X " 153 help 154 RK3128X can use most code from RK322X, but at some situations we have 155 to distinguish between RK3128X and RK322X, so this macro gives help. 156 It is usually selected in RK3128X board defconfig. 157endif 158 159config ROCKCHIP_RK3288 160 bool "Support Rockchip RK3288" 161 select CPU_V7 162 select SPL_BOARD_INIT if SPL 163 select SUPPORT_SPL 164 select SPL 165 select GICV2 166 select ARM_SMCCC 167 help 168 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 169 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 170 video interfaces supporting HDMI and eDP, several DDR3 options 171 and video codec support. Peripherals include Gigabit Ethernet, 172 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 173 174config ROCKCHIP_RK3308 175 bool "Support Rockchip RK3308" 176 select ARM64 if !ARM64_BOOT_AARCH32 177 select DEBUG_UART_BOARD_INIT 178 select ARM_SMCCC 179 help 180 The Rockchip RK3308 is a ARM-based Soc which embeded with quad 181 Cortex-A35 and highly integrated audio interfaces. 182 183config ROCKCHIP_RK3328 184 bool "Support Rockchip RK3328" 185 select ARM64 186 select GICV2 187 select SUPPORT_SPL 188 select SUPPORT_TPL 189 select SPL 190 select TPL 191 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 192 select TPL_NEEDS_SEPARATE_STACK if TPL 193 imply SPL_SERIAL_SUPPORT 194 imply TPL_SERIAL_SUPPORT 195 imply SPL_SEPARATE_BSS 196 select DEBUG_UART_BOARD_INIT 197 select ARM_SMCCC 198 help 199 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. 200 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 201 video interfaces supporting HDMI and eDP, several DDR3 options 202 and video codec support. Peripherals include Gigabit Ethernet, 203 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 204 205if ROCKCHIP_RK3328 206 207config TPL_LDSCRIPT 208 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 209 210config TPL_TEXT_BASE 211 default 0xff091000 212 213config TPL_MAX_SIZE 214 default 28672 215 216config TPL_STACK 217 default 0xff098000 218 219endif 220 221config ROCKCHIP_RK3368 222 bool "Support Rockchip RK3368" 223 select ARM64 224 select SUPPORT_SPL 225 select SUPPORT_TPL 226 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 227 select TPL_NEEDS_SEPARATE_STACK if TPL 228 imply SPL_SEPARATE_BSS 229 imply SPL_SERIAL_SUPPORT 230 imply TPL_SERIAL_SUPPORT 231 select DEBUG_UART_BOARD_INIT 232 select GICV2 233 select ARM_SMCCC 234 help 235 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised 236 into a big and little cluster with 4 cores each) Cortex-A53 including 237 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 238 (for the little cluster), PowerVR G6110 based graphics, one video 239 output processor supporting LVDS/HDMI/eDP, several DDR3 options and 240 video codec support. 241 242 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, 243 I2S, UARTs, SPI, I2C and PWMs. 244 245if ROCKCHIP_RK3368 246 247config TPL_LDSCRIPT 248 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" 249 250config TPL_TEXT_BASE 251 default 0xff8c1000 252 253config TPL_MAX_SIZE 254 default 28672 255 256config TPL_STACK 257 default 0xff8cffff 258 259endif 260 261config ROCKCHIP_RK3399 262 bool "Support Rockchip RK3399" 263 select ARM64 264 select SUPPORT_SPL 265 select SPL 266 select SPL_SEPARATE_BSS 267 select SPL_SERIAL_SUPPORT 268 select SPL_DRIVERS_MISC_SUPPORT 269 select DEBUG_UART_BOARD_INIT 270 select GICV3 271 select BOARD_LATE_INIT 272 select ROCKCHIP_BROM_HELPER 273 select ARM_SMCCC 274 help 275 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 276 and quad-core Cortex-A53. 277 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 278 video interfaces supporting HDMI and eDP, several DDR3 options 279 and video codec support. Peripherals include Gigabit Ethernet, 280 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 281 282config ROCKCHIP_RK1808 283 bool "Support Rockchip RK1808" 284 select ARM64 285 select ARM_SMCCC 286 select DEBUG_UART_BOARD_INIT 287 help 288 The Rockchip RK1808 is a ARM-based Soc which embedded with dual 289 Cortex-A35. 290 291if ROCKCHIP_RK1808 292 293config COPROCESSOR_RK1808 294 bool "RK1808 coprocessor" 295 help 296 This indicates the RK1808 is working as a coprocessor for another 297 more powerful SoC. 298 299endif 300 301config ROCKCHIP_RV1108 302 bool "Support Rockchip RV1108" 303 select CPU_V7 304 select SUPPORT_SPL 305 select SUPPORT_TPL 306 select SPL 307 select TPL 308 select BOARD_LATE_INIT 309 help 310 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 311 and a DSP. 312 313if ROCKCHIP_RV1108 314 315config TPL_LDSCRIPT 316 default "arch/arm/mach-rockchip/u-boot-tpl.lds" 317 318config TPL_TEXT_BASE 319 default 0x10080800 320 321config TPL_MAX_SIZE 322 default 6144 323 324config TPL_STACK 325 default 0x10082000 326 327endif 328 329config SPL_ROCKCHIP_BACK_TO_BROM 330 bool "SPL returns to bootrom" 331 default y if ROCKCHIP_RK3036 332 select ROCKCHIP_BROM_HELPER 333 depends on SPL 334 help 335 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 336 SPL will return to the boot rom, which will then load the U-Boot 337 binary to keep going on. 338 339config TPL_ROCKCHIP_BACK_TO_BROM 340 bool "TPL returns to bootrom" 341 default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328 342 select ROCKCHIP_BROM_HELPER 343 depends on TPL 344 help 345 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 346 SPL will return to the boot rom, which will then load the U-Boot 347 binary to keep going on. 348 349config ARM64_BOOT_AARCH32 350 bool "Support Boot an ARM64 on AArch32 execution state" 351 select CPU_V7 352 default n 353 help 354 If you want to boot an ARM64 processor on 32-bit mode, say y here. 355 356config ROCKCHIP_BOOT_MODE_REG 357 hex "Rockchip boot mode flag register address" 358 default 0xff010200 if ROCKCHIP_PX30 359 default 0x200081c8 if ROCKCHIP_RK3036 360 default 0x100a0038 if ROCKCHIP_RK3128 361 default 0x20004040 if ROCKCHIP_RK3188 362 default 0x110005c8 if ROCKCHIP_RK322X 363 default 0xff730094 if ROCKCHIP_RK3288 364 default 0xff000500 if ROCKCHIP_RK3308 365 default 0xff1005c8 if ROCKCHIP_RK3328 366 default 0xff738200 if ROCKCHIP_RK3368 367 default 0xff320300 if ROCKCHIP_RK3399 368 default 0xfe020200 if ROCKCHIP_RK1808 369 default 0x10300580 if ROCKCHIP_RV1108 370 default 0 371 help 372 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) 373 according to the value from this register. 374 375config ROCKCHIP_STIMER_BASE 376 hex "Rockchip Secure timer base address" 377 default 0xff220020 if ROCKCHIP_PX30 378 default 0x200440a0 if ROCKCHIP_RK3036 379 default 0x2000e000 if ROCKCHIP_RK3066 380 default 0x20018020 if ROCKCHIP_RK3126 381 default 0x200440a0 if ROCKCHIP_RK3128 382 default 0x2000e000 if ROCKCHIP_RK3188 383 default 0x110d0020 if ROCKCHIP_RK322X 384 default 0xff810020 if ROCKCHIP_RK3288 385 default 0xff1d0020 if ROCKCHIP_RK3328 386 default 0xff830020 if ROCKCHIP_RK3368 387 default 0xff8680a0 if ROCKCHIP_RK3399 388 default 0x10350020 if ROCKCHIP_RV1108 389 default 0 390 help 391 The secure timer inited in SPL/TPL in secure word, ARM generic timer 392 works after this timer work. 393 394config ROCKCHIP_IRAM_START_ADDR 395 hex "Rockchip Secure timer base address" 396 default 0xff0e0000 if ROCKCHIP_PX30 397 default 0x10080000 if ROCKCHIP_RK3036 398 default 0x10080000 if ROCKCHIP_RK3128 399 default 0x10080000 if ROCKCHIP_RK3188 400 default 0x10080000 if ROCKCHIP_RK322X 401 default 0xff700000 if ROCKCHIP_RK3288 402 default 0xfff80000 if ROCKCHIP_RK3308 403 default 0xff091000 if ROCKCHIP_RK3328 404 default 0xff8c0000 if ROCKCHIP_RK3368 405 default 0xff8c0000 if ROCKCHIP_RK3399 406 default 0x10080000 if ROCKCHIP_RV1108 407 default 0 408 help 409 The IRAM start addr is to locate variant of the boot device from 410 bootrom. 411 412config ROCKCHIP_SPL_RESERVE_IRAM 413 hex "Size of IRAM reserved in SPL" 414 default 0 415 help 416 SPL may need reserve memory for firmware loaded by SPL, whose load 417 address is in IRAM and may overlay with SPL text area if not 418 reserved. 419 420config ROCKCHIP_BROM_HELPER 421 bool 422 423config SPL_ROCKCHIP_EARLYRETURN_TO_BROM 424 bool "SPL requires early-return (for RK3188-style BROM) to BROM" 425 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK 426 help 427 Some Rockchip BROM variants (e.g. on the RK3188) load the 428 first stage in segments and enter multiple times. E.g. on 429 the RK3188, the first 1KB of the first stage are loaded 430 first and entered; after returning to the BROM, the 431 remainder of the first stage is loaded, but the BROM 432 re-enters at the same address/to the same code as previously. 433 434 This enables support code in the BOOT0 hook for the SPL stage 435 to allow multiple entries. 436 437config TPL_ROCKCHIP_EARLYRETURN_TO_BROM 438 bool "TPL requires early-return (for RK3188-style BROM) to BROM" 439 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK 440 help 441 Some Rockchip BROM variants (e.g. on the RK3188) load the 442 first stage in segments and enter multiple times. E.g. on 443 the RK3188, the first 1KB of the first stage are loaded 444 first and entered; after returning to the BROM, the 445 remainder of the first stage is loaded, but the BROM 446 re-enters at the same address/to the same code as previously. 447 448 This enables support code in the BOOT0 hook for the TPL stage 449 to allow multiple entries. 450 451config SPL_MMC_SUPPORT 452 default y if !SPL_ROCKCHIP_BACK_TO_BROM 453 454config RKIMG_BOOTLOADER 455 bool "Support for Rockchip Image Bootloader boot flow" 456 default n 457 help 458 Rockchip use this to boot Android during development cycle and for 459 other OS, typical content kernel.img with zImage/Image, boot.img and 460 recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img 461 with dtb and uboot/kernel logo bmp, vendor storage for custom info 462 like SN and MAC address. 463 464config ROCKCHIP_RESOURCE_IMAGE 465 bool "Enable support for rockchip resource image" 466 depends on RKIMG_BOOTLOADER 467 default y 468 help 469 This enables support to get dtb or logo files from 470 rockchip resource image format partition. 471 472config ROCKCHIP_VENDOR_PARTITION 473 bool "Rockchip vendor storage partition support" 474 depends on RKIMG_BOOTLOADER 475 help 476 This enable support to read/write vendor configuration data from/to 477 this partition. 478 479config USING_KERNEL_DTB 480 bool "Using dtb from Kernel/resource for U-Boot" 481 depends on RKIMG_BOOTLOADER && OF_LIVE 482 default y 483 help 484 This enable support to read dtb from resource and use it for U-Boot, 485 the uart and emmc will still using U-Boot dtb, but other devices like 486 regulator/pmic, display, usb will use dts node from kernel. 487 488config ROCKCHIP_CRC 489 bool "Rockchip CRC verify images" 490 help 491 This enable support Rockchip CRC verify images. It takes a lot of time, 492 so it is better only used for debug. 493 494config ROCKCHIP_SMCCC 495 bool "Rockchip SMCCC" 496 default y if ARM_SMCCC 497 help 498 This enable support for Rockchip SMC calls 499 500config ROCKCHIP_DEBUGGER 501 bool "Rockchip debugger" 502 depends on IRQ 503 help 504 This enable support for Rockchip debugger. Now we install a timer interrupt 505 and dump pt_regs when the timeout event trigger. This helps us to know cpu 506 state when system hang. 507 508config ROCKCHIP_CRASH_DUMP 509 bool "Rockchip crash dump registers" 510 help 511 This enable dump registers when system crash, the registers you would like 512 to dump can be added in show_regs(). 513 514config ROCKCHIP_PRELOADER_ATAGS 515 bool "Rockchip pre-loader atags" 516 default y if ARCH_ROCKCHIP 517 help 518 This enable support Rockchip atags among pre-loaders, i.e. ddr, miniloader, ATF, 519 tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders 520 and finally ends with U-Boot. 521 522config GICV2 523 bool "ARM GICv2" 524 525config GICV3 526 bool "ARM GICv3" 527 528source "arch/arm/mach-rockchip/px30/Kconfig" 529source "arch/arm/mach-rockchip/rk3036/Kconfig" 530source "arch/arm/mach-rockchip/rk3066/Kconfig" 531source "arch/arm/mach-rockchip/rk3128/Kconfig" 532source "arch/arm/mach-rockchip/rk3188/Kconfig" 533source "arch/arm/mach-rockchip/rk322x/Kconfig" 534source "arch/arm/mach-rockchip/rk3288/Kconfig" 535source "arch/arm/mach-rockchip/rk3308/Kconfig" 536source "arch/arm/mach-rockchip/rk3328/Kconfig" 537source "arch/arm/mach-rockchip/rk3368/Kconfig" 538source "arch/arm/mach-rockchip/rk3399/Kconfig" 539source "arch/arm/mach-rockchip/rk1808/Kconfig" 540source "arch/arm/mach-rockchip/rv1108/Kconfig" 541endif 542