xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/Kconfig (revision f05ce84792cbd2e5573a414010d421eb8fbb7689)
1if ARCH_ROCKCHIP
2
3config ROCKCHIP_PX30
4	bool "Support Rockchip PX30"
5	select ARM64
6	select GICV2
7	select ARM_SMCCC
8	select SUPPORT_SPL
9	select SUPPORT_TPL
10	select SPL
11	select TPL
12	select TPL_TINY_FRAMEWORK if TPL
13
14	imply SPL_SERIAL_SUPPORT
15	imply TPL_SERIAL_SUPPORT
16	select DEBUG_UART_BOARD_INIT
17	help
18	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
19	  including NEON and GPU, Mali-400 graphics, several DDR3 options
20	  and video codec support. Peripherals include Gigabit Ethernet,
21	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
22
23if ROCKCHIP_PX30
24
25config TPL_LDSCRIPT
26	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
27
28config TPL_TEXT_BASE
29	default 0xff0e1000
30
31config TPL_MAX_SIZE
32	default 10240
33
34config ROCKCHIP_RK3326
35	bool "Support Rockchip RK3326 "
36	help
37	  RK3326 can use most code from PX30, but at some situations we have
38	  to distinguish between RK3326 and PX30, so this macro gives help.
39	  It is usually selected in rk3326 board defconfig.
40endif
41
42config ROCKCHIP_RK3036
43	bool "Support Rockchip RK3036"
44	select CPU_V7
45	select SUPPORT_SPL
46	select SUPPORT_TPL
47	select SPL
48	select TPL
49	select BOARD_LATE_INIT
50	select ROCKCHIP_BROM_HELPER
51	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
52	select TPL_NEEDS_SEPARATE_STACK if TPL
53	select DEBUG_UART_BOARD_INIT
54	select ARM_SMCCC
55	help
56	  The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
57	  including NEON and GPU, Mali-400 graphics, several DDR3 options
58	  and video codec support. Peripherals include Gigabit Ethernet,
59	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
60
61config ROCKCHIP_RK3128
62	bool "Support Rockchip RK3128"
63	select CPU_V7
64	select GICV2
65	select ARM_SMCCC
66	help
67	  The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
68	  including NEON and GPU, Mali-400 graphics, several DDR3 options
69	  and video codec support. Peripherals include Gigabit Ethernet,
70	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
71
72if ROCKCHIP_RK3128
73
74config ROCKCHIP_RK3126
75	bool "Support Rockchip RK3126 "
76	help
77	  RK3126 can use most code from RK3128, but at some situations we have
78	  to distinguish between RK3126 and RK3128, so this macro gives help.
79	  It is usually selected in rk3126 board defconfig.
80
81config ROCKCHIP_PX3SE
82	bool "Support Rockchip PX3SE"
83	help
84	  PX3SE is a variant of RK3128, it shares codes with RK3128, but we still
85	  need this macro to distinguish PX3SE and RK3128.
86endif
87
88config ROCKCHIP_RK3066
89	bool "Support Rockchip RK3066"
90	select CPU_V7
91	select SUPPORT_SPL
92	select SUPPORT_TPL
93	select SPL
94	select TPL
95	select BOARD_LATE_INIT
96	select ROCKCHIP_BROM_HELPER
97	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
98	help
99	  The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
100	  including NEON and GPU, Mali-400 graphics, several DDR3 options
101	  and video codec support. Peripherals include ethernet, USB2 host
102	  and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
103
104config ROCKCHIP_RK3188
105	bool "Support Rockchip RK3188"
106	select CPU_V7
107	select SPL_BOARD_INIT if SPL
108	select SUPPORT_SPL
109	select SPL
110	select SPL_CLK
111	select SPL_REGMAP
112	select SPL_SYSCON
113	select SPL_RAM
114	select SPL_DRIVERS_MISC_SUPPORT
115	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
116	select BOARD_LATE_INIT
117	select ROCKCHIP_BROM_HELPER
118	help
119	  The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
120	  including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
121	  video interfaces, several memory options and video codec support.
122	  Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
123	  UART, SPI, I2C and PWMs.
124
125config ROCKCHIP_RK322X
126	bool "Support Rockchip RK3228/RK3229"
127	select CPU_V7
128	select SUPPORT_SPL
129	select SUPPORT_TPL
130	select SPL
131	select TPL
132	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
133	select TPL_NEEDS_SEPARATE_STACK if TPL
134	select SPL_DRIVERS_MISC_SUPPORT
135	imply SPL_SERIAL_SUPPORT
136	imply TPL_SERIAL_SUPPORT
137	select ROCKCHIP_BROM_HELPER
138	select DEBUG_UART_BOARD_INIT
139	select TPL_LIBCOMMON_SUPPORT
140	select TPL_LIBGENERIC_SUPPORT
141	select GICV2
142	select ARM_SMCCC
143	help
144	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
145	  including NEON and GPU, Mali-400 graphics, several DDR3 options
146	  and video codec support. Peripherals include Gigabit Ethernet,
147	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
148
149if ROCKCHIP_RK322X
150
151config ROCKCHIP_RK3128X
152	bool "Support Rockchip RK3128X "
153	help
154	  RK3128X can use most code from RK322X, but at some situations we have
155	  to distinguish between RK3128X and RK322X, so this macro gives help.
156	  It is usually selected in RK3128X board defconfig.
157endif
158
159config ROCKCHIP_RK3288
160	bool "Support Rockchip RK3288"
161	select CPU_V7
162	select SPL_BOARD_INIT if SPL
163	select SUPPORT_SPL
164	select SUPPORT_TPL
165	select SPL
166	select TPL
167	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
168	select TPL_NEEDS_SEPARATE_STACK if TPL
169	imply TPL_SERIAL_SUPPORT
170	select GICV2
171	select ARM_SMCCC
172	select SPL_OPTEE
173	select FIT
174	select SPL_LOAD_FIT
175	select TPL_LIBCOMMON_SUPPORT
176	select TPL_LIBGENERIC_SUPPORT
177	select TPL_SYS_MALLOC_SIMPLE
178	select TPL_BOOTROM_SUPPORT
179	select TPL_DRIVERS_MISC_SUPPORT
180	select TPL_OF_CONTROL
181	select TPL_DM
182	select TPL_REGMAP
183	select TPL_SYSCON
184	select TPL_RAM
185	select TPL_CLK
186	select TPL_TINY_MEMSET
187	help
188	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
189	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
190	  video interfaces supporting HDMI and eDP, several DDR3 options
191	  and video codec support. Peripherals include Gigabit Ethernet,
192	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
193
194if ROCKCHIP_RK3288
195config SPL_FIT_GENERATOR
196	default "arch/arm/mach-rockchip/make_fit_optee.sh"
197
198config TPL_LDSCRIPT
199	default "arch/arm/mach-rockchip/u-boot-tpl.lds"
200
201config TPL_TEXT_BASE
202	default 0xff704000
203
204config TPL_MAX_SIZE
205	default 28672
206
207config TPL_STACK
208	default 0xff718000
209
210endif
211
212config ROCKCHIP_RK3308
213	bool "Support Rockchip RK3308"
214	select ARM64 if !ARM64_BOOT_AARCH32
215	select DEBUG_UART_BOARD_INIT
216	select ARM_SMCCC
217	select GICV2
218	help
219	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
220	  Cortex-A35 and highly integrated audio interfaces.
221
222config ROCKCHIP_RK3328
223	bool "Support Rockchip RK3328"
224	select ARM64
225	select GICV2
226	select SUPPORT_SPL
227	select SUPPORT_TPL
228	select SPL
229	select TPL
230	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
231	select TPL_NEEDS_SEPARATE_STACK if TPL
232	imply SPL_SERIAL_SUPPORT
233	imply TPL_SERIAL_SUPPORT
234	imply SPL_SEPARATE_BSS
235	select DEBUG_UART_BOARD_INIT
236	select ARM_SMCCC
237	help
238	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
239	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
240	  video interfaces supporting HDMI and eDP, several DDR3 options
241	  and video codec support. Peripherals include Gigabit Ethernet,
242	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
243
244if ROCKCHIP_RK3328
245
246config TPL_LDSCRIPT
247	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
248
249config TPL_TEXT_BASE
250        default 0xff091000
251
252config TPL_MAX_SIZE
253        default 28672
254
255config TPL_STACK
256        default 0xff098000
257
258endif
259
260config ROCKCHIP_RK3368
261	bool "Support Rockchip RK3368"
262	select ARM64
263	select SUPPORT_SPL
264	select SUPPORT_TPL
265	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
266	select TPL_NEEDS_SEPARATE_STACK if TPL
267	imply SPL_SEPARATE_BSS
268	imply SPL_SERIAL_SUPPORT
269	imply TPL_SERIAL_SUPPORT
270	select DEBUG_UART_BOARD_INIT
271	select GICV2
272	select ARM_SMCCC
273	help
274	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
275	  into a big and little cluster with 4 cores each) Cortex-A53 including
276	  AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
277	  (for the little cluster), PowerVR G6110 based graphics, one video
278	  output processor supporting LVDS/HDMI/eDP, several DDR3 options and
279	  video codec support.
280
281	  On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
282	  I2S, UARTs, SPI, I2C and PWMs.
283
284if ROCKCHIP_RK3368
285
286config TPL_LDSCRIPT
287	default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
288
289config TPL_TEXT_BASE
290        default 0xff8c1000
291
292config TPL_MAX_SIZE
293        default 28672
294
295config TPL_STACK
296        default 0xff8cffff
297
298endif
299
300config ROCKCHIP_RK3399
301	bool "Support Rockchip RK3399"
302	select ARM64
303	select SUPPORT_SPL
304	select SUPPORT_TPL
305	select SPL
306	select TPL
307	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
308	select TPL_NEEDS_SEPARATE_STACK if TPL
309	imply TPL_SERIAL_SUPPORT
310	select SPL_SEPARATE_BSS
311	select SPL_SERIAL_SUPPORT
312	select SPL_DRIVERS_MISC_SUPPORT
313	select DEBUG_UART_BOARD_INIT
314	select GICV3
315	select BOARD_LATE_INIT
316	select ROCKCHIP_BROM_HELPER
317	select ARM_SMCCC
318	select TPL_LIBCOMMON_SUPPORT
319	select TPL_LIBGENERIC_SUPPORT
320	select TPL_SYS_MALLOC_SIMPLE
321	select TPL_BOOTROM_SUPPORT
322	select TPL_DRIVERS_MISC_SUPPORT
323	select TPL_OF_CONTROL
324	select TPL_DM
325	select TPL_REGMAP
326	select TPL_SYSCON
327	select TPL_RAM
328	select TPL_CLK
329	select TPL_TINY_MEMSET
330	help
331	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
332	  and quad-core Cortex-A53.
333	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
334	  video interfaces supporting HDMI and eDP, several DDR3 options
335	  and video codec support. Peripherals include Gigabit Ethernet,
336	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
337
338if ROCKCHIP_RK3399
339
340config ROCKCHIP_RK3399PRO
341	bool "Support Rockchip RK3399Pro"
342
343config TPL_LDSCRIPT
344	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
345
346config TPL_TEXT_BASE
347        default 0xff8c2000
348
349config TPL_MAX_SIZE
350        default 188416
351
352config TPL_STACK
353        default 0xff8effff
354
355endif
356
357
358config ROCKCHIP_RK1808
359	bool "Support Rockchip RK1808"
360	select ARM64
361	select ARM_SMCCC
362	select DEBUG_UART_BOARD_INIT
363	help
364	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual
365	  Cortex-A35.
366
367if ROCKCHIP_RK1808
368
369config COPROCESSOR_RK1808
370	bool "RK1808 coprocessor"
371	help
372	  This indicates the RK1808 is working as a coprocessor for another
373	  more powerful SoC.
374
375endif
376
377config ROCKCHIP_RV1108
378	bool "Support Rockchip RV1108"
379	select CPU_V7
380	select SUPPORT_SPL
381	select SUPPORT_TPL
382	select SPL
383	select TPL
384	select BOARD_LATE_INIT
385	help
386	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
387	  and a DSP.
388
389if ROCKCHIP_RV1108
390
391config TPL_LDSCRIPT
392        default "arch/arm/mach-rockchip/u-boot-tpl.lds"
393
394config TPL_TEXT_BASE
395        default 0x10080800
396
397config TPL_MAX_SIZE
398        default 6144
399
400config TPL_STACK
401        default 0x10082000
402
403endif
404
405config SPL_ROCKCHIP_BACK_TO_BROM
406	bool "SPL returns to bootrom"
407	default y if ROCKCHIP_RK3036
408	select ROCKCHIP_BROM_HELPER
409	depends on SPL
410	help
411	  Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
412          SPL will return to the boot rom, which will then load the U-Boot
413          binary to keep going on.
414
415config TPL_ROCKCHIP_BACK_TO_BROM
416	bool "TPL returns to bootrom"
417	default y
418	select ROCKCHIP_BROM_HELPER
419	depends on TPL
420	help
421	  Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
422          SPL will return to the boot rom, which will then load the U-Boot
423          binary to keep going on.
424
425config ARM64_BOOT_AARCH32
426	bool "Support Boot an ARM64 on AArch32 execution state"
427	select CPU_V7
428	default n
429	help
430	  If you want to boot an ARM64 processor on 32-bit mode, say y here.
431
432config ROCKCHIP_BOOT_MODE_REG
433	hex "Rockchip boot mode flag register address"
434	default 0xff010200 if ROCKCHIP_PX30
435	default 0x200081c8 if ROCKCHIP_RK3036
436	default 0x100a0038 if ROCKCHIP_RK3128
437	default 0x20004040 if ROCKCHIP_RK3188
438	default 0x110005c8 if ROCKCHIP_RK322X
439	default 0xff730094 if ROCKCHIP_RK3288
440	default 0xff000500 if ROCKCHIP_RK3308
441	default 0xff1005c8 if ROCKCHIP_RK3328
442	default 0xff738200 if ROCKCHIP_RK3368
443	default 0xff320300 if ROCKCHIP_RK3399
444	default 0xfe020200 if ROCKCHIP_RK1808
445	default 0x10300580 if ROCKCHIP_RV1108
446	default 0
447	help
448	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
449	  according to the value from this register.
450
451config ROCKCHIP_STIMER_BASE
452	hex "Rockchip Secure timer base address"
453	default 0xff220020 if ROCKCHIP_PX30
454	default 0x200440a0 if ROCKCHIP_RK3036
455	default 0x2000e000 if ROCKCHIP_RK3066
456	default 0x20018020 if ROCKCHIP_RK3126
457	default 0x200440a0 if ROCKCHIP_RK3128
458	default 0x2000e000 if ROCKCHIP_RK3188
459	default 0x110d0020 if ROCKCHIP_RK322X
460	default 0xff810020 if ROCKCHIP_RK3288
461	default 0xff1d0020 if ROCKCHIP_RK3328
462	default 0xff830020 if ROCKCHIP_RK3368
463	default 0xff8680a0 if ROCKCHIP_RK3399
464	default 0x10350020 if ROCKCHIP_RV1108
465	default 0
466	help
467	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
468	  works after this timer work.
469
470config ROCKCHIP_IRAM_START_ADDR
471	hex "Rockchip Secure timer base address"
472	default 0xff0e0000 if ROCKCHIP_PX30
473	default 0x10080000 if ROCKCHIP_RK3036
474	default 0x10080000 if ROCKCHIP_RK3128
475	default 0x10080000 if ROCKCHIP_RK3188
476	default 0x10080000 if ROCKCHIP_RK322X
477	default 0xff700000 if ROCKCHIP_RK3288
478	default 0xfff80000 if ROCKCHIP_RK3308
479	default 0xff091000 if ROCKCHIP_RK3328
480	default 0xff8c0000 if ROCKCHIP_RK3368
481	default 0xff8c0000 if ROCKCHIP_RK3399
482	default 0x10080000 if ROCKCHIP_RV1108
483	default 0
484	help
485	  The IRAM start addr is to locate variant of the boot device from
486	  bootrom.
487
488config ROCKCHIP_SPL_RESERVE_IRAM
489	hex "Size of IRAM reserved in SPL"
490	default 0
491	help
492	  SPL may need reserve memory for firmware loaded by SPL, whose load
493	  address is in IRAM and may overlay with SPL text area if not
494	  reserved.
495
496config ROCKCHIP_BROM_HELPER
497	bool
498
499config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
500        bool "SPL requires early-return (for RK3188-style BROM) to BROM"
501	depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
502	help
503	  Some Rockchip BROM variants (e.g. on the RK3188) load the
504	  first stage in segments and enter multiple times. E.g. on
505	  the RK3188, the first 1KB of the first stage are loaded
506	  first and entered; after returning to the BROM, the
507	  remainder of the first stage is loaded, but the BROM
508	  re-enters at the same address/to the same code as previously.
509
510	  This enables support code in the BOOT0 hook for the SPL stage
511	  to allow multiple entries.
512
513config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
514        bool "TPL requires early-return (for RK3188-style BROM) to BROM"
515	depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
516	help
517	  Some Rockchip BROM variants (e.g. on the RK3188) load the
518	  first stage in segments and enter multiple times. E.g. on
519	  the RK3188, the first 1KB of the first stage are loaded
520	  first and entered; after returning to the BROM, the
521	  remainder of the first stage is loaded, but the BROM
522	  re-enters at the same address/to the same code as previously.
523
524	  This enables support code in the BOOT0 hook for the TPL stage
525	  to allow multiple entries.
526
527config SPL_MMC_SUPPORT
528	default y if !SPL_ROCKCHIP_BACK_TO_BROM
529
530config RKIMG_BOOTLOADER
531	bool "Support for Rockchip Image Bootloader boot flow"
532	default n
533	help
534	  Rockchip use this to boot Android during development cycle and for
535	  other OS, typical content kernel.img with zImage/Image, boot.img and
536	  recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img
537	  with dtb and uboot/kernel logo bmp, vendor storage for custom info
538	  like SN and MAC address.
539
540config ROCKCHIP_RESOURCE_IMAGE
541	bool "Enable support for rockchip resource image"
542	depends on RKIMG_BOOTLOADER
543	default y
544	help
545	  This enables support to get dtb or logo files from
546	  rockchip resource image format partition.
547
548config ROCKCHIP_VENDOR_PARTITION
549	bool "Rockchip vendor storage partition support"
550	depends on RKIMG_BOOTLOADER
551	help
552	  This enable support to read/write vendor configuration data from/to
553	  this partition.
554
555config USING_KERNEL_DTB
556	bool "Using dtb from Kernel/resource for U-Boot"
557	depends on RKIMG_BOOTLOADER && OF_LIVE
558	default y
559	help
560	  This enable support to read dtb from resource and use it for U-Boot,
561	  the uart and emmc will still using U-Boot dtb, but other devices like
562	  regulator/pmic, display, usb will use dts node from kernel.
563
564config ROCKCHIP_CRC
565	bool "Rockchip CRC verify images"
566	help
567	  This enable support Rockchip CRC verify images. It takes a lot of time,
568	  so it is better only used for debug.
569
570config ROCKCHIP_SMCCC
571	bool "Rockchip SMCCC"
572	default y if ARM_SMCCC
573	help
574	  This enable support for Rockchip SMC calls
575
576config ROCKCHIP_DEBUGGER
577	bool "Rockchip debugger"
578	depends on IRQ
579	help
580	  This enable support for Rockchip debugger. Now we install a timer interrupt
581	  and dump pt_regs when the timeout event trigger. This helps us to know cpu
582	  state when system hang.
583
584config ROCKCHIP_CRASH_DUMP
585	bool "Rockchip crash dump registers"
586	help
587	  This enable dump registers when system crash, the registers you would like
588	  to dump can be added in show_regs().
589
590config ROCKCHIP_PRELOADER_ATAGS
591	bool "Rockchip pre-loader atags"
592	default y if ARCH_ROCKCHIP
593	help
594	  This enable support Rockchip atags among pre-loaders, i.e. ddr, miniloader, ATF,
595	  tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders
596	  and finally ends with U-Boot.
597
598config ROCKCHIP_PRELOADER_SERIAL
599	bool "Rockchip pre-loader serial"
600	default y if ROCKCHIP_PRELOADER_ATAGS
601	help
602	  This enable U-Boot using pre-loader atags serial configure to initialize console.
603	  It denpends on serial aliases to find pre-loader serial number.
604
605config GICV2
606	bool "ARM GICv2"
607
608config GICV3
609	bool "ARM GICv3"
610
611source "arch/arm/mach-rockchip/px30/Kconfig"
612source "arch/arm/mach-rockchip/rk3036/Kconfig"
613source "arch/arm/mach-rockchip/rk3066/Kconfig"
614source "arch/arm/mach-rockchip/rk3128/Kconfig"
615source "arch/arm/mach-rockchip/rk3188/Kconfig"
616source "arch/arm/mach-rockchip/rk322x/Kconfig"
617source "arch/arm/mach-rockchip/rk3288/Kconfig"
618source "arch/arm/mach-rockchip/rk3308/Kconfig"
619source "arch/arm/mach-rockchip/rk3328/Kconfig"
620source "arch/arm/mach-rockchip/rk3368/Kconfig"
621source "arch/arm/mach-rockchip/rk3399/Kconfig"
622source "arch/arm/mach-rockchip/rk1808/Kconfig"
623source "arch/arm/mach-rockchip/rv1108/Kconfig"
624endif
625