1if ARCH_ROCKCHIP 2 3config ROCKCHIP_PX30 4 bool "Support Rockchip PX30" 5 select ARM64 6 select GICV2 7 select ARM_SMCCC 8 help 9 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 10 including NEON and GPU, Mali-400 graphics, several DDR3 options 11 and video codec support. Peripherals include Gigabit Ethernet, 12 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 13 14if ROCKCHIP_PX30 15 16config ROCKCHIP_RK3326 17 bool "Support Rockchip RK3326 " 18 help 19 RK3326 can use most code from PX30, but at some situations we have 20 to distinguish between RK3326 and PX30, so this macro gives help. 21 It is usually selected in rk3326 board defconfig. 22endif 23 24config ROCKCHIP_RK3036 25 bool "Support Rockchip RK3036" 26 select CPU_V7 27 select SUPPORT_SPL 28 select SPL 29 help 30 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 31 including NEON and GPU, Mali-400 graphics, several DDR3 options 32 and video codec support. Peripherals include Gigabit Ethernet, 33 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 34 35config ROCKCHIP_RK3128 36 bool "Support Rockchip RK3128" 37 select CPU_V7 38 select GICV2 39 select ARM_SMCCC 40 help 41 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 42 including NEON and GPU, Mali-400 graphics, several DDR3 options 43 and video codec support. Peripherals include Gigabit Ethernet, 44 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 45 46if ROCKCHIP_RK3128 47 48config ROCKCHIP_RK3126 49 bool "Support Rockchip RK3126 " 50 help 51 RK3126 can use most code from RK3128, but at some situations we have 52 to distinguish between RK3126 and RK3128, so this macro gives help. 53 It is usually selected in rk3126 board defconfig. 54endif 55 56config ROCKCHIP_RK3066 57 bool "Support Rockchip RK3066" 58 select CPU_V7 59 select SUPPORT_SPL 60 select SUPPORT_TPL 61 select SPL 62 select TPL 63 select BOARD_LATE_INIT 64 select ROCKCHIP_BROM_HELPER 65 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 66 help 67 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 68 including NEON and GPU, Mali-400 graphics, several DDR3 options 69 and video codec support. Peripherals include ethernet, USB2 host 70 and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 71 72config ROCKCHIP_RK3188 73 bool "Support Rockchip RK3188" 74 select CPU_V7 75 select SPL_BOARD_INIT if SPL 76 select SUPPORT_SPL 77 select SPL 78 select SPL_CLK 79 select SPL_REGMAP 80 select SPL_SYSCON 81 select SPL_RAM 82 select SPL_DRIVERS_MISC_SUPPORT 83 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 84 select BOARD_LATE_INIT 85 select ROCKCHIP_BROM_HELPER 86 help 87 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 88 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two 89 video interfaces, several memory options and video codec support. 90 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, 91 UART, SPI, I2C and PWMs. 92 93config ROCKCHIP_RK322X 94 bool "Support Rockchip RK3228/RK3229" 95 select CPU_V7 96 select SUPPORT_SPL 97 select SUPPORT_TPL 98 select SPL 99 select TPL 100 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 101 select TPL_NEEDS_SEPARATE_STACK if TPL 102 select SPL_DRIVERS_MISC_SUPPORT 103 imply SPL_SERIAL_SUPPORT 104 imply TPL_SERIAL_SUPPORT 105 select ROCKCHIP_BROM_HELPER 106 select DEBUG_UART_BOARD_INIT 107 select TPL_LIBCOMMON_SUPPORT 108 select TPL_LIBGENERIC_SUPPORT 109 select GICV2 110 help 111 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 112 including NEON and GPU, Mali-400 graphics, several DDR3 options 113 and video codec support. Peripherals include Gigabit Ethernet, 114 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 115 116config ROCKCHIP_RK3288 117 bool "Support Rockchip RK3288" 118 select CPU_V7 119 select SPL_BOARD_INIT if SPL 120 select SUPPORT_SPL 121 select SPL 122 select GICV2 123 help 124 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 125 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 126 video interfaces supporting HDMI and eDP, several DDR3 options 127 and video codec support. Peripherals include Gigabit Ethernet, 128 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 129 130config ROCKCHIP_RK3328 131 bool "Support Rockchip RK3328" 132 select ARM64 133 select GICV2 134 select SUPPORT_SPL 135 select SUPPORT_TPL 136 select SPL 137 select TPL 138 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 139 select TPL_NEEDS_SEPARATE_STACK if TPL 140 imply SPL_SERIAL_SUPPORT 141 imply TPL_SERIAL_SUPPORT 142 imply SPL_SEPARATE_BSS 143 select DEBUG_UART_BOARD_INIT 144 help 145 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. 146 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 147 video interfaces supporting HDMI and eDP, several DDR3 options 148 and video codec support. Peripherals include Gigabit Ethernet, 149 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 150 151if ROCKCHIP_RK3328 152 153config TPL_LDSCRIPT 154 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 155 156config TPL_TEXT_BASE 157 default 0xff091000 158 159config TPL_MAX_SIZE 160 default 28672 161 162config TPL_STACK 163 default 0xff098000 164 165endif 166 167config ROCKCHIP_RK3368 168 bool "Support Rockchip RK3368" 169 select ARM64 170 select SUPPORT_SPL 171 select SUPPORT_TPL 172 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 173 select TPL_NEEDS_SEPARATE_STACK if TPL 174 imply SPL_SEPARATE_BSS 175 imply SPL_SERIAL_SUPPORT 176 imply TPL_SERIAL_SUPPORT 177 select DEBUG_UART_BOARD_INIT 178 select GICV2 179 help 180 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised 181 into a big and little cluster with 4 cores each) Cortex-A53 including 182 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 183 (for the little cluster), PowerVR G6110 based graphics, one video 184 output processor supporting LVDS/HDMI/eDP, several DDR3 options and 185 video codec support. 186 187 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, 188 I2S, UARTs, SPI, I2C and PWMs. 189 190if ROCKCHIP_RK3368 191 192config TPL_LDSCRIPT 193 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" 194 195config TPL_TEXT_BASE 196 default 0xff8c1000 197 198config TPL_MAX_SIZE 199 default 28672 200 201config TPL_STACK 202 default 0xff8cffff 203 204endif 205 206config ROCKCHIP_RK3399 207 bool "Support Rockchip RK3399" 208 select ARM64 209 select SUPPORT_SPL 210 select SPL 211 select SPL_SEPARATE_BSS 212 select SPL_SERIAL_SUPPORT 213 select SPL_DRIVERS_MISC_SUPPORT 214 select DEBUG_UART_BOARD_INIT 215 select GICV3 216 select BOARD_LATE_INIT 217 select ROCKCHIP_BROM_HELPER 218 help 219 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 220 and quad-core Cortex-A53. 221 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 222 video interfaces supporting HDMI and eDP, several DDR3 options 223 and video codec support. Peripherals include Gigabit Ethernet, 224 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 225 226config ROCKCHIP_RV1108 227 bool "Support Rockchip RV1108" 228 select CPU_V7 229 select SUPPORT_SPL 230 select SPL 231 help 232 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 233 and a DSP. 234 235config SPL_ROCKCHIP_BACK_TO_BROM 236 bool "SPL returns to bootrom" 237 default y if ROCKCHIP_RK3036 238 select ROCKCHIP_BROM_HELPER 239 depends on SPL 240 help 241 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 242 SPL will return to the boot rom, which will then load the U-Boot 243 binary to keep going on. 244 245config TPL_ROCKCHIP_BACK_TO_BROM 246 bool "TPL returns to bootrom" 247 default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328 248 select ROCKCHIP_BROM_HELPER 249 depends on TPL 250 help 251 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 252 SPL will return to the boot rom, which will then load the U-Boot 253 binary to keep going on. 254 255config ROCKCHIP_BOOT_MODE_REG 256 hex "Rockchip boot mode flag register address" 257 default 0xff010200 if ROCKCHIP_PX30 258 default 0x200081c8 if ROCKCHIP_RK3036 259 default 0x100a0038 if ROCKCHIP_RK3128 260 default 0x20004040 if ROCKCHIP_RK3188 261 default 0x110005c8 if ROCKCHIP_RK322X 262 default 0xff730094 if ROCKCHIP_RK3288 263 default 0xff1005c8 if ROCKCHIP_RK3328 264 default 0xff738200 if ROCKCHIP_RK3368 265 default 0xff320300 if ROCKCHIP_RK3399 266 default 0x10300580 if ROCKCHIP_RV1108 267 default 0 268 help 269 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) 270 according to the value from this register. 271 272config ROCKCHIP_STIMER_BASE 273 hex "Rockchip Secure timer base address" 274 default 0xff220020 if ROCKCHIP_PX30 275 default 0x200440a0 if ROCKCHIP_RK3036 276 default 0x2000e000 if ROCKCHIP_RK3066 277 default 0x20018020 if ROCKCHIP_RK3126 278 default 0x200440a0 if ROCKCHIP_RK3128 279 default 0x2000e000 if ROCKCHIP_RK3188 280 default 0x110d0020 if ROCKCHIP_RK322X 281 default 0xff810020 if ROCKCHIP_RK3288 282 default 0xff1d0020 if ROCKCHIP_RK3328 283 default 0xff830020 if ROCKCHIP_RK3368 284 default 0xff8680a0 if ROCKCHIP_RK3399 285 default 0x10350020 if ROCKCHIP_RV1108 286 default 0 287 help 288 The secure timer inited in SPL/TPL in secure word, ARM generic timer 289 works after this timer work. 290 291config ROCKCHIP_IRAM_START_ADDR 292 hex "Rockchip Secure timer base address" 293 default 0xff0e0000 if ROCKCHIP_PX30 294 default 0x10080000 if ROCKCHIP_RK3036 295 default 0x10080000 if ROCKCHIP_RK3128 296 default 0x10080000 if ROCKCHIP_RK3188 297 default 0x10080000 if ROCKCHIP_RK322X 298 default 0xff700000 if ROCKCHIP_RK3288 299 default 0xff091000 if ROCKCHIP_RK3328 300 default 0xff8c0000 if ROCKCHIP_RK3368 301 default 0xff8c0000 if ROCKCHIP_RK3399 302 default 0x10080000 if ROCKCHIP_RV1108 303 default 0 304 help 305 The IRAM start addr is to locate variant of the boot device from 306 bootrom. 307 308config ROCKCHIP_SPL_RESERVE_IRAM 309 hex "Size of IRAM reserved in SPL" 310 default 0 311 help 312 SPL may need reserve memory for firmware loaded by SPL, whose load 313 address is in IRAM and may overlay with SPL text area if not 314 reserved. 315 316config ROCKCHIP_BROM_HELPER 317 bool 318 319config SPL_ROCKCHIP_EARLYRETURN_TO_BROM 320 bool "SPL requires early-return (for RK3188-style BROM) to BROM" 321 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK 322 help 323 Some Rockchip BROM variants (e.g. on the RK3188) load the 324 first stage in segments and enter multiple times. E.g. on 325 the RK3188, the first 1KB of the first stage are loaded 326 first and entered; after returning to the BROM, the 327 remainder of the first stage is loaded, but the BROM 328 re-enters at the same address/to the same code as previously. 329 330 This enables support code in the BOOT0 hook for the SPL stage 331 to allow multiple entries. 332 333config TPL_ROCKCHIP_EARLYRETURN_TO_BROM 334 bool "TPL requires early-return (for RK3188-style BROM) to BROM" 335 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK 336 help 337 Some Rockchip BROM variants (e.g. on the RK3188) load the 338 first stage in segments and enter multiple times. E.g. on 339 the RK3188, the first 1KB of the first stage are loaded 340 first and entered; after returning to the BROM, the 341 remainder of the first stage is loaded, but the BROM 342 re-enters at the same address/to the same code as previously. 343 344 This enables support code in the BOOT0 hook for the TPL stage 345 to allow multiple entries. 346 347config SPL_MMC_SUPPORT 348 default y if !SPL_ROCKCHIP_BACK_TO_BROM 349 350config RKIMG_BOOTLOADER 351 bool "Support for Rockchip Image Bootloader boot flow" 352 default n 353 help 354 Rockchip use this to boot Android during development cycle and for 355 other OS, typical content kernel.img with zImage/Image, boot.img and 356 recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img 357 with dtb and uboot/kernel logo bmp, vendor storage for custom info 358 like SN and MAC address. 359 360config ROCKCHIP_RESOURCE_IMAGE 361 bool "Enable support for rockchip resource image" 362 depends on RKIMG_BOOTLOADER 363 default y 364 help 365 This enables support to get dtb or logo files from 366 rockchip resource image format partition. 367 368config ROCKCHIP_VENDOR_PARTITION 369 bool "Rockchip vendor storage partition support" 370 depends on RKIMG_BOOTLOADER 371 help 372 This enable support to read/write vendor configuration data from/to 373 this partition. 374 375config USING_KERNEL_DTB 376 bool "Using dtb from Kernel/resource for U-Boot" 377 depends on RKIMG_BOOTLOADER && OF_LIVE 378 default y 379 help 380 This enable support to read dtb from resource and use it for U-Boot, 381 the uart and emmc will still using U-Boot dtb, but other devices like 382 regulator/pmic, display, usb will use dts node from kernel. 383 384config ROCKCHIP_CRC 385 bool "Rockchip CRC verify images" 386 help 387 This enable support Rockchip CRC verify images. It takes a lot of time, 388 so it is better only used for debug. 389 390config ROCKCHIP_SMCCC 391 bool "Rockchip SMCCC" 392 default y if ARM_SMCCC 393 help 394 This enable support for Rockchip SMC calls 395 396config GICV2 397 bool "ARM GICv2" 398 399config GICV3 400 bool "ARM GICv3" 401 402source "arch/arm/mach-rockchip/px30/Kconfig" 403source "arch/arm/mach-rockchip/rk3036/Kconfig" 404source "arch/arm/mach-rockchip/rk3066/Kconfig" 405source "arch/arm/mach-rockchip/rk3128/Kconfig" 406source "arch/arm/mach-rockchip/rk3188/Kconfig" 407source "arch/arm/mach-rockchip/rk322x/Kconfig" 408source "arch/arm/mach-rockchip/rk3288/Kconfig" 409source "arch/arm/mach-rockchip/rk3328/Kconfig" 410source "arch/arm/mach-rockchip/rk3368/Kconfig" 411source "arch/arm/mach-rockchip/rk3399/Kconfig" 412source "arch/arm/mach-rockchip/rv1108/Kconfig" 413endif 414