1if ARCH_ROCKCHIP 2 3config ROCKCHIP_PX30 4 bool "Support Rockchip PX30" 5 select ARM64 6 select GICV2 7 select ARM_SMCCC 8 help 9 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 10 including NEON and GPU, Mali-400 graphics, several DDR3 options 11 and video codec support. Peripherals include Gigabit Ethernet, 12 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 13 14if ROCKCHIP_PX30 15 16config ROCKCHIP_RK3326 17 bool "Support Rockchip RK3326 " 18 help 19 RK3326 can use most code from PX30, but at some situations we have 20 to distinguish between RK3326 and PX30, so this macro gives help. 21 It is usually selected in rk3326 board defconfig. 22endif 23 24config ROCKCHIP_RK3036 25 bool "Support Rockchip RK3036" 26 select CPU_V7 27 select SUPPORT_SPL 28 select SPL 29 help 30 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 31 including NEON and GPU, Mali-400 graphics, several DDR3 options 32 and video codec support. Peripherals include Gigabit Ethernet, 33 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 34 35config ROCKCHIP_RK3128 36 bool "Support Rockchip RK3128" 37 select CPU_V7 38 select GICV2 39 select ARM_SMCCC 40 help 41 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 42 including NEON and GPU, Mali-400 graphics, several DDR3 options 43 and video codec support. Peripherals include Gigabit Ethernet, 44 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 45 46if ROCKCHIP_RK3128 47 48config ROCKCHIP_RK3126 49 bool "Support Rockchip RK3126 " 50 help 51 RK3126 can use most code from RK3128, but at some situations we have 52 to distinguish between RK3126 and RK3128, so this macro gives help. 53 It is usually selected in rk3126 board defconfig. 54endif 55 56config ROCKCHIP_RK3066 57 bool "Support Rockchip RK3066" 58 select CPU_V7 59 select SUPPORT_SPL 60 select SUPPORT_TPL 61 select SPL 62 select TPL 63 select BOARD_LATE_INIT 64 select ROCKCHIP_BROM_HELPER 65 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 66 help 67 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 68 including NEON and GPU, Mali-400 graphics, several DDR3 options 69 and video codec support. Peripherals include ethernet, USB2 host 70 and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 71 72config ROCKCHIP_RK3188 73 bool "Support Rockchip RK3188" 74 select CPU_V7 75 select SPL_BOARD_INIT if SPL 76 select SUPPORT_SPL 77 select SPL 78 select SPL_CLK 79 select SPL_REGMAP 80 select SPL_SYSCON 81 select SPL_RAM 82 select SPL_DRIVERS_MISC_SUPPORT 83 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 84 select BOARD_LATE_INIT 85 select ROCKCHIP_BROM_HELPER 86 help 87 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 88 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two 89 video interfaces, several memory options and video codec support. 90 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, 91 UART, SPI, I2C and PWMs. 92 93config ROCKCHIP_RK322X 94 bool "Support Rockchip RK3228/RK3229" 95 select CPU_V7 96 select SUPPORT_SPL 97 select SUPPORT_TPL 98 select SPL 99 select TPL 100 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 101 select TPL_NEEDS_SEPARATE_STACK if TPL 102 select SPL_DRIVERS_MISC_SUPPORT 103 imply SPL_SERIAL_SUPPORT 104 imply TPL_SERIAL_SUPPORT 105 select ROCKCHIP_BROM_HELPER 106 select DEBUG_UART_BOARD_INIT 107 select TPL_LIBCOMMON_SUPPORT 108 select TPL_LIBGENERIC_SUPPORT 109 select GICV2 110 help 111 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 112 including NEON and GPU, Mali-400 graphics, several DDR3 options 113 and video codec support. Peripherals include Gigabit Ethernet, 114 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 115 116config ROCKCHIP_RK3288 117 bool "Support Rockchip RK3288" 118 select CPU_V7 119 select SPL_BOARD_INIT if SPL 120 select SUPPORT_SPL 121 select SPL 122 select GICV2 123 help 124 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 125 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 126 video interfaces supporting HDMI and eDP, several DDR3 options 127 and video codec support. Peripherals include Gigabit Ethernet, 128 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 129 130config ROCKCHIP_RK3308 131 bool "Support Rockchip RK3308" 132 select ARM64 133 select DEBUG_UART_BOARD_INIT 134 help 135 The Rockchip RK3308 is a ARM-based Soc which embeded with quad 136 Cortex-A35 and highly integrated audio interfaces. 137 138config ROCKCHIP_RK3328 139 bool "Support Rockchip RK3328" 140 select ARM64 141 select GICV2 142 select SUPPORT_SPL 143 select SUPPORT_TPL 144 select SPL 145 select TPL 146 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 147 select TPL_NEEDS_SEPARATE_STACK if TPL 148 imply SPL_SERIAL_SUPPORT 149 imply TPL_SERIAL_SUPPORT 150 imply SPL_SEPARATE_BSS 151 select DEBUG_UART_BOARD_INIT 152 help 153 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. 154 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 155 video interfaces supporting HDMI and eDP, several DDR3 options 156 and video codec support. Peripherals include Gigabit Ethernet, 157 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 158 159if ROCKCHIP_RK3328 160 161config TPL_LDSCRIPT 162 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 163 164config TPL_TEXT_BASE 165 default 0xff091000 166 167config TPL_MAX_SIZE 168 default 28672 169 170config TPL_STACK 171 default 0xff098000 172 173endif 174 175config ROCKCHIP_RK3368 176 bool "Support Rockchip RK3368" 177 select ARM64 178 select SUPPORT_SPL 179 select SUPPORT_TPL 180 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 181 select TPL_NEEDS_SEPARATE_STACK if TPL 182 imply SPL_SEPARATE_BSS 183 imply SPL_SERIAL_SUPPORT 184 imply TPL_SERIAL_SUPPORT 185 select DEBUG_UART_BOARD_INIT 186 select GICV2 187 help 188 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised 189 into a big and little cluster with 4 cores each) Cortex-A53 including 190 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 191 (for the little cluster), PowerVR G6110 based graphics, one video 192 output processor supporting LVDS/HDMI/eDP, several DDR3 options and 193 video codec support. 194 195 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, 196 I2S, UARTs, SPI, I2C and PWMs. 197 198if ROCKCHIP_RK3368 199 200config TPL_LDSCRIPT 201 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" 202 203config TPL_TEXT_BASE 204 default 0xff8c1000 205 206config TPL_MAX_SIZE 207 default 28672 208 209config TPL_STACK 210 default 0xff8cffff 211 212endif 213 214config ROCKCHIP_RK3399 215 bool "Support Rockchip RK3399" 216 select ARM64 217 select SUPPORT_SPL 218 select SPL 219 select SPL_SEPARATE_BSS 220 select SPL_SERIAL_SUPPORT 221 select SPL_DRIVERS_MISC_SUPPORT 222 select DEBUG_UART_BOARD_INIT 223 select GICV3 224 select BOARD_LATE_INIT 225 select ROCKCHIP_BROM_HELPER 226 help 227 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 228 and quad-core Cortex-A53. 229 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 230 video interfaces supporting HDMI and eDP, several DDR3 options 231 and video codec support. Peripherals include Gigabit Ethernet, 232 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 233 234config ROCKCHIP_RV1108 235 bool "Support Rockchip RV1108" 236 select CPU_V7 237 select SUPPORT_SPL 238 select SPL 239 help 240 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 241 and a DSP. 242 243config SPL_ROCKCHIP_BACK_TO_BROM 244 bool "SPL returns to bootrom" 245 default y if ROCKCHIP_RK3036 246 select ROCKCHIP_BROM_HELPER 247 depends on SPL 248 help 249 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 250 SPL will return to the boot rom, which will then load the U-Boot 251 binary to keep going on. 252 253config TPL_ROCKCHIP_BACK_TO_BROM 254 bool "TPL returns to bootrom" 255 default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328 256 select ROCKCHIP_BROM_HELPER 257 depends on TPL 258 help 259 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 260 SPL will return to the boot rom, which will then load the U-Boot 261 binary to keep going on. 262 263config ROCKCHIP_BOOT_MODE_REG 264 hex "Rockchip boot mode flag register address" 265 default 0xff010200 if ROCKCHIP_PX30 266 default 0x200081c8 if ROCKCHIP_RK3036 267 default 0x100a0038 if ROCKCHIP_RK3128 268 default 0x20004040 if ROCKCHIP_RK3188 269 default 0x110005c8 if ROCKCHIP_RK322X 270 default 0xff730094 if ROCKCHIP_RK3288 271 default 0xff000500 if ROCKCHIP_RK3308 272 default 0xff1005c8 if ROCKCHIP_RK3328 273 default 0xff738200 if ROCKCHIP_RK3368 274 default 0xff320300 if ROCKCHIP_RK3399 275 default 0x10300580 if ROCKCHIP_RV1108 276 default 0 277 help 278 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) 279 according to the value from this register. 280 281config ROCKCHIP_STIMER_BASE 282 hex "Rockchip Secure timer base address" 283 default 0xff220020 if ROCKCHIP_PX30 284 default 0x200440a0 if ROCKCHIP_RK3036 285 default 0x2000e000 if ROCKCHIP_RK3066 286 default 0x20018020 if ROCKCHIP_RK3126 287 default 0x200440a0 if ROCKCHIP_RK3128 288 default 0x2000e000 if ROCKCHIP_RK3188 289 default 0x110d0020 if ROCKCHIP_RK322X 290 default 0xff810020 if ROCKCHIP_RK3288 291 default 0xff1d0020 if ROCKCHIP_RK3328 292 default 0xff830020 if ROCKCHIP_RK3368 293 default 0xff8680a0 if ROCKCHIP_RK3399 294 default 0x10350020 if ROCKCHIP_RV1108 295 default 0 296 help 297 The secure timer inited in SPL/TPL in secure word, ARM generic timer 298 works after this timer work. 299 300config ROCKCHIP_IRAM_START_ADDR 301 hex "Rockchip Secure timer base address" 302 default 0xff0e0000 if ROCKCHIP_PX30 303 default 0x10080000 if ROCKCHIP_RK3036 304 default 0x10080000 if ROCKCHIP_RK3128 305 default 0x10080000 if ROCKCHIP_RK3188 306 default 0x10080000 if ROCKCHIP_RK322X 307 default 0xff700000 if ROCKCHIP_RK3288 308 default 0xff091000 if ROCKCHIP_RK3328 309 default 0xff8c0000 if ROCKCHIP_RK3368 310 default 0xff8c0000 if ROCKCHIP_RK3399 311 default 0x10080000 if ROCKCHIP_RV1108 312 default 0 313 help 314 The IRAM start addr is to locate variant of the boot device from 315 bootrom. 316 317config ROCKCHIP_SPL_RESERVE_IRAM 318 hex "Size of IRAM reserved in SPL" 319 default 0 320 help 321 SPL may need reserve memory for firmware loaded by SPL, whose load 322 address is in IRAM and may overlay with SPL text area if not 323 reserved. 324 325config ROCKCHIP_BROM_HELPER 326 bool 327 328config SPL_ROCKCHIP_EARLYRETURN_TO_BROM 329 bool "SPL requires early-return (for RK3188-style BROM) to BROM" 330 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK 331 help 332 Some Rockchip BROM variants (e.g. on the RK3188) load the 333 first stage in segments and enter multiple times. E.g. on 334 the RK3188, the first 1KB of the first stage are loaded 335 first and entered; after returning to the BROM, the 336 remainder of the first stage is loaded, but the BROM 337 re-enters at the same address/to the same code as previously. 338 339 This enables support code in the BOOT0 hook for the SPL stage 340 to allow multiple entries. 341 342config TPL_ROCKCHIP_EARLYRETURN_TO_BROM 343 bool "TPL requires early-return (for RK3188-style BROM) to BROM" 344 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK 345 help 346 Some Rockchip BROM variants (e.g. on the RK3188) load the 347 first stage in segments and enter multiple times. E.g. on 348 the RK3188, the first 1KB of the first stage are loaded 349 first and entered; after returning to the BROM, the 350 remainder of the first stage is loaded, but the BROM 351 re-enters at the same address/to the same code as previously. 352 353 This enables support code in the BOOT0 hook for the TPL stage 354 to allow multiple entries. 355 356config SPL_MMC_SUPPORT 357 default y if !SPL_ROCKCHIP_BACK_TO_BROM 358 359config RKIMG_BOOTLOADER 360 bool "Support for Rockchip Image Bootloader boot flow" 361 default n 362 help 363 Rockchip use this to boot Android during development cycle and for 364 other OS, typical content kernel.img with zImage/Image, boot.img and 365 recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img 366 with dtb and uboot/kernel logo bmp, vendor storage for custom info 367 like SN and MAC address. 368 369config ROCKCHIP_RESOURCE_IMAGE 370 bool "Enable support for rockchip resource image" 371 depends on RKIMG_BOOTLOADER 372 default y 373 help 374 This enables support to get dtb or logo files from 375 rockchip resource image format partition. 376 377config ROCKCHIP_VENDOR_PARTITION 378 bool "Rockchip vendor storage partition support" 379 depends on RKIMG_BOOTLOADER 380 help 381 This enable support to read/write vendor configuration data from/to 382 this partition. 383 384config USING_KERNEL_DTB 385 bool "Using dtb from Kernel/resource for U-Boot" 386 depends on RKIMG_BOOTLOADER && OF_LIVE 387 default y 388 help 389 This enable support to read dtb from resource and use it for U-Boot, 390 the uart and emmc will still using U-Boot dtb, but other devices like 391 regulator/pmic, display, usb will use dts node from kernel. 392 393config ROCKCHIP_CRC 394 bool "Rockchip CRC verify images" 395 help 396 This enable support Rockchip CRC verify images. It takes a lot of time, 397 so it is better only used for debug. 398 399config ROCKCHIP_SMCCC 400 bool "Rockchip SMCCC" 401 default y if ARM_SMCCC 402 help 403 This enable support for Rockchip SMC calls 404 405config GICV2 406 bool "ARM GICv2" 407 408config GICV3 409 bool "ARM GICv3" 410 411source "arch/arm/mach-rockchip/px30/Kconfig" 412source "arch/arm/mach-rockchip/rk3036/Kconfig" 413source "arch/arm/mach-rockchip/rk3066/Kconfig" 414source "arch/arm/mach-rockchip/rk3128/Kconfig" 415source "arch/arm/mach-rockchip/rk3188/Kconfig" 416source "arch/arm/mach-rockchip/rk322x/Kconfig" 417source "arch/arm/mach-rockchip/rk3288/Kconfig" 418source "arch/arm/mach-rockchip/rk3308/Kconfig" 419source "arch/arm/mach-rockchip/rk3328/Kconfig" 420source "arch/arm/mach-rockchip/rk3368/Kconfig" 421source "arch/arm/mach-rockchip/rk3399/Kconfig" 422source "arch/arm/mach-rockchip/rv1108/Kconfig" 423endif 424