1if ARCH_ROCKCHIP 2 3config ROCKCHIP_PX30 4 bool "Support Rockchip PX30" 5 select ARM64 if !ARM64_BOOT_AARCH32 6 select GICV2 7 select ARM_SMCCC 8 select SUPPORT_SPL 9 select SUPPORT_TPL 10 select SPL if !ARM64_BOOT_AARCH32 11 select TPL if !ARM64_BOOT_AARCH32 12 select TPL_TINY_FRAMEWORK if TPL 13 14 imply SPL_SEPARATE_BSS 15 imply SPL_SERIAL_SUPPORT 16 imply TPL_SERIAL_SUPPORT 17 help 18 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 19 including NEON and GPU, Mali-400 graphics, several DDR3 options 20 and video codec support. Peripherals include Gigabit Ethernet, 21 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 22 23if ROCKCHIP_PX30 24 25config TPL_LDSCRIPT 26 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 27 28config TPL_TEXT_BASE 29 default 0xff0e1000 30 31config TPL_MAX_SIZE 32 default 10240 33 34config ROCKCHIP_RK3326 35 bool "Support Rockchip RK3326 " 36 help 37 RK3326 can use most code from PX30, but at some situations we have 38 to distinguish between RK3326 and PX30, so this macro gives help. 39 It is usually selected in rk3326 board defconfig. 40endif 41 42config ROCKCHIP_RK3036 43 bool "Support Rockchip RK3036" 44 select CPU_V7 45 select SUPPORT_SPL 46 select SUPPORT_TPL 47 select SPL 48 select TPL 49 select BOARD_LATE_INIT 50 select ROCKCHIP_BROM_HELPER 51 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 52 select TPL_NEEDS_SEPARATE_STACK if TPL 53 select ARM_SMCCC 54 help 55 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 56 including NEON and GPU, Mali-400 graphics, several DDR3 options 57 and video codec support. Peripherals include Gigabit Ethernet, 58 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 59 60config ROCKCHIP_RK3128 61 bool "Support Rockchip RK3128" 62 select CPU_V7 63 select GICV2 64 select ARM_SMCCC 65 help 66 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 67 including NEON and GPU, Mali-400 graphics, several DDR3 options 68 and video codec support. Peripherals include Gigabit Ethernet, 69 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 70 71if ROCKCHIP_RK3128 72 73config ROCKCHIP_RK3126 74 bool "Support Rockchip RK3126 " 75 help 76 RK3126 can use most code from RK3128, but at some situations we have 77 to distinguish between RK3126 and RK3128, so this macro gives help. 78 It is usually selected in rk3126 board defconfig. 79 80config ROCKCHIP_PX3SE 81 bool "Support Rockchip PX3SE" 82 help 83 PX3SE is a variant of RK3128, it shares codes with RK3128, but we still 84 need this macro to distinguish PX3SE and RK3128. 85endif 86 87config ROCKCHIP_RK3066 88 bool "Support Rockchip RK3066" 89 select CPU_V7 90 select SUPPORT_SPL 91 select SUPPORT_TPL 92 select SPL 93 select TPL 94 select BOARD_LATE_INIT 95 select ROCKCHIP_BROM_HELPER 96 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 97 help 98 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 99 including NEON and GPU, Mali-400 graphics, several DDR3 options 100 and video codec support. Peripherals include ethernet, USB2 host 101 and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 102 103config ROCKCHIP_RK3188 104 bool "Support Rockchip RK3188" 105 select CPU_V7 106 select SPL_BOARD_INIT if SPL 107 select SUPPORT_SPL 108 select SPL 109 select SPL_CLK 110 select SPL_REGMAP 111 select SPL_SYSCON 112 select SPL_RAM 113 select SPL_DRIVERS_MISC_SUPPORT 114 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 115 select BOARD_LATE_INIT 116 select ROCKCHIP_BROM_HELPER 117 help 118 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 119 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two 120 video interfaces, several memory options and video codec support. 121 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, 122 UART, SPI, I2C and PWMs. 123 124config ROCKCHIP_RK322X 125 bool "Support Rockchip RK3228/RK3229" 126 select CPU_V7 127 select SUPPORT_SPL 128 select SUPPORT_TPL 129 select SPL 130 select TPL 131 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 132 select TPL_NEEDS_SEPARATE_STACK if TPL 133 select SPL_DRIVERS_MISC_SUPPORT 134 imply SPL_SERIAL_SUPPORT 135 imply TPL_SERIAL_SUPPORT 136 select ROCKCHIP_BROM_HELPER 137 select TPL_LIBCOMMON_SUPPORT 138 select TPL_LIBGENERIC_SUPPORT 139 select GICV2 140 select ARM_SMCCC 141 help 142 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 143 including NEON and GPU, Mali-400 graphics, several DDR3 options 144 and video codec support. Peripherals include Gigabit Ethernet, 145 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 146 147if ROCKCHIP_RK322X 148 149config ROCKCHIP_RK3128X 150 bool "Support Rockchip RK3128X " 151 help 152 RK3128X can use most code from RK322X, but at some situations we have 153 to distinguish between RK3128X and RK322X, so this macro gives help. 154 It is usually selected in RK3128X board defconfig. 155endif 156 157config ROCKCHIP_RK3288 158 bool "Support Rockchip RK3288" 159 select CPU_V7 160 select SPL_BOARD_INIT if SPL 161 select SUPPORT_SPL 162 select SUPPORT_TPL 163 select SPL 164 select TPL 165 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 166 select TPL_NEEDS_SEPARATE_STACK if TPL 167 imply TPL_SERIAL_SUPPORT 168 select GICV2 169 select ARM_SMCCC 170 select SPL_OPTEE 171 select FIT 172 select SPL_LOAD_FIT 173 select TPL_LIBCOMMON_SUPPORT 174 select TPL_LIBGENERIC_SUPPORT 175 select TPL_SYS_MALLOC_SIMPLE 176 select TPL_BOOTROM_SUPPORT 177 select TPL_DRIVERS_MISC_SUPPORT 178 select TPL_OF_CONTROL 179 select TPL_DM 180 select TPL_REGMAP 181 select TPL_SYSCON 182 select TPL_RAM 183 select TPL_CLK 184 select TPL_TINY_MEMSET 185 help 186 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 187 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 188 video interfaces supporting HDMI and eDP, several DDR3 options 189 and video codec support. Peripherals include Gigabit Ethernet, 190 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 191 192if ROCKCHIP_RK3288 193config SPL_FIT_GENERATOR 194 default "arch/arm/mach-rockchip/make_fit_optee.sh" 195 196config TPL_LDSCRIPT 197 default "arch/arm/mach-rockchip/u-boot-tpl.lds" 198 199config TPL_TEXT_BASE 200 default 0xff704000 201 202config TPL_MAX_SIZE 203 default 32768 204 205config TPL_STACK 206 default 0xff718000 207 208endif 209 210config ROCKCHIP_RK3308 211 bool "Support Rockchip RK3308" 212 select ARM64 if !ARM64_BOOT_AARCH32 213 select ARM_SMCCC 214 select GICV2 215 select SUPPORT_SPL if !ARM64_BOOT_AARCH32 216 select SUPPORT_TPL if !ARM64_BOOT_AARCH32 217 select SPL if !ARM64_BOOT_AARCH32 218 select TPL if !ARM64_BOOT_AARCH32 219 imply SPL_CLK 220 imply SPL_REGMAP 221 imply SPL_SYSCON 222 imply SPL_RAM 223 imply SPL_SERIAL_SUPPORT 224 imply TPL_SERIAL_SUPPORT 225 imply SPL_SEPARATE_BSS 226 help 227 The Rockchip RK3308 is a ARM-based Soc which embeded with quad 228 Cortex-A35 and highly integrated audio interfaces. 229 230config ROCKCHIP_RK3328 231 bool "Support Rockchip RK3328" 232 select ARM64 233 select GICV2 234 select SUPPORT_SPL 235 select SUPPORT_TPL 236 select SPL 237 select TPL 238 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 239 select TPL_NEEDS_SEPARATE_STACK if TPL 240 imply SPL_SERIAL_SUPPORT 241 imply TPL_SERIAL_SUPPORT 242 imply SPL_SEPARATE_BSS 243 select ARM_SMCCC 244 help 245 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. 246 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 247 video interfaces supporting HDMI and eDP, several DDR3 options 248 and video codec support. Peripherals include Gigabit Ethernet, 249 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 250 251if ROCKCHIP_RK3328 252 253config TPL_LDSCRIPT 254 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 255 256config TPL_TEXT_BASE 257 default 0xff091000 258 259config TPL_MAX_SIZE 260 default 28672 261 262config TPL_STACK 263 default 0xff098000 264 265endif 266 267config ROCKCHIP_RK3368 268 bool "Support Rockchip RK3368" 269 select ARM64 270 select SUPPORT_SPL 271 select SUPPORT_TPL 272 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 273 select TPL_NEEDS_SEPARATE_STACK if TPL 274 imply SPL_SEPARATE_BSS 275 imply SPL_SERIAL_SUPPORT 276 imply TPL_SERIAL_SUPPORT 277 select GICV2 278 select ARM_SMCCC 279 help 280 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised 281 into a big and little cluster with 4 cores each) Cortex-A53 including 282 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 283 (for the little cluster), PowerVR G6110 based graphics, one video 284 output processor supporting LVDS/HDMI/eDP, several DDR3 options and 285 video codec support. 286 287 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, 288 I2S, UARTs, SPI, I2C and PWMs. 289 290if ROCKCHIP_RK3368 291 292config ROCKCHIP_PX5 293 bool "Support Rockchip PX5" 294 help 295 PX5 is a variant of RK3368, it shares codes with RK3368, but we still 296 need this macro to distinguish PX5 and RK3368. 297 298config TPL_LDSCRIPT 299 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" 300 301config TPL_TEXT_BASE 302 default 0xff8c1000 303 304config TPL_MAX_SIZE 305 default 28672 306 307config TPL_STACK 308 default 0xff8cffff 309 310endif 311 312config ROCKCHIP_RK3399 313 bool "Support Rockchip RK3399" 314 select ARM64 315 select SUPPORT_SPL 316 select SUPPORT_TPL 317 select SPL 318 select TPL 319 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 320 select TPL_NEEDS_SEPARATE_STACK if TPL 321 imply TPL_SERIAL_SUPPORT 322 select SPL_SEPARATE_BSS 323 select SPL_SERIAL_SUPPORT 324 select SPL_DRIVERS_MISC_SUPPORT 325 select GICV3 326 select BOARD_LATE_INIT 327 select ROCKCHIP_BROM_HELPER 328 select ARM_SMCCC 329 select TPL_LIBCOMMON_SUPPORT 330 select TPL_LIBGENERIC_SUPPORT 331 select TPL_SYS_MALLOC_SIMPLE 332 select TPL_BOOTROM_SUPPORT 333 select TPL_DRIVERS_MISC_SUPPORT 334 select TPL_OF_CONTROL 335 select TPL_DM 336 select TPL_REGMAP 337 select TPL_SYSCON 338 select TPL_RAM 339 select TPL_CLK 340 select TPL_TINY_MEMSET 341 help 342 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 343 and quad-core Cortex-A53. 344 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 345 video interfaces supporting HDMI and eDP, several DDR3 options 346 and video codec support. Peripherals include Gigabit Ethernet, 347 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 348 349if ROCKCHIP_RK3399 350 351config ROCKCHIP_RK3399PRO 352 bool "Support Rockchip RK3399Pro" 353 354config TPL_LDSCRIPT 355 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 356 357config TPL_TEXT_BASE 358 default 0xff8c2000 359 360config TPL_MAX_SIZE 361 default 188416 362 363config TPL_STACK 364 default 0xff8effff 365 366endif 367 368config ROCKCHIP_RK1808 369 bool "Support Rockchip RK1808" 370 select ARM64 371 select ARM_SMCCC 372 select GICV3 if !COPROCESSOR_RK1808 373 select SUPPORT_SPL if !COPROCESSOR_RK1808 374 select SUPPORT_TPL if !COPROCESSOR_RK1808 375 help 376 The Rockchip RK1808 is a ARM-based Soc which embedded with dual 377 Cortex-A35. 378 379if ROCKCHIP_RK1808 380 381config ROCKCHIP_RK1806 382 bool "Support Rockchip RK1806" 383 help 384 The Rockchip RK1806 is a ARM-based Soc which embedded with dual 385 Cortex-A35. 386 387config COPROCESSOR_RK1808 388 bool "RK1808 coprocessor" 389 help 390 This indicates the RK1808 is working as a coprocessor for another 391 more powerful SoC. 392 393endif 394 395config ROCKCHIP_RV1108 396 bool "Support Rockchip RV1108" 397 select CPU_V7 398 select SUPPORT_SPL 399 select SUPPORT_TPL 400 select SPL 401 select TPL 402 select BOARD_LATE_INIT 403 help 404 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 405 and a DSP. 406 407if ROCKCHIP_RV1108 408 409config TPL_LDSCRIPT 410 default "arch/arm/mach-rockchip/u-boot-tpl.lds" 411 412config TPL_TEXT_BASE 413 default 0x10080800 414 415config TPL_MAX_SIZE 416 default 6144 417 418config TPL_STACK 419 default 0x10082000 420 421endif 422 423config ROCKCHIP_RV1126 424 bool "Support Rockchip RV1126" 425 select CPU_V7 426 select BOARD_LATE_INIT 427 select SUPPORT_SPL 428 select SPL 429 help 430 The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7 431 and a risc-v core. 432 433config SPL_ROCKCHIP_BACK_TO_BROM 434 bool "SPL returns to bootrom" 435 default y if ROCKCHIP_RK3036 436 select ROCKCHIP_BROM_HELPER 437 depends on SPL 438 help 439 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 440 SPL will return to the boot rom, which will then load the U-Boot 441 binary to keep going on. 442 443config TPL_ROCKCHIP_BACK_TO_BROM 444 bool "TPL returns to bootrom" 445 default y 446 select ROCKCHIP_BROM_HELPER 447 depends on TPL 448 help 449 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 450 SPL will return to the boot rom, which will then load the U-Boot 451 binary to keep going on. 452 453config ARM64_BOOT_AARCH32 454 bool "Support Boot an ARM64 on AArch32 execution state" 455 select CPU_V7 456 default n 457 help 458 If you want to boot an ARM64 processor on 32-bit mode, say y here. 459 460config ROCKCHIP_BOOT_MODE_REG 461 hex "Rockchip boot mode flag register address" 462 default 0xff010200 if ROCKCHIP_PX30 463 default 0x200081c8 if ROCKCHIP_RK3036 464 default 0x100a0038 if ROCKCHIP_RK3128 465 default 0x20004040 if ROCKCHIP_RK3188 466 default 0x110005c8 if ROCKCHIP_RK322X 467 default 0xff730094 if ROCKCHIP_RK3288 468 default 0xff000500 if ROCKCHIP_RK3308 469 default 0xff1005c8 if ROCKCHIP_RK3328 470 default 0xff738200 if ROCKCHIP_RK3368 471 default 0xff320300 if ROCKCHIP_RK3399 472 default 0xfe020200 if ROCKCHIP_RK1808 473 default 0x10300580 if ROCKCHIP_RV1108 474 default 0xfe020200 if ROCKCHIP_RV1126 475 default 0 476 help 477 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) 478 according to the value from this register. 479 480config ROCKCHIP_STIMER_BASE 481 hex "Rockchip Secure timer base address" 482 default 0xff220020 if ROCKCHIP_PX30 483 default 0x200440a0 if ROCKCHIP_RK3036 484 default 0x2000e000 if ROCKCHIP_RK3066 485 default 0x20018020 if ROCKCHIP_RK3126 486 default 0x200440a0 if ROCKCHIP_RK3128 487 default 0x2000e000 if ROCKCHIP_RK3188 488 default 0x110d0020 if ROCKCHIP_RK322X 489 default 0xff810020 if ROCKCHIP_RK3288 490 default 0xff1d0020 if ROCKCHIP_RK3328 491 default 0xff830020 if ROCKCHIP_RK3368 492 default 0xff8680a0 if ROCKCHIP_RK3399 493 default 0x10350020 if ROCKCHIP_RV1108 494 default 0xff670020 if ROCKCHIP_RV1126 495 default 0 496 help 497 The secure timer inited in SPL/TPL in secure word, ARM generic timer 498 works after this timer work. 499 500config ROCKCHIP_IRAM_START_ADDR 501 hex "Rockchip Secure timer base address" 502 default 0xff0e0000 if ROCKCHIP_PX30 503 default 0x10080000 if ROCKCHIP_RK3036 504 default 0x10080000 if ROCKCHIP_RK3128 505 default 0x10080000 if ROCKCHIP_RK3188 506 default 0x10080000 if ROCKCHIP_RK322X 507 default 0xff700000 if ROCKCHIP_RK3288 508 default 0xfff80000 if ROCKCHIP_RK3308 509 default 0xff091000 if ROCKCHIP_RK3328 510 default 0xff8c0000 if ROCKCHIP_RK3368 511 default 0xff8c0000 if ROCKCHIP_RK3399 512 default 0x10080000 if ROCKCHIP_RV1108 513 default 0xff700000 if ROCKCHIP_RV1126 514 default 0 515 help 516 The IRAM start addr is to locate variant of the boot device from 517 bootrom. 518 519config ROCKCHIP_SPL_RESERVE_IRAM 520 hex "Size of IRAM reserved in SPL" 521 default 0 522 help 523 SPL may need reserve memory for firmware loaded by SPL, whose load 524 address is in IRAM and may overlay with SPL text area if not 525 reserved. 526 527config ROCKCHIP_BROM_HELPER 528 bool 529 530config SPL_ROCKCHIP_EARLYRETURN_TO_BROM 531 bool "SPL requires early-return (for RK3188-style BROM) to BROM" 532 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK 533 help 534 Some Rockchip BROM variants (e.g. on the RK3188) load the 535 first stage in segments and enter multiple times. E.g. on 536 the RK3188, the first 1KB of the first stage are loaded 537 first and entered; after returning to the BROM, the 538 remainder of the first stage is loaded, but the BROM 539 re-enters at the same address/to the same code as previously. 540 541 This enables support code in the BOOT0 hook for the SPL stage 542 to allow multiple entries. 543 544config TPL_ROCKCHIP_EARLYRETURN_TO_BROM 545 bool "TPL requires early-return (for RK3188-style BROM) to BROM" 546 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK 547 help 548 Some Rockchip BROM variants (e.g. on the RK3188) load the 549 first stage in segments and enter multiple times. E.g. on 550 the RK3188, the first 1KB of the first stage are loaded 551 first and entered; after returning to the BROM, the 552 remainder of the first stage is loaded, but the BROM 553 re-enters at the same address/to the same code as previously. 554 555 This enables support code in the BOOT0 hook for the TPL stage 556 to allow multiple entries. 557 558config SPL_MMC_SUPPORT 559 default y if !SPL_ROCKCHIP_BACK_TO_BROM 560 561config RKIMG_BOOTLOADER 562 bool "Support for Rockchip platform features" 563 default y 564 help 565 Actually this is a compatible configure for code compilation. 566 567config RKIMG_ANDROID_BOOTMODE_LEGACY 568 bool "Support set androidboot.mode with legacy rule" 569 depends on RKIMG_BOOTLOADER 570 default n 571 help 572 Rockchip set "androidboot.mode=" as "charger" or boot media for android, 573 which is a rockchip private solution(SDK < 8.1) and deprecated. 574 575config ROCKCHIP_RESOURCE_IMAGE 576 bool "Enable support for rockchip resource image" 577 depends on RKIMG_BOOTLOADER 578 default y 579 help 580 This enables support to get dtb or logo files from 581 rockchip resource image format partition. 582 583config ROCKCHIP_DTB_VERIFY 584 bool "Enable hash verify for DTB in the resource file" 585 depends on ROCKCHIP_RESOURCE_IMAGE 586 select SHA1 if !DM_CRYPTO 587 select SHA256 if !DM_CRYPTO 588 default y 589 help 590 This enables the hash verify for DTB in the resource file, it means we 591 always read DTB from second position even the DTB position is present. 592 593config ROCKCHIP_USB_BOOT 594 bool "Enable support for rockchip U-disk boot" 595 depends on USB 596 default n 597 help 598 This enables support for rockchip U-disk boot. 599 600config ROCKCHIP_EARLY_DISTRO_DTB 601 bool "Enable support for distro dtb early" 602 depends on DISTRO_DEFAULTS && USING_KERNEL_DTB && CMD_FS_GENERIC 603 default n 604 help 605 This enables loading dtb from distro bootable partition when there 606 is no valid dtb in android boot.img and rockchip resource.img. 607 608if ROCKCHIP_EARLY_DISTRO_DTB 609 610config ROCKCHIP_EARLY_DISTRO_DTB_PATH 611 string "/rk-kernel.dtb" 612 help 613 "DTB file path in the bootable partition image" 614endif 615 616config ROCKCHIP_HWID_DTB 617 bool "Enable support for selecting DTB by hardware id" 618 depends on ROCKCHIP_RESOURCE_IMAGE 619 default n 620 help 621 This enables select the expected DTB from sets by hardware id, 622 i.e. GPIO or ADC value. 623 624config ROCKCHIP_VENDOR_PARTITION 625 bool "Rockchip vendor storage partition support" 626 depends on RKIMG_BOOTLOADER 627 help 628 This enable support to read/write vendor configuration data from/to 629 this partition. 630 631config USING_KERNEL_DTB 632 bool "Using dtb from Kernel/resource for U-Boot" 633 depends on RKIMG_BOOTLOADER && OF_LIVE 634 default y 635 help 636 This enable support to read dtb from resource and use it for U-Boot, 637 the uart and emmc will still using U-Boot dtb, but other devices like 638 regulator/pmic, display, usb will use dts node from kernel. 639 640config ROCKCHIP_CRC 641 bool "Rockchip CRC verify images" 642 help 643 This enable support Rockchip CRC verify images. It takes a lot of time, 644 so it is better only used for debug. 645 646config ROCKCHIP_SMCCC 647 bool "Rockchip SMCCC" 648 default y if ARM_SMCCC 649 help 650 This enable support for Rockchip SMC calls 651 652config ROCKCHIP_DEBUGGER 653 bool "Rockchip debugger" 654 depends on IRQ 655 help 656 This enable support for Rockchip debugger. Now we install a timer interrupt 657 and dump pt_regs when the timeout event trigger. This helps us to know cpu 658 state when system hang. 659 660config ROCKCHIP_CRASH_DUMP 661 bool "Rockchip crash dump registers" 662 help 663 This enable dump registers when system crash, the registers you would like 664 to dump can be added in show_regs(). 665 666config ROCKCHIP_PRELOADER_ATAGS 667 bool "Rockchip pre-loader atags" 668 default y if ARCH_ROCKCHIP 669 help 670 This enable support Rockchip atags among pre-loaders, i.e. ddr, miniloader, ATF, 671 tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders 672 and finally ends with U-Boot. 673 674config ROCKCHIP_PRELOADER_SERIAL 675 bool "Rockchip pre-loader serial" 676 default y if ROCKCHIP_PRELOADER_ATAGS 677 help 678 This enable U-Boot using pre-loader atags serial configure to initialize console. 679 It denpends on serial aliases to find pre-loader serial number. 680 681config GICV2 682 bool "ARM GICv2" 683 684config GICV3 685 bool "ARM GICv3" 686 687source "arch/arm/mach-rockchip/px30/Kconfig" 688source "arch/arm/mach-rockchip/rk3036/Kconfig" 689source "arch/arm/mach-rockchip/rk3066/Kconfig" 690source "arch/arm/mach-rockchip/rk3128/Kconfig" 691source "arch/arm/mach-rockchip/rk3188/Kconfig" 692source "arch/arm/mach-rockchip/rk322x/Kconfig" 693source "arch/arm/mach-rockchip/rk3288/Kconfig" 694source "arch/arm/mach-rockchip/rk3308/Kconfig" 695source "arch/arm/mach-rockchip/rk3328/Kconfig" 696source "arch/arm/mach-rockchip/rk3368/Kconfig" 697source "arch/arm/mach-rockchip/rk3399/Kconfig" 698source "arch/arm/mach-rockchip/rk1808/Kconfig" 699source "arch/arm/mach-rockchip/rv1108/Kconfig" 700source "arch/arm/mach-rockchip/rv1126/Kconfig" 701 702endif 703