1if ARCH_ROCKCHIP 2 3config ROCKCHIP_RK3036 4 bool "Support Rockchip RK3036" 5 select CPU_V7 6 select SUPPORT_SPL 7 select SPL 8 help 9 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 10 including NEON and GPU, Mali-400 graphics, several DDR3 options 11 and video codec support. Peripherals include Gigabit Ethernet, 12 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 13 14config ROCKCHIP_RK3128 15 bool "Support Rockchip RK3128" 16 select CPU_V7 17 select GICV2 18 select ARM_SMCCC 19 help 20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 21 including NEON and GPU, Mali-400 graphics, several DDR3 options 22 and video codec support. Peripherals include Gigabit Ethernet, 23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 24 25if ROCKCHIP_RK3128 26 27config ROCKCHIP_RK3126 28 bool "Support Rockchip RK3126 " 29 help 30 RK3126 can use most code from RK3128, but at some situations we have 31 to distinguish between RK3126 and RK3128, so this macro gives help. 32 It is usually selected in rk3126 board defconfig. 33endif 34 35config ROCKCHIP_RK3066 36 bool "Support Rockchip RK3066" 37 select CPU_V7 38 select SUPPORT_SPL 39 select SUPPORT_TPL 40 select SPL 41 select TPL 42 select BOARD_LATE_INIT 43 select ROCKCHIP_BROM_HELPER 44 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 45 help 46 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 47 including NEON and GPU, Mali-400 graphics, several DDR3 options 48 and video codec support. Peripherals include ethernet, USB2 host 49 and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 50 51config ROCKCHIP_RK3188 52 bool "Support Rockchip RK3188" 53 select CPU_V7 54 select SPL_BOARD_INIT if SPL 55 select SUPPORT_SPL 56 select SPL 57 select SPL_CLK 58 select SPL_REGMAP 59 select SPL_SYSCON 60 select SPL_RAM 61 select SPL_DRIVERS_MISC_SUPPORT 62 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 63 select BOARD_LATE_INIT 64 select ROCKCHIP_BROM_HELPER 65 help 66 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 67 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two 68 video interfaces, several memory options and video codec support. 69 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, 70 UART, SPI, I2C and PWMs. 71 72config ROCKCHIP_RK322X 73 bool "Support Rockchip RK3228/RK3229" 74 select CPU_V7 75 select SUPPORT_SPL 76 select SUPPORT_TPL 77 select SPL 78 select TPL 79 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 80 select TPL_NEEDS_SEPARATE_STACK if TPL 81 select SPL_DRIVERS_MISC_SUPPORT 82 imply SPL_SERIAL_SUPPORT 83 imply TPL_SERIAL_SUPPORT 84 select ROCKCHIP_BROM_HELPER 85 select DEBUG_UART_BOARD_INIT 86 select TPL_LIBCOMMON_SUPPORT 87 select TPL_LIBGENERIC_SUPPORT 88 select GICV2 89 help 90 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 91 including NEON and GPU, Mali-400 graphics, several DDR3 options 92 and video codec support. Peripherals include Gigabit Ethernet, 93 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 94 95config ROCKCHIP_RK3288 96 bool "Support Rockchip RK3288" 97 select CPU_V7 98 select SPL_BOARD_INIT if SPL 99 select SUPPORT_SPL 100 select SPL 101 select GICV2 102 help 103 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 104 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 105 video interfaces supporting HDMI and eDP, several DDR3 options 106 and video codec support. Peripherals include Gigabit Ethernet, 107 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 108 109config ROCKCHIP_RK3328 110 bool "Support Rockchip RK3328" 111 select ARM64 112 select GICV2 113 select SUPPORT_SPL 114 select SUPPORT_TPL 115 select SPL 116 select TPL 117 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 118 select TPL_NEEDS_SEPARATE_STACK if TPL 119 imply SPL_SERIAL_SUPPORT 120 imply TPL_SERIAL_SUPPORT 121 imply SPL_SEPARATE_BSS 122 select DEBUG_UART_BOARD_INIT 123 help 124 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. 125 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 126 video interfaces supporting HDMI and eDP, several DDR3 options 127 and video codec support. Peripherals include Gigabit Ethernet, 128 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 129 130if ROCKCHIP_RK3328 131 132config TPL_LDSCRIPT 133 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 134 135config TPL_TEXT_BASE 136 default 0xff091000 137 138config TPL_MAX_SIZE 139 default 28672 140 141config TPL_STACK 142 default 0xff098000 143 144endif 145 146config ROCKCHIP_RK3368 147 bool "Support Rockchip RK3368" 148 select ARM64 149 select SUPPORT_SPL 150 select SUPPORT_TPL 151 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 152 select TPL_NEEDS_SEPARATE_STACK if TPL 153 imply SPL_SEPARATE_BSS 154 imply SPL_SERIAL_SUPPORT 155 imply TPL_SERIAL_SUPPORT 156 select DEBUG_UART_BOARD_INIT 157 select GICV2 158 help 159 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised 160 into a big and little cluster with 4 cores each) Cortex-A53 including 161 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 162 (for the little cluster), PowerVR G6110 based graphics, one video 163 output processor supporting LVDS/HDMI/eDP, several DDR3 options and 164 video codec support. 165 166 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, 167 I2S, UARTs, SPI, I2C and PWMs. 168 169if ROCKCHIP_RK3368 170 171config TPL_LDSCRIPT 172 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" 173 174config TPL_TEXT_BASE 175 default 0xff8c1000 176 177config TPL_MAX_SIZE 178 default 28672 179 180config TPL_STACK 181 default 0xff8cffff 182 183endif 184 185config ROCKCHIP_RK3399 186 bool "Support Rockchip RK3399" 187 select ARM64 188 select SUPPORT_SPL 189 select SPL 190 select SPL_SEPARATE_BSS 191 select SPL_SERIAL_SUPPORT 192 select SPL_DRIVERS_MISC_SUPPORT 193 select DEBUG_UART_BOARD_INIT 194 select GICV3 195 select BOARD_LATE_INIT 196 select ROCKCHIP_BROM_HELPER 197 help 198 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 199 and quad-core Cortex-A53. 200 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 201 video interfaces supporting HDMI and eDP, several DDR3 options 202 and video codec support. Peripherals include Gigabit Ethernet, 203 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 204 205config ROCKCHIP_RV1108 206 bool "Support Rockchip RV1108" 207 select CPU_V7 208 help 209 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 210 and a DSP. 211 212config SPL_ROCKCHIP_BACK_TO_BROM 213 bool "SPL returns to bootrom" 214 default y if ROCKCHIP_RK3036 215 select ROCKCHIP_BROM_HELPER 216 depends on SPL 217 help 218 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 219 SPL will return to the boot rom, which will then load the U-Boot 220 binary to keep going on. 221 222config TPL_ROCKCHIP_BACK_TO_BROM 223 bool "TPL returns to bootrom" 224 default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328 225 select ROCKCHIP_BROM_HELPER 226 depends on TPL 227 help 228 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 229 SPL will return to the boot rom, which will then load the U-Boot 230 binary to keep going on. 231 232config ROCKCHIP_BOOT_MODE_REG 233 hex "Rockchip boot mode flag register address" 234 default 0x200081c8 if ROCKCHIP_RK3036 235 default 0x100a0038 if ROCKCHIP_RK3128 236 default 0x20004040 if ROCKCHIP_RK3188 237 default 0x110005c8 if ROCKCHIP_RK322X 238 default 0xff730094 if ROCKCHIP_RK3288 239 default 0xff1005c8 if ROCKCHIP_RK3328 240 default 0xff738200 if ROCKCHIP_RK3368 241 default 0xff320300 if ROCKCHIP_RK3399 242 default 0x10300580 if ROCKCHIP_RV1108 243 default 0 244 help 245 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) 246 according to the value from this register. 247 248config ROCKCHIP_STIMER_BASE 249 hex "Rockchip Secure timer base address" 250 default 0xff220020 if ROCKCHIP_PX30 251 default 0x200440a0 if ROCKCHIP_RK3036 252 default 0x2000e000 if ROCKCHIP_RK3066 253 default 0x20018020 if ROCKCHIP_RK3126 254 default 0x200440a0 if ROCKCHIP_RK3128 255 default 0x2000e000 if ROCKCHIP_RK3188 256 default 0x110d0020 if ROCKCHIP_RK322X 257 default 0xff810020 if ROCKCHIP_RK3288 258 default 0xff1d0020 if ROCKCHIP_RK3328 259 default 0xff830020 if ROCKCHIP_RK3368 260 default 0xff8680a0 if ROCKCHIP_RK3399 261 default 0x10350020 if ROCKCHIP_RV1108 262 default 0 263 help 264 The secure timer inited in SPL/TPL in secure word, ARM generic timer 265 works after this timer work. 266 267config ROCKCHIP_IRAM_START_ADDR 268 hex "Rockchip Secure timer base address" 269 default 0xff0e0000 if ROCKCHIP_PX30 270 default 0x10080000 if ROCKCHIP_RK3036 271 default 0x10080000 if ROCKCHIP_RK3128 272 default 0x10080000 if ROCKCHIP_RK3188 273 default 0x10080000 if ROCKCHIP_RK322X 274 default 0xff700000 if ROCKCHIP_RK3288 275 default 0xff091000 if ROCKCHIP_RK3328 276 default 0xff8c0000 if ROCKCHIP_RK3368 277 default 0xff8c0000 if ROCKCHIP_RK3399 278 default 0x10080000 if ROCKCHIP_RV1108 279 default 0 280 help 281 The IRAM start addr is to locate variant of the boot device from 282 bootrom. 283 284config ROCKCHIP_SPL_RESERVE_IRAM 285 hex "Size of IRAM reserved in SPL" 286 default 0 287 help 288 SPL may need reserve memory for firmware loaded by SPL, whose load 289 address is in IRAM and may overlay with SPL text area if not 290 reserved. 291 292config ROCKCHIP_BROM_HELPER 293 bool 294 295config SPL_ROCKCHIP_EARLYRETURN_TO_BROM 296 bool "SPL requires early-return (for RK3188-style BROM) to BROM" 297 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK 298 help 299 Some Rockchip BROM variants (e.g. on the RK3188) load the 300 first stage in segments and enter multiple times. E.g. on 301 the RK3188, the first 1KB of the first stage are loaded 302 first and entered; after returning to the BROM, the 303 remainder of the first stage is loaded, but the BROM 304 re-enters at the same address/to the same code as previously. 305 306 This enables support code in the BOOT0 hook for the SPL stage 307 to allow multiple entries. 308 309config TPL_ROCKCHIP_EARLYRETURN_TO_BROM 310 bool "TPL requires early-return (for RK3188-style BROM) to BROM" 311 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK 312 help 313 Some Rockchip BROM variants (e.g. on the RK3188) load the 314 first stage in segments and enter multiple times. E.g. on 315 the RK3188, the first 1KB of the first stage are loaded 316 first and entered; after returning to the BROM, the 317 remainder of the first stage is loaded, but the BROM 318 re-enters at the same address/to the same code as previously. 319 320 This enables support code in the BOOT0 hook for the TPL stage 321 to allow multiple entries. 322 323config SPL_MMC_SUPPORT 324 default y if !SPL_ROCKCHIP_BACK_TO_BROM 325 326config RKIMG_BOOTLOADER 327 bool "Support for Rockchip Image Bootloader boot flow" 328 default n 329 help 330 Rockchip use this to boot Android during development cycle and for 331 other OS, typical content kernel.img with zImage/Image, boot.img and 332 recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img 333 with dtb and uboot/kernel logo bmp, vendor storage for custom info 334 like SN and MAC address. 335 336config ROCKCHIP_RESOURCE_IMAGE 337 bool "Enable support for rockchip resource image" 338 depends on RKIMG_BOOTLOADER 339 default y 340 help 341 This enables support to get dtb or logo files from 342 rockchip resource image format partition. 343 344config ROCKCHIP_VENDOR_PARTITION 345 bool "Rockchip vendor storage partition support" 346 depends on RKIMG_BOOTLOADER 347 help 348 This enable support to read/write vendor configuration data from/to 349 this partition. 350 351config USING_KERNEL_DTB 352 bool "Using dtb from Kernel/resource for U-Boot" 353 depends on RKIMG_BOOTLOADER && OF_LIVE 354 default y 355 help 356 This enable support to read dtb from resource and use it for U-Boot, 357 the uart and emmc will still using U-Boot dtb, but other devices like 358 regulator/pmic, display, usb will use dts node from kernel. 359 360config ROCKCHIP_CRC 361 bool "Rockchip CRC verify images" 362 help 363 This enable support Rockchip CRC verify images. It takes a lot of time, 364 so it is better only used for debug. 365 366config ROCKCHIP_SMCCC 367 bool "Rockchip SMCCC" 368 default y if ARM_SMCCC 369 help 370 This enable support for Rockchip SMC calls 371 372config GICV2 373 bool "ARM GICv2" 374 375config GICV3 376 bool "ARM GICv3" 377 378source "arch/arm/mach-rockchip/rk3036/Kconfig" 379source "arch/arm/mach-rockchip/rk3066/Kconfig" 380source "arch/arm/mach-rockchip/rk3128/Kconfig" 381source "arch/arm/mach-rockchip/rk3188/Kconfig" 382source "arch/arm/mach-rockchip/rk322x/Kconfig" 383source "arch/arm/mach-rockchip/rk3288/Kconfig" 384source "arch/arm/mach-rockchip/rk3328/Kconfig" 385source "arch/arm/mach-rockchip/rk3368/Kconfig" 386source "arch/arm/mach-rockchip/rk3399/Kconfig" 387source "arch/arm/mach-rockchip/rv1108/Kconfig" 388endif 389