xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/Kconfig (revision 5e8564cf419797f9095431e6eb6f0c00dfa423d2)
1if ARCH_ROCKCHIP
2
3config ROCKCHIP_PX30
4	bool "Support Rockchip PX30"
5	select ARM64 if !ARM64_BOOT_AARCH32
6	select GICV2
7	select ARM_SMCCC
8	select SUPPORT_SPL
9	select SUPPORT_TPL
10	select SPL if !ARM64_BOOT_AARCH32
11	select TPL if !ARM64_BOOT_AARCH32
12	select TPL_TINY_FRAMEWORK if TPL
13
14	imply SPL_SERIAL_SUPPORT
15	imply TPL_SERIAL_SUPPORT
16	select DEBUG_UART_BOARD_INIT
17	help
18	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
19	  including NEON and GPU, Mali-400 graphics, several DDR3 options
20	  and video codec support. Peripherals include Gigabit Ethernet,
21	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
22
23if ROCKCHIP_PX30
24
25config TPL_LDSCRIPT
26	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
27
28config TPL_TEXT_BASE
29	default 0xff0e1000
30
31config TPL_MAX_SIZE
32	default 10240
33
34config ROCKCHIP_RK3326
35	bool "Support Rockchip RK3326 "
36	help
37	  RK3326 can use most code from PX30, but at some situations we have
38	  to distinguish between RK3326 and PX30, so this macro gives help.
39	  It is usually selected in rk3326 board defconfig.
40endif
41
42config ROCKCHIP_RK3036
43	bool "Support Rockchip RK3036"
44	select CPU_V7
45	select SUPPORT_SPL
46	select SUPPORT_TPL
47	select SPL
48	select TPL
49	select BOARD_LATE_INIT
50	select ROCKCHIP_BROM_HELPER
51	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
52	select TPL_NEEDS_SEPARATE_STACK if TPL
53	select DEBUG_UART_BOARD_INIT
54	select ARM_SMCCC
55	help
56	  The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
57	  including NEON and GPU, Mali-400 graphics, several DDR3 options
58	  and video codec support. Peripherals include Gigabit Ethernet,
59	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
60
61config ROCKCHIP_RK3128
62	bool "Support Rockchip RK3128"
63	select CPU_V7
64	select GICV2
65	select ARM_SMCCC
66	help
67	  The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
68	  including NEON and GPU, Mali-400 graphics, several DDR3 options
69	  and video codec support. Peripherals include Gigabit Ethernet,
70	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
71
72if ROCKCHIP_RK3128
73
74config ROCKCHIP_RK3126
75	bool "Support Rockchip RK3126 "
76	help
77	  RK3126 can use most code from RK3128, but at some situations we have
78	  to distinguish between RK3126 and RK3128, so this macro gives help.
79	  It is usually selected in rk3126 board defconfig.
80
81config ROCKCHIP_PX3SE
82	bool "Support Rockchip PX3SE"
83	help
84	  PX3SE is a variant of RK3128, it shares codes with RK3128, but we still
85	  need this macro to distinguish PX3SE and RK3128.
86endif
87
88config ROCKCHIP_RK3066
89	bool "Support Rockchip RK3066"
90	select CPU_V7
91	select SUPPORT_SPL
92	select SUPPORT_TPL
93	select SPL
94	select TPL
95	select BOARD_LATE_INIT
96	select ROCKCHIP_BROM_HELPER
97	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
98	help
99	  The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
100	  including NEON and GPU, Mali-400 graphics, several DDR3 options
101	  and video codec support. Peripherals include ethernet, USB2 host
102	  and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
103
104config ROCKCHIP_RK3188
105	bool "Support Rockchip RK3188"
106	select CPU_V7
107	select SPL_BOARD_INIT if SPL
108	select SUPPORT_SPL
109	select SPL
110	select SPL_CLK
111	select SPL_REGMAP
112	select SPL_SYSCON
113	select SPL_RAM
114	select SPL_DRIVERS_MISC_SUPPORT
115	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
116	select BOARD_LATE_INIT
117	select ROCKCHIP_BROM_HELPER
118	help
119	  The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
120	  including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
121	  video interfaces, several memory options and video codec support.
122	  Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
123	  UART, SPI, I2C and PWMs.
124
125config ROCKCHIP_RK322X
126	bool "Support Rockchip RK3228/RK3229"
127	select CPU_V7
128	select SUPPORT_SPL
129	select SUPPORT_TPL
130	select SPL
131	select TPL
132	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
133	select TPL_NEEDS_SEPARATE_STACK if TPL
134	select SPL_DRIVERS_MISC_SUPPORT
135	imply SPL_SERIAL_SUPPORT
136	imply TPL_SERIAL_SUPPORT
137	select ROCKCHIP_BROM_HELPER
138	select DEBUG_UART_BOARD_INIT
139	select TPL_LIBCOMMON_SUPPORT
140	select TPL_LIBGENERIC_SUPPORT
141	select GICV2
142	select ARM_SMCCC
143	help
144	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
145	  including NEON and GPU, Mali-400 graphics, several DDR3 options
146	  and video codec support. Peripherals include Gigabit Ethernet,
147	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
148
149if ROCKCHIP_RK322X
150
151config ROCKCHIP_RK3128X
152	bool "Support Rockchip RK3128X "
153	help
154	  RK3128X can use most code from RK322X, but at some situations we have
155	  to distinguish between RK3128X and RK322X, so this macro gives help.
156	  It is usually selected in RK3128X board defconfig.
157endif
158
159config ROCKCHIP_RK3288
160	bool "Support Rockchip RK3288"
161	select CPU_V7
162	select SPL_BOARD_INIT if SPL
163	select SUPPORT_SPL
164	select SUPPORT_TPL
165	select SPL
166	select TPL
167	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
168	select TPL_NEEDS_SEPARATE_STACK if TPL
169	imply TPL_SERIAL_SUPPORT
170	select GICV2
171	select ARM_SMCCC
172	select SPL_OPTEE
173	select FIT
174	select SPL_LOAD_FIT
175	select TPL_LIBCOMMON_SUPPORT
176	select TPL_LIBGENERIC_SUPPORT
177	select TPL_SYS_MALLOC_SIMPLE
178	select TPL_BOOTROM_SUPPORT
179	select TPL_DRIVERS_MISC_SUPPORT
180	select TPL_OF_CONTROL
181	select TPL_DM
182	select TPL_REGMAP
183	select TPL_SYSCON
184	select TPL_RAM
185	select TPL_CLK
186	select TPL_TINY_MEMSET
187	help
188	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
189	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
190	  video interfaces supporting HDMI and eDP, several DDR3 options
191	  and video codec support. Peripherals include Gigabit Ethernet,
192	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
193
194if ROCKCHIP_RK3288
195config SPL_FIT_GENERATOR
196	default "arch/arm/mach-rockchip/make_fit_optee.sh"
197
198config TPL_LDSCRIPT
199	default "arch/arm/mach-rockchip/u-boot-tpl.lds"
200
201config TPL_TEXT_BASE
202	default 0xff704000
203
204config TPL_MAX_SIZE
205	default 32768
206
207config TPL_STACK
208	default 0xff718000
209
210endif
211
212config ROCKCHIP_RK3308
213	bool "Support Rockchip RK3308"
214	select ARM64 if !ARM64_BOOT_AARCH32
215	select DEBUG_UART_BOARD_INIT
216	select ARM_SMCCC
217	select GICV2
218	select SUPPORT_SPL if !ARM64_BOOT_AARCH32
219	select SUPPORT_TPL if !ARM64_BOOT_AARCH32
220	select SPL if !ARM64_BOOT_AARCH32
221	select TPL if !ARM64_BOOT_AARCH32
222	imply SPL_CLK
223	imply SPL_REGMAP
224	imply SPL_SYSCON
225	imply SPL_RAM
226	imply SPL_SERIAL_SUPPORT
227	imply TPL_SERIAL_SUPPORT
228	imply SPL_SEPARATE_BSS
229	help
230	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
231	  Cortex-A35 and highly integrated audio interfaces.
232
233config ROCKCHIP_RK3328
234	bool "Support Rockchip RK3328"
235	select ARM64
236	select GICV2
237	select SUPPORT_SPL
238	select SUPPORT_TPL
239	select SPL
240	select TPL
241	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
242	select TPL_NEEDS_SEPARATE_STACK if TPL
243	imply SPL_SERIAL_SUPPORT
244	imply TPL_SERIAL_SUPPORT
245	imply SPL_SEPARATE_BSS
246	select DEBUG_UART_BOARD_INIT
247	select ARM_SMCCC
248	help
249	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
250	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
251	  video interfaces supporting HDMI and eDP, several DDR3 options
252	  and video codec support. Peripherals include Gigabit Ethernet,
253	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
254
255if ROCKCHIP_RK3328
256
257config TPL_LDSCRIPT
258	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
259
260config TPL_TEXT_BASE
261        default 0xff091000
262
263config TPL_MAX_SIZE
264        default 28672
265
266config TPL_STACK
267        default 0xff098000
268
269endif
270
271config ROCKCHIP_RK3368
272	bool "Support Rockchip RK3368"
273	select ARM64
274	select SUPPORT_SPL
275	select SUPPORT_TPL
276	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
277	select TPL_NEEDS_SEPARATE_STACK if TPL
278	imply SPL_SEPARATE_BSS
279	imply SPL_SERIAL_SUPPORT
280	imply TPL_SERIAL_SUPPORT
281	select DEBUG_UART_BOARD_INIT
282	select GICV2
283	select ARM_SMCCC
284	help
285	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
286	  into a big and little cluster with 4 cores each) Cortex-A53 including
287	  AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
288	  (for the little cluster), PowerVR G6110 based graphics, one video
289	  output processor supporting LVDS/HDMI/eDP, several DDR3 options and
290	  video codec support.
291
292	  On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
293	  I2S, UARTs, SPI, I2C and PWMs.
294
295if ROCKCHIP_RK3368
296
297config ROCKCHIP_PX5
298	bool "Support Rockchip PX5"
299	help
300	  PX5 is a variant of RK3368, it shares codes with RK3368, but we still
301	  need this macro to distinguish PX5 and RK3368.
302
303config TPL_LDSCRIPT
304	default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
305
306config TPL_TEXT_BASE
307        default 0xff8c1000
308
309config TPL_MAX_SIZE
310        default 28672
311
312config TPL_STACK
313        default 0xff8cffff
314
315endif
316
317config ROCKCHIP_RK3399
318	bool "Support Rockchip RK3399"
319	select ARM64
320	select SUPPORT_SPL
321	select SUPPORT_TPL
322	select SPL
323	select TPL
324	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
325	select TPL_NEEDS_SEPARATE_STACK if TPL
326	imply TPL_SERIAL_SUPPORT
327	select SPL_SEPARATE_BSS
328	select SPL_SERIAL_SUPPORT
329	select SPL_DRIVERS_MISC_SUPPORT
330	select DEBUG_UART_BOARD_INIT
331	select GICV3
332	select BOARD_LATE_INIT
333	select ROCKCHIP_BROM_HELPER
334	select ARM_SMCCC
335	select TPL_LIBCOMMON_SUPPORT
336	select TPL_LIBGENERIC_SUPPORT
337	select TPL_SYS_MALLOC_SIMPLE
338	select TPL_BOOTROM_SUPPORT
339	select TPL_DRIVERS_MISC_SUPPORT
340	select TPL_OF_CONTROL
341	select TPL_DM
342	select TPL_REGMAP
343	select TPL_SYSCON
344	select TPL_RAM
345	select TPL_CLK
346	select TPL_TINY_MEMSET
347	help
348	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
349	  and quad-core Cortex-A53.
350	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
351	  video interfaces supporting HDMI and eDP, several DDR3 options
352	  and video codec support. Peripherals include Gigabit Ethernet,
353	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
354
355if ROCKCHIP_RK3399
356
357config ROCKCHIP_RK3399PRO
358	bool "Support Rockchip RK3399Pro"
359
360config TPL_LDSCRIPT
361	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
362
363config TPL_TEXT_BASE
364        default 0xff8c2000
365
366config TPL_MAX_SIZE
367        default 188416
368
369config TPL_STACK
370        default 0xff8effff
371
372endif
373
374config ROCKCHIP_RK1808
375	bool "Support Rockchip RK1808"
376	select ARM64
377	select ARM_SMCCC
378	select GICV3 if !COPROCESSOR_RK1808
379	select DEBUG_UART_BOARD_INIT
380	help
381	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual
382	  Cortex-A35.
383
384if ROCKCHIP_RK1808
385
386config COPROCESSOR_RK1808
387	bool "RK1808 coprocessor"
388	help
389	  This indicates the RK1808 is working as a coprocessor for another
390	  more powerful SoC.
391
392endif
393
394config ROCKCHIP_RV1108
395	bool "Support Rockchip RV1108"
396	select CPU_V7
397	select SUPPORT_SPL
398	select SUPPORT_TPL
399	select SPL
400	select TPL
401	select BOARD_LATE_INIT
402	help
403	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
404	  and a DSP.
405
406if ROCKCHIP_RV1108
407
408config TPL_LDSCRIPT
409        default "arch/arm/mach-rockchip/u-boot-tpl.lds"
410
411config TPL_TEXT_BASE
412        default 0x10080800
413
414config TPL_MAX_SIZE
415        default 6144
416
417config TPL_STACK
418        default 0x10082000
419
420endif
421
422config SPL_ROCKCHIP_BACK_TO_BROM
423	bool "SPL returns to bootrom"
424	default y if ROCKCHIP_RK3036
425	select ROCKCHIP_BROM_HELPER
426	depends on SPL
427	help
428	  Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
429          SPL will return to the boot rom, which will then load the U-Boot
430          binary to keep going on.
431
432config TPL_ROCKCHIP_BACK_TO_BROM
433	bool "TPL returns to bootrom"
434	default y
435	select ROCKCHIP_BROM_HELPER
436	depends on TPL
437	help
438	  Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
439          SPL will return to the boot rom, which will then load the U-Boot
440          binary to keep going on.
441
442config ARM64_BOOT_AARCH32
443	bool "Support Boot an ARM64 on AArch32 execution state"
444	select CPU_V7
445	default n
446	help
447	  If you want to boot an ARM64 processor on 32-bit mode, say y here.
448
449config ROCKCHIP_BOOT_MODE_REG
450	hex "Rockchip boot mode flag register address"
451	default 0xff010200 if ROCKCHIP_PX30
452	default 0x200081c8 if ROCKCHIP_RK3036
453	default 0x100a0038 if ROCKCHIP_RK3128
454	default 0x20004040 if ROCKCHIP_RK3188
455	default 0x110005c8 if ROCKCHIP_RK322X
456	default 0xff730094 if ROCKCHIP_RK3288
457	default 0xff000500 if ROCKCHIP_RK3308
458	default 0xff1005c8 if ROCKCHIP_RK3328
459	default 0xff738200 if ROCKCHIP_RK3368
460	default 0xff320300 if ROCKCHIP_RK3399
461	default 0xfe020200 if ROCKCHIP_RK1808
462	default 0x10300580 if ROCKCHIP_RV1108
463	default 0
464	help
465	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
466	  according to the value from this register.
467
468config ROCKCHIP_STIMER_BASE
469	hex "Rockchip Secure timer base address"
470	default 0xff220020 if ROCKCHIP_PX30
471	default 0x200440a0 if ROCKCHIP_RK3036
472	default 0x2000e000 if ROCKCHIP_RK3066
473	default 0x20018020 if ROCKCHIP_RK3126
474	default 0x200440a0 if ROCKCHIP_RK3128
475	default 0x2000e000 if ROCKCHIP_RK3188
476	default 0x110d0020 if ROCKCHIP_RK322X
477	default 0xff810020 if ROCKCHIP_RK3288
478	default 0xff1d0020 if ROCKCHIP_RK3328
479	default 0xff830020 if ROCKCHIP_RK3368
480	default 0xff8680a0 if ROCKCHIP_RK3399
481	default 0x10350020 if ROCKCHIP_RV1108
482	default 0
483	help
484	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
485	  works after this timer work.
486
487config ROCKCHIP_IRAM_START_ADDR
488	hex "Rockchip Secure timer base address"
489	default 0xff0e0000 if ROCKCHIP_PX30
490	default 0x10080000 if ROCKCHIP_RK3036
491	default 0x10080000 if ROCKCHIP_RK3128
492	default 0x10080000 if ROCKCHIP_RK3188
493	default 0x10080000 if ROCKCHIP_RK322X
494	default 0xff700000 if ROCKCHIP_RK3288
495	default 0xfff80000 if ROCKCHIP_RK3308
496	default 0xff091000 if ROCKCHIP_RK3328
497	default 0xff8c0000 if ROCKCHIP_RK3368
498	default 0xff8c0000 if ROCKCHIP_RK3399
499	default 0x10080000 if ROCKCHIP_RV1108
500	default 0
501	help
502	  The IRAM start addr is to locate variant of the boot device from
503	  bootrom.
504
505config ROCKCHIP_SPL_RESERVE_IRAM
506	hex "Size of IRAM reserved in SPL"
507	default 0
508	help
509	  SPL may need reserve memory for firmware loaded by SPL, whose load
510	  address is in IRAM and may overlay with SPL text area if not
511	  reserved.
512
513config ROCKCHIP_BROM_HELPER
514	bool
515
516config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
517        bool "SPL requires early-return (for RK3188-style BROM) to BROM"
518	depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
519	help
520	  Some Rockchip BROM variants (e.g. on the RK3188) load the
521	  first stage in segments and enter multiple times. E.g. on
522	  the RK3188, the first 1KB of the first stage are loaded
523	  first and entered; after returning to the BROM, the
524	  remainder of the first stage is loaded, but the BROM
525	  re-enters at the same address/to the same code as previously.
526
527	  This enables support code in the BOOT0 hook for the SPL stage
528	  to allow multiple entries.
529
530config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
531        bool "TPL requires early-return (for RK3188-style BROM) to BROM"
532	depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
533	help
534	  Some Rockchip BROM variants (e.g. on the RK3188) load the
535	  first stage in segments and enter multiple times. E.g. on
536	  the RK3188, the first 1KB of the first stage are loaded
537	  first and entered; after returning to the BROM, the
538	  remainder of the first stage is loaded, but the BROM
539	  re-enters at the same address/to the same code as previously.
540
541	  This enables support code in the BOOT0 hook for the TPL stage
542	  to allow multiple entries.
543
544config SPL_MMC_SUPPORT
545	default y if !SPL_ROCKCHIP_BACK_TO_BROM
546
547config RKIMG_BOOTLOADER
548	bool "Support for Rockchip Image Bootloader boot flow"
549	default n
550	help
551	  Rockchip use this to boot Android during development cycle and for
552	  other OS, typical content kernel.img with zImage/Image, boot.img and
553	  recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img
554	  with dtb and uboot/kernel logo bmp, vendor storage for custom info
555	  like SN and MAC address.
556
557config RKIMG_ANDROID_BOOTMODE_LEGACY
558	bool "Support set androidboot.mode with legacy rule"
559	depends on RKIMG_BOOTLOADER
560	default n
561	help
562	  Rockchip set "androidboot.mode=" as "charger" or boot media for android,
563	  which is a rockchip private solution(SDK < 8.1) and deprecated.
564
565config ROCKCHIP_RESOURCE_IMAGE
566	bool "Enable support for rockchip resource image"
567	depends on RKIMG_BOOTLOADER
568	default y
569	help
570	  This enables support to get dtb or logo files from
571	  rockchip resource image format partition.
572
573config ROCKCHIP_EARLY_DISTRO_DTB
574	bool "Enable support for distro dtb early"
575	depends on DISTRO_DEFAULTS && USING_KERNEL_DTB
576	default n
577	help
578	  This enables loading dtb from distro bootable partition when there
579	  is no valid dtb in android boot.img and rockchip resource.img.
580
581if ROCKCHIP_EARLY_DISTRO_DTB
582
583config ROCKCHIP_EARLY_DISTRO_DTB_PATH
584	string "/rk-kernel.dtb"
585	help
586	  "DTB file path in the bootable partition image"
587endif
588
589config ROCKCHIP_VENDOR_PARTITION
590	bool "Rockchip vendor storage partition support"
591	depends on RKIMG_BOOTLOADER
592	help
593	  This enable support to read/write vendor configuration data from/to
594	  this partition.
595
596config USING_KERNEL_DTB
597	bool "Using dtb from Kernel/resource for U-Boot"
598	depends on RKIMG_BOOTLOADER && OF_LIVE
599	default y
600	help
601	  This enable support to read dtb from resource and use it for U-Boot,
602	  the uart and emmc will still using U-Boot dtb, but other devices like
603	  regulator/pmic, display, usb will use dts node from kernel.
604
605config ROCKCHIP_CRC
606	bool "Rockchip CRC verify images"
607	help
608	  This enable support Rockchip CRC verify images. It takes a lot of time,
609	  so it is better only used for debug.
610
611config ROCKCHIP_SMCCC
612	bool "Rockchip SMCCC"
613	default y if ARM_SMCCC
614	help
615	  This enable support for Rockchip SMC calls
616
617config ROCKCHIP_DEBUGGER
618	bool "Rockchip debugger"
619	depends on IRQ
620	help
621	  This enable support for Rockchip debugger. Now we install a timer interrupt
622	  and dump pt_regs when the timeout event trigger. This helps us to know cpu
623	  state when system hang.
624
625config ROCKCHIP_CRASH_DUMP
626	bool "Rockchip crash dump registers"
627	help
628	  This enable dump registers when system crash, the registers you would like
629	  to dump can be added in show_regs().
630
631config ROCKCHIP_PRELOADER_ATAGS
632	bool "Rockchip pre-loader atags"
633	default y if ARCH_ROCKCHIP
634	help
635	  This enable support Rockchip atags among pre-loaders, i.e. ddr, miniloader, ATF,
636	  tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders
637	  and finally ends with U-Boot.
638
639config ROCKCHIP_PRELOADER_SERIAL
640	bool "Rockchip pre-loader serial"
641	default y if ROCKCHIP_PRELOADER_ATAGS
642	help
643	  This enable U-Boot using pre-loader atags serial configure to initialize console.
644	  It denpends on serial aliases to find pre-loader serial number.
645
646config GICV2
647	bool "ARM GICv2"
648
649config GICV3
650	bool "ARM GICv3"
651
652source "arch/arm/mach-rockchip/px30/Kconfig"
653source "arch/arm/mach-rockchip/rk3036/Kconfig"
654source "arch/arm/mach-rockchip/rk3066/Kconfig"
655source "arch/arm/mach-rockchip/rk3128/Kconfig"
656source "arch/arm/mach-rockchip/rk3188/Kconfig"
657source "arch/arm/mach-rockchip/rk322x/Kconfig"
658source "arch/arm/mach-rockchip/rk3288/Kconfig"
659source "arch/arm/mach-rockchip/rk3308/Kconfig"
660source "arch/arm/mach-rockchip/rk3328/Kconfig"
661source "arch/arm/mach-rockchip/rk3368/Kconfig"
662source "arch/arm/mach-rockchip/rk3399/Kconfig"
663source "arch/arm/mach-rockchip/rk1808/Kconfig"
664source "arch/arm/mach-rockchip/rv1108/Kconfig"
665endif
666