1if ARCH_ROCKCHIP 2 3config ROCKCHIP_PX30 4 bool "Support Rockchip PX30" 5 select ARM64 6 select GICV2 7 select ARM_SMCCC 8 help 9 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 10 including NEON and GPU, Mali-400 graphics, several DDR3 options 11 and video codec support. Peripherals include Gigabit Ethernet, 12 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 13 14if ROCKCHIP_PX30 15 16config ROCKCHIP_RK3326 17 bool "Support Rockchip RK3326 " 18 help 19 RK3326 can use most code from PX30, but at some situations we have 20 to distinguish between RK3326 and PX30, so this macro gives help. 21 It is usually selected in rk3326 board defconfig. 22endif 23 24config ROCKCHIP_RK3036 25 bool "Support Rockchip RK3036" 26 select CPU_V7 27 select SUPPORT_SPL 28 select SUPPORT_TPL 29 select SPL 30 select TPL 31 select BOARD_LATE_INIT 32 select ROCKCHIP_BROM_HELPER 33 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 34 select TPL_NEEDS_SEPARATE_STACK if TPL 35 select DEBUG_UART_BOARD_INIT 36 select ARM_SMCCC 37 help 38 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 39 including NEON and GPU, Mali-400 graphics, several DDR3 options 40 and video codec support. Peripherals include Gigabit Ethernet, 41 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 42 43config ROCKCHIP_RK3128 44 bool "Support Rockchip RK3128" 45 select CPU_V7 46 select GICV2 47 select ARM_SMCCC 48 help 49 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 50 including NEON and GPU, Mali-400 graphics, several DDR3 options 51 and video codec support. Peripherals include Gigabit Ethernet, 52 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 53 54if ROCKCHIP_RK3128 55 56config ROCKCHIP_RK3126 57 bool "Support Rockchip RK3126 " 58 help 59 RK3126 can use most code from RK3128, but at some situations we have 60 to distinguish between RK3126 and RK3128, so this macro gives help. 61 It is usually selected in rk3126 board defconfig. 62endif 63 64config ROCKCHIP_RK3066 65 bool "Support Rockchip RK3066" 66 select CPU_V7 67 select SUPPORT_SPL 68 select SUPPORT_TPL 69 select SPL 70 select TPL 71 select BOARD_LATE_INIT 72 select ROCKCHIP_BROM_HELPER 73 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 74 help 75 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 76 including NEON and GPU, Mali-400 graphics, several DDR3 options 77 and video codec support. Peripherals include ethernet, USB2 host 78 and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 79 80config ROCKCHIP_RK3188 81 bool "Support Rockchip RK3188" 82 select CPU_V7 83 select SPL_BOARD_INIT if SPL 84 select SUPPORT_SPL 85 select SPL 86 select SPL_CLK 87 select SPL_REGMAP 88 select SPL_SYSCON 89 select SPL_RAM 90 select SPL_DRIVERS_MISC_SUPPORT 91 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 92 select BOARD_LATE_INIT 93 select ROCKCHIP_BROM_HELPER 94 help 95 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 96 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two 97 video interfaces, several memory options and video codec support. 98 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, 99 UART, SPI, I2C and PWMs. 100 101config ROCKCHIP_RK322X 102 bool "Support Rockchip RK3228/RK3229" 103 select CPU_V7 104 select SUPPORT_SPL 105 select SUPPORT_TPL 106 select SPL 107 select TPL 108 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 109 select TPL_NEEDS_SEPARATE_STACK if TPL 110 select SPL_DRIVERS_MISC_SUPPORT 111 imply SPL_SERIAL_SUPPORT 112 imply TPL_SERIAL_SUPPORT 113 select ROCKCHIP_BROM_HELPER 114 select DEBUG_UART_BOARD_INIT 115 select TPL_LIBCOMMON_SUPPORT 116 select TPL_LIBGENERIC_SUPPORT 117 select GICV2 118 select ARM_SMCCC 119 help 120 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 121 including NEON and GPU, Mali-400 graphics, several DDR3 options 122 and video codec support. Peripherals include Gigabit Ethernet, 123 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 124 125config ROCKCHIP_RK3288 126 bool "Support Rockchip RK3288" 127 select CPU_V7 128 select SPL_BOARD_INIT if SPL 129 select SUPPORT_SPL 130 select SPL 131 select GICV2 132 select ARM_SMCCC 133 help 134 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 135 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 136 video interfaces supporting HDMI and eDP, several DDR3 options 137 and video codec support. Peripherals include Gigabit Ethernet, 138 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 139 140config ROCKCHIP_RK3308 141 bool "Support Rockchip RK3308" 142 select ARM64 if !ARM64_BOOT_AARCH32 143 select DEBUG_UART_BOARD_INIT 144 select ARM_SMCCC 145 help 146 The Rockchip RK3308 is a ARM-based Soc which embeded with quad 147 Cortex-A35 and highly integrated audio interfaces. 148 149config ROCKCHIP_RK3328 150 bool "Support Rockchip RK3328" 151 select ARM64 152 select GICV2 153 select SUPPORT_SPL 154 select SUPPORT_TPL 155 select SPL 156 select TPL 157 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 158 select TPL_NEEDS_SEPARATE_STACK if TPL 159 imply SPL_SERIAL_SUPPORT 160 imply TPL_SERIAL_SUPPORT 161 imply SPL_SEPARATE_BSS 162 select DEBUG_UART_BOARD_INIT 163 select ARM_SMCCC 164 help 165 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. 166 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 167 video interfaces supporting HDMI and eDP, several DDR3 options 168 and video codec support. Peripherals include Gigabit Ethernet, 169 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 170 171if ROCKCHIP_RK3328 172 173config TPL_LDSCRIPT 174 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 175 176config TPL_TEXT_BASE 177 default 0xff091000 178 179config TPL_MAX_SIZE 180 default 28672 181 182config TPL_STACK 183 default 0xff098000 184 185endif 186 187config ROCKCHIP_RK3368 188 bool "Support Rockchip RK3368" 189 select ARM64 190 select SUPPORT_SPL 191 select SUPPORT_TPL 192 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 193 select TPL_NEEDS_SEPARATE_STACK if TPL 194 imply SPL_SEPARATE_BSS 195 imply SPL_SERIAL_SUPPORT 196 imply TPL_SERIAL_SUPPORT 197 select DEBUG_UART_BOARD_INIT 198 select GICV2 199 select ARM_SMCCC 200 help 201 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised 202 into a big and little cluster with 4 cores each) Cortex-A53 including 203 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 204 (for the little cluster), PowerVR G6110 based graphics, one video 205 output processor supporting LVDS/HDMI/eDP, several DDR3 options and 206 video codec support. 207 208 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, 209 I2S, UARTs, SPI, I2C and PWMs. 210 211if ROCKCHIP_RK3368 212 213config TPL_LDSCRIPT 214 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" 215 216config TPL_TEXT_BASE 217 default 0xff8c1000 218 219config TPL_MAX_SIZE 220 default 28672 221 222config TPL_STACK 223 default 0xff8cffff 224 225endif 226 227config ROCKCHIP_RK3399 228 bool "Support Rockchip RK3399" 229 select ARM64 230 select SUPPORT_SPL 231 select SPL 232 select SPL_SEPARATE_BSS 233 select SPL_SERIAL_SUPPORT 234 select SPL_DRIVERS_MISC_SUPPORT 235 select DEBUG_UART_BOARD_INIT 236 select GICV3 237 select BOARD_LATE_INIT 238 select ROCKCHIP_BROM_HELPER 239 select ARM_SMCCC 240 help 241 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 242 and quad-core Cortex-A53. 243 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 244 video interfaces supporting HDMI and eDP, several DDR3 options 245 and video codec support. Peripherals include Gigabit Ethernet, 246 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 247 248config ROCKCHIP_RV1108 249 bool "Support Rockchip RV1108" 250 select CPU_V7 251 select SUPPORT_SPL 252 select SPL 253 select BOARD_LATE_INIT 254 help 255 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 256 and a DSP. 257 258config SPL_ROCKCHIP_BACK_TO_BROM 259 bool "SPL returns to bootrom" 260 default y if ROCKCHIP_RK3036 261 select ROCKCHIP_BROM_HELPER 262 depends on SPL 263 help 264 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 265 SPL will return to the boot rom, which will then load the U-Boot 266 binary to keep going on. 267 268config TPL_ROCKCHIP_BACK_TO_BROM 269 bool "TPL returns to bootrom" 270 default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328 271 select ROCKCHIP_BROM_HELPER 272 depends on TPL 273 help 274 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 275 SPL will return to the boot rom, which will then load the U-Boot 276 binary to keep going on. 277 278config ARM64_BOOT_AARCH32 279 bool "Support Boot an ARM64 on AArch32 execution state" 280 select CPU_V7 281 default n 282 help 283 If you want to boot an ARM64 processor on 32-bit mode, say y here. 284 285config ROCKCHIP_BOOT_MODE_REG 286 hex "Rockchip boot mode flag register address" 287 default 0xff010200 if ROCKCHIP_PX30 288 default 0x200081c8 if ROCKCHIP_RK3036 289 default 0x100a0038 if ROCKCHIP_RK3128 290 default 0x20004040 if ROCKCHIP_RK3188 291 default 0x110005c8 if ROCKCHIP_RK322X 292 default 0xff730094 if ROCKCHIP_RK3288 293 default 0xff000500 if ROCKCHIP_RK3308 294 default 0xff1005c8 if ROCKCHIP_RK3328 295 default 0xff738200 if ROCKCHIP_RK3368 296 default 0xff320300 if ROCKCHIP_RK3399 297 default 0x10300580 if ROCKCHIP_RV1108 298 default 0 299 help 300 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) 301 according to the value from this register. 302 303config ROCKCHIP_STIMER_BASE 304 hex "Rockchip Secure timer base address" 305 default 0xff220020 if ROCKCHIP_PX30 306 default 0x200440a0 if ROCKCHIP_RK3036 307 default 0x2000e000 if ROCKCHIP_RK3066 308 default 0x20018020 if ROCKCHIP_RK3126 309 default 0x200440a0 if ROCKCHIP_RK3128 310 default 0x2000e000 if ROCKCHIP_RK3188 311 default 0x110d0020 if ROCKCHIP_RK322X 312 default 0xff810020 if ROCKCHIP_RK3288 313 default 0xff1d0020 if ROCKCHIP_RK3328 314 default 0xff830020 if ROCKCHIP_RK3368 315 default 0xff8680a0 if ROCKCHIP_RK3399 316 default 0x10350020 if ROCKCHIP_RV1108 317 default 0 318 help 319 The secure timer inited in SPL/TPL in secure word, ARM generic timer 320 works after this timer work. 321 322config ROCKCHIP_IRAM_START_ADDR 323 hex "Rockchip Secure timer base address" 324 default 0xff0e0000 if ROCKCHIP_PX30 325 default 0x10080000 if ROCKCHIP_RK3036 326 default 0x10080000 if ROCKCHIP_RK3128 327 default 0x10080000 if ROCKCHIP_RK3188 328 default 0x10080000 if ROCKCHIP_RK322X 329 default 0xff700000 if ROCKCHIP_RK3288 330 default 0xff091000 if ROCKCHIP_RK3328 331 default 0xff8c0000 if ROCKCHIP_RK3368 332 default 0xff8c0000 if ROCKCHIP_RK3399 333 default 0x10080000 if ROCKCHIP_RV1108 334 default 0 335 help 336 The IRAM start addr is to locate variant of the boot device from 337 bootrom. 338 339config ROCKCHIP_SPL_RESERVE_IRAM 340 hex "Size of IRAM reserved in SPL" 341 default 0 342 help 343 SPL may need reserve memory for firmware loaded by SPL, whose load 344 address is in IRAM and may overlay with SPL text area if not 345 reserved. 346 347config ROCKCHIP_BROM_HELPER 348 bool 349 350config SPL_ROCKCHIP_EARLYRETURN_TO_BROM 351 bool "SPL requires early-return (for RK3188-style BROM) to BROM" 352 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK 353 help 354 Some Rockchip BROM variants (e.g. on the RK3188) load the 355 first stage in segments and enter multiple times. E.g. on 356 the RK3188, the first 1KB of the first stage are loaded 357 first and entered; after returning to the BROM, the 358 remainder of the first stage is loaded, but the BROM 359 re-enters at the same address/to the same code as previously. 360 361 This enables support code in the BOOT0 hook for the SPL stage 362 to allow multiple entries. 363 364config TPL_ROCKCHIP_EARLYRETURN_TO_BROM 365 bool "TPL requires early-return (for RK3188-style BROM) to BROM" 366 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK 367 help 368 Some Rockchip BROM variants (e.g. on the RK3188) load the 369 first stage in segments and enter multiple times. E.g. on 370 the RK3188, the first 1KB of the first stage are loaded 371 first and entered; after returning to the BROM, the 372 remainder of the first stage is loaded, but the BROM 373 re-enters at the same address/to the same code as previously. 374 375 This enables support code in the BOOT0 hook for the TPL stage 376 to allow multiple entries. 377 378config SPL_MMC_SUPPORT 379 default y if !SPL_ROCKCHIP_BACK_TO_BROM 380 381config RKIMG_BOOTLOADER 382 bool "Support for Rockchip Image Bootloader boot flow" 383 default n 384 help 385 Rockchip use this to boot Android during development cycle and for 386 other OS, typical content kernel.img with zImage/Image, boot.img and 387 recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img 388 with dtb and uboot/kernel logo bmp, vendor storage for custom info 389 like SN and MAC address. 390 391config ROCKCHIP_RESOURCE_IMAGE 392 bool "Enable support for rockchip resource image" 393 depends on RKIMG_BOOTLOADER 394 default y 395 help 396 This enables support to get dtb or logo files from 397 rockchip resource image format partition. 398 399config ROCKCHIP_VENDOR_PARTITION 400 bool "Rockchip vendor storage partition support" 401 depends on RKIMG_BOOTLOADER 402 help 403 This enable support to read/write vendor configuration data from/to 404 this partition. 405 406config USING_KERNEL_DTB 407 bool "Using dtb from Kernel/resource for U-Boot" 408 depends on RKIMG_BOOTLOADER && OF_LIVE 409 default y 410 help 411 This enable support to read dtb from resource and use it for U-Boot, 412 the uart and emmc will still using U-Boot dtb, but other devices like 413 regulator/pmic, display, usb will use dts node from kernel. 414 415config ROCKCHIP_CRC 416 bool "Rockchip CRC verify images" 417 help 418 This enable support Rockchip CRC verify images. It takes a lot of time, 419 so it is better only used for debug. 420 421config ROCKCHIP_SMCCC 422 bool "Rockchip SMCCC" 423 default y if ARM_SMCCC 424 help 425 This enable support for Rockchip SMC calls 426 427config ROCKCHIP_DEBUGGER 428 bool "Rockchip debugger" 429 depends on IRQ 430 help 431 This enable support for Rockchip debugger. Now we install a timer interrupt 432 and dump pt_regs when the timeout event trigger. This helps us to know cpu 433 state when system hang. 434 435config ROCKCHIP_CRASH_DUMP 436 bool "Rockchip crash dump registers" 437 help 438 This enable dump registers when system crash, the registers you would like 439 to dump can be added in show_regs(). 440 441config GICV2 442 bool "ARM GICv2" 443 444config GICV3 445 bool "ARM GICv3" 446 447source "arch/arm/mach-rockchip/px30/Kconfig" 448source "arch/arm/mach-rockchip/rk3036/Kconfig" 449source "arch/arm/mach-rockchip/rk3066/Kconfig" 450source "arch/arm/mach-rockchip/rk3128/Kconfig" 451source "arch/arm/mach-rockchip/rk3188/Kconfig" 452source "arch/arm/mach-rockchip/rk322x/Kconfig" 453source "arch/arm/mach-rockchip/rk3288/Kconfig" 454source "arch/arm/mach-rockchip/rk3308/Kconfig" 455source "arch/arm/mach-rockchip/rk3328/Kconfig" 456source "arch/arm/mach-rockchip/rk3368/Kconfig" 457source "arch/arm/mach-rockchip/rk3399/Kconfig" 458source "arch/arm/mach-rockchip/rv1108/Kconfig" 459endif 460