1if ARCH_ROCKCHIP 2 3config ROCKCHIP_PX30 4 bool "Support Rockchip PX30" 5 select ARM64 6 select GICV2 7 select ARM_SMCCC 8 select SUPPORT_SPL 9 select SUPPORT_TPL 10 select SPL 11 select TPL 12 select TPL_TINY_FRAMEWORK if TPL 13 14 imply SPL_SERIAL_SUPPORT 15 imply TPL_SERIAL_SUPPORT 16 select DEBUG_UART_BOARD_INIT 17 help 18 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 19 including NEON and GPU, Mali-400 graphics, several DDR3 options 20 and video codec support. Peripherals include Gigabit Ethernet, 21 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 22 23if ROCKCHIP_PX30 24 25config TPL_LDSCRIPT 26 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 27 28config TPL_TEXT_BASE 29 default 0xff0e1000 30 31config TPL_MAX_SIZE 32 default 10240 33 34config ROCKCHIP_RK3326 35 bool "Support Rockchip RK3326 " 36 help 37 RK3326 can use most code from PX30, but at some situations we have 38 to distinguish between RK3326 and PX30, so this macro gives help. 39 It is usually selected in rk3326 board defconfig. 40endif 41 42config ROCKCHIP_RK3036 43 bool "Support Rockchip RK3036" 44 select CPU_V7 45 select SUPPORT_SPL 46 select SUPPORT_TPL 47 select SPL 48 select TPL 49 select BOARD_LATE_INIT 50 select ROCKCHIP_BROM_HELPER 51 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 52 select TPL_NEEDS_SEPARATE_STACK if TPL 53 select DEBUG_UART_BOARD_INIT 54 select ARM_SMCCC 55 help 56 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 57 including NEON and GPU, Mali-400 graphics, several DDR3 options 58 and video codec support. Peripherals include Gigabit Ethernet, 59 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 60 61config ROCKCHIP_RK3128 62 bool "Support Rockchip RK3128" 63 select CPU_V7 64 select GICV2 65 select ARM_SMCCC 66 help 67 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 68 including NEON and GPU, Mali-400 graphics, several DDR3 options 69 and video codec support. Peripherals include Gigabit Ethernet, 70 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 71 72if ROCKCHIP_RK3128 73 74config ROCKCHIP_RK3126 75 bool "Support Rockchip RK3126 " 76 help 77 RK3126 can use most code from RK3128, but at some situations we have 78 to distinguish between RK3126 and RK3128, so this macro gives help. 79 It is usually selected in rk3126 board defconfig. 80 81config ROCKCHIP_PX3SE 82 bool "Support Rockchip PX3SE" 83 help 84 PX3SE is a variant of RK3128, it shares codes with RK3128, but we still 85 need this macro to distinguish PX3SE and RK3128. 86endif 87 88config ROCKCHIP_RK3066 89 bool "Support Rockchip RK3066" 90 select CPU_V7 91 select SUPPORT_SPL 92 select SUPPORT_TPL 93 select SPL 94 select TPL 95 select BOARD_LATE_INIT 96 select ROCKCHIP_BROM_HELPER 97 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 98 help 99 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 100 including NEON and GPU, Mali-400 graphics, several DDR3 options 101 and video codec support. Peripherals include ethernet, USB2 host 102 and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 103 104config ROCKCHIP_RK3188 105 bool "Support Rockchip RK3188" 106 select CPU_V7 107 select SPL_BOARD_INIT if SPL 108 select SUPPORT_SPL 109 select SPL 110 select SPL_CLK 111 select SPL_REGMAP 112 select SPL_SYSCON 113 select SPL_RAM 114 select SPL_DRIVERS_MISC_SUPPORT 115 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 116 select BOARD_LATE_INIT 117 select ROCKCHIP_BROM_HELPER 118 help 119 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 120 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two 121 video interfaces, several memory options and video codec support. 122 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, 123 UART, SPI, I2C and PWMs. 124 125config ROCKCHIP_RK322X 126 bool "Support Rockchip RK3228/RK3229" 127 select CPU_V7 128 select SUPPORT_SPL 129 select SUPPORT_TPL 130 select SPL 131 select TPL 132 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 133 select TPL_NEEDS_SEPARATE_STACK if TPL 134 select SPL_DRIVERS_MISC_SUPPORT 135 imply SPL_SERIAL_SUPPORT 136 imply TPL_SERIAL_SUPPORT 137 select ROCKCHIP_BROM_HELPER 138 select DEBUG_UART_BOARD_INIT 139 select TPL_LIBCOMMON_SUPPORT 140 select TPL_LIBGENERIC_SUPPORT 141 select GICV2 142 select ARM_SMCCC 143 help 144 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 145 including NEON and GPU, Mali-400 graphics, several DDR3 options 146 and video codec support. Peripherals include Gigabit Ethernet, 147 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 148 149if ROCKCHIP_RK322X 150 151config ROCKCHIP_RK3128X 152 bool "Support Rockchip RK3128X " 153 help 154 RK3128X can use most code from RK322X, but at some situations we have 155 to distinguish between RK3128X and RK322X, so this macro gives help. 156 It is usually selected in RK3128X board defconfig. 157endif 158 159config ROCKCHIP_RK3288 160 bool "Support Rockchip RK3288" 161 select CPU_V7 162 select SPL_BOARD_INIT if SPL 163 select SUPPORT_SPL 164 select SPL 165 select GICV2 166 select ARM_SMCCC 167 help 168 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 169 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 170 video interfaces supporting HDMI and eDP, several DDR3 options 171 and video codec support. Peripherals include Gigabit Ethernet, 172 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 173 174config ROCKCHIP_RK3308 175 bool "Support Rockchip RK3308" 176 select ARM64 if !ARM64_BOOT_AARCH32 177 select DEBUG_UART_BOARD_INIT 178 select ARM_SMCCC 179 help 180 The Rockchip RK3308 is a ARM-based Soc which embeded with quad 181 Cortex-A35 and highly integrated audio interfaces. 182 183config ROCKCHIP_RK3328 184 bool "Support Rockchip RK3328" 185 select ARM64 186 select GICV2 187 select SUPPORT_SPL 188 select SUPPORT_TPL 189 select SPL 190 select TPL 191 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 192 select TPL_NEEDS_SEPARATE_STACK if TPL 193 imply SPL_SERIAL_SUPPORT 194 imply TPL_SERIAL_SUPPORT 195 imply SPL_SEPARATE_BSS 196 select DEBUG_UART_BOARD_INIT 197 select ARM_SMCCC 198 help 199 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. 200 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 201 video interfaces supporting HDMI and eDP, several DDR3 options 202 and video codec support. Peripherals include Gigabit Ethernet, 203 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 204 205if ROCKCHIP_RK3328 206 207config TPL_LDSCRIPT 208 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 209 210config TPL_TEXT_BASE 211 default 0xff091000 212 213config TPL_MAX_SIZE 214 default 28672 215 216config TPL_STACK 217 default 0xff098000 218 219endif 220 221config ROCKCHIP_RK3368 222 bool "Support Rockchip RK3368" 223 select ARM64 224 select SUPPORT_SPL 225 select SUPPORT_TPL 226 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 227 select TPL_NEEDS_SEPARATE_STACK if TPL 228 imply SPL_SEPARATE_BSS 229 imply SPL_SERIAL_SUPPORT 230 imply TPL_SERIAL_SUPPORT 231 select DEBUG_UART_BOARD_INIT 232 select GICV2 233 select ARM_SMCCC 234 help 235 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised 236 into a big and little cluster with 4 cores each) Cortex-A53 including 237 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 238 (for the little cluster), PowerVR G6110 based graphics, one video 239 output processor supporting LVDS/HDMI/eDP, several DDR3 options and 240 video codec support. 241 242 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, 243 I2S, UARTs, SPI, I2C and PWMs. 244 245if ROCKCHIP_RK3368 246 247config TPL_LDSCRIPT 248 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" 249 250config TPL_TEXT_BASE 251 default 0xff8c1000 252 253config TPL_MAX_SIZE 254 default 28672 255 256config TPL_STACK 257 default 0xff8cffff 258 259endif 260 261config ROCKCHIP_RK3399 262 bool "Support Rockchip RK3399" 263 select ARM64 264 select SUPPORT_SPL 265 select SUPPORT_TPL 266 select SPL 267 select TPL 268 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL 269 select TPL_NEEDS_SEPARATE_STACK if TPL 270 imply TPL_SERIAL_SUPPORT 271 select SPL_SEPARATE_BSS 272 select SPL_SERIAL_SUPPORT 273 select SPL_DRIVERS_MISC_SUPPORT 274 select DEBUG_UART_BOARD_INIT 275 select GICV3 276 select BOARD_LATE_INIT 277 select ROCKCHIP_BROM_HELPER 278 select ARM_SMCCC 279 select TPL_LIBCOMMON_SUPPORT 280 select TPL_LIBGENERIC_SUPPORT 281 select TPL_SYS_MALLOC_SIMPLE 282 select TPL_BOOTROM_SUPPORT 283 select TPL_DRIVERS_MISC_SUPPORT 284 select TPL_OF_CONTROL 285 select TPL_DM 286 select TPL_REGMAP 287 select TPL_SYSCON 288 select TPL_RAM 289 select TPL_CLK 290 select TPL_TINY_MEMSET 291 help 292 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 293 and quad-core Cortex-A53. 294 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 295 video interfaces supporting HDMI and eDP, several DDR3 options 296 and video codec support. Peripherals include Gigabit Ethernet, 297 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 298 299if ROCKCHIP_RK3399 300 301config TPL_LDSCRIPT 302 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 303 304config TPL_TEXT_BASE 305 default 0xff8c2000 306 307config TPL_MAX_SIZE 308 default 188416 309 310config TPL_STACK 311 default 0xff8effff 312 313endif 314 315 316config ROCKCHIP_RK1808 317 bool "Support Rockchip RK1808" 318 select ARM64 319 select ARM_SMCCC 320 select DEBUG_UART_BOARD_INIT 321 help 322 The Rockchip RK1808 is a ARM-based Soc which embedded with dual 323 Cortex-A35. 324 325if ROCKCHIP_RK1808 326 327config COPROCESSOR_RK1808 328 bool "RK1808 coprocessor" 329 help 330 This indicates the RK1808 is working as a coprocessor for another 331 more powerful SoC. 332 333endif 334 335config ROCKCHIP_RV1108 336 bool "Support Rockchip RV1108" 337 select CPU_V7 338 select SUPPORT_SPL 339 select SUPPORT_TPL 340 select SPL 341 select TPL 342 select BOARD_LATE_INIT 343 help 344 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 345 and a DSP. 346 347if ROCKCHIP_RV1108 348 349config TPL_LDSCRIPT 350 default "arch/arm/mach-rockchip/u-boot-tpl.lds" 351 352config TPL_TEXT_BASE 353 default 0x10080800 354 355config TPL_MAX_SIZE 356 default 6144 357 358config TPL_STACK 359 default 0x10082000 360 361endif 362 363config SPL_ROCKCHIP_BACK_TO_BROM 364 bool "SPL returns to bootrom" 365 default y if ROCKCHIP_RK3036 366 select ROCKCHIP_BROM_HELPER 367 depends on SPL 368 help 369 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 370 SPL will return to the boot rom, which will then load the U-Boot 371 binary to keep going on. 372 373config TPL_ROCKCHIP_BACK_TO_BROM 374 bool "TPL returns to bootrom" 375 default y 376 select ROCKCHIP_BROM_HELPER 377 depends on TPL 378 help 379 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 380 SPL will return to the boot rom, which will then load the U-Boot 381 binary to keep going on. 382 383config ARM64_BOOT_AARCH32 384 bool "Support Boot an ARM64 on AArch32 execution state" 385 select CPU_V7 386 default n 387 help 388 If you want to boot an ARM64 processor on 32-bit mode, say y here. 389 390config ROCKCHIP_BOOT_MODE_REG 391 hex "Rockchip boot mode flag register address" 392 default 0xff010200 if ROCKCHIP_PX30 393 default 0x200081c8 if ROCKCHIP_RK3036 394 default 0x100a0038 if ROCKCHIP_RK3128 395 default 0x20004040 if ROCKCHIP_RK3188 396 default 0x110005c8 if ROCKCHIP_RK322X 397 default 0xff730094 if ROCKCHIP_RK3288 398 default 0xff000500 if ROCKCHIP_RK3308 399 default 0xff1005c8 if ROCKCHIP_RK3328 400 default 0xff738200 if ROCKCHIP_RK3368 401 default 0xff320300 if ROCKCHIP_RK3399 402 default 0xfe020200 if ROCKCHIP_RK1808 403 default 0x10300580 if ROCKCHIP_RV1108 404 default 0 405 help 406 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) 407 according to the value from this register. 408 409config ROCKCHIP_STIMER_BASE 410 hex "Rockchip Secure timer base address" 411 default 0xff220020 if ROCKCHIP_PX30 412 default 0x200440a0 if ROCKCHIP_RK3036 413 default 0x2000e000 if ROCKCHIP_RK3066 414 default 0x20018020 if ROCKCHIP_RK3126 415 default 0x200440a0 if ROCKCHIP_RK3128 416 default 0x2000e000 if ROCKCHIP_RK3188 417 default 0x110d0020 if ROCKCHIP_RK322X 418 default 0xff810020 if ROCKCHIP_RK3288 419 default 0xff1d0020 if ROCKCHIP_RK3328 420 default 0xff830020 if ROCKCHIP_RK3368 421 default 0xff8680a0 if ROCKCHIP_RK3399 422 default 0x10350020 if ROCKCHIP_RV1108 423 default 0 424 help 425 The secure timer inited in SPL/TPL in secure word, ARM generic timer 426 works after this timer work. 427 428config ROCKCHIP_IRAM_START_ADDR 429 hex "Rockchip Secure timer base address" 430 default 0xff0e0000 if ROCKCHIP_PX30 431 default 0x10080000 if ROCKCHIP_RK3036 432 default 0x10080000 if ROCKCHIP_RK3128 433 default 0x10080000 if ROCKCHIP_RK3188 434 default 0x10080000 if ROCKCHIP_RK322X 435 default 0xff700000 if ROCKCHIP_RK3288 436 default 0xfff80000 if ROCKCHIP_RK3308 437 default 0xff091000 if ROCKCHIP_RK3328 438 default 0xff8c0000 if ROCKCHIP_RK3368 439 default 0xff8c0000 if ROCKCHIP_RK3399 440 default 0x10080000 if ROCKCHIP_RV1108 441 default 0 442 help 443 The IRAM start addr is to locate variant of the boot device from 444 bootrom. 445 446config ROCKCHIP_SPL_RESERVE_IRAM 447 hex "Size of IRAM reserved in SPL" 448 default 0 449 help 450 SPL may need reserve memory for firmware loaded by SPL, whose load 451 address is in IRAM and may overlay with SPL text area if not 452 reserved. 453 454config ROCKCHIP_BROM_HELPER 455 bool 456 457config SPL_ROCKCHIP_EARLYRETURN_TO_BROM 458 bool "SPL requires early-return (for RK3188-style BROM) to BROM" 459 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK 460 help 461 Some Rockchip BROM variants (e.g. on the RK3188) load the 462 first stage in segments and enter multiple times. E.g. on 463 the RK3188, the first 1KB of the first stage are loaded 464 first and entered; after returning to the BROM, the 465 remainder of the first stage is loaded, but the BROM 466 re-enters at the same address/to the same code as previously. 467 468 This enables support code in the BOOT0 hook for the SPL stage 469 to allow multiple entries. 470 471config TPL_ROCKCHIP_EARLYRETURN_TO_BROM 472 bool "TPL requires early-return (for RK3188-style BROM) to BROM" 473 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK 474 help 475 Some Rockchip BROM variants (e.g. on the RK3188) load the 476 first stage in segments and enter multiple times. E.g. on 477 the RK3188, the first 1KB of the first stage are loaded 478 first and entered; after returning to the BROM, the 479 remainder of the first stage is loaded, but the BROM 480 re-enters at the same address/to the same code as previously. 481 482 This enables support code in the BOOT0 hook for the TPL stage 483 to allow multiple entries. 484 485config SPL_MMC_SUPPORT 486 default y if !SPL_ROCKCHIP_BACK_TO_BROM 487 488config RKIMG_BOOTLOADER 489 bool "Support for Rockchip Image Bootloader boot flow" 490 default n 491 help 492 Rockchip use this to boot Android during development cycle and for 493 other OS, typical content kernel.img with zImage/Image, boot.img and 494 recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img 495 with dtb and uboot/kernel logo bmp, vendor storage for custom info 496 like SN and MAC address. 497 498config ROCKCHIP_RESOURCE_IMAGE 499 bool "Enable support for rockchip resource image" 500 depends on RKIMG_BOOTLOADER 501 default y 502 help 503 This enables support to get dtb or logo files from 504 rockchip resource image format partition. 505 506config ROCKCHIP_VENDOR_PARTITION 507 bool "Rockchip vendor storage partition support" 508 depends on RKIMG_BOOTLOADER 509 help 510 This enable support to read/write vendor configuration data from/to 511 this partition. 512 513config USING_KERNEL_DTB 514 bool "Using dtb from Kernel/resource for U-Boot" 515 depends on RKIMG_BOOTLOADER && OF_LIVE 516 default y 517 help 518 This enable support to read dtb from resource and use it for U-Boot, 519 the uart and emmc will still using U-Boot dtb, but other devices like 520 regulator/pmic, display, usb will use dts node from kernel. 521 522config ROCKCHIP_CRC 523 bool "Rockchip CRC verify images" 524 help 525 This enable support Rockchip CRC verify images. It takes a lot of time, 526 so it is better only used for debug. 527 528config ROCKCHIP_SMCCC 529 bool "Rockchip SMCCC" 530 default y if ARM_SMCCC 531 help 532 This enable support for Rockchip SMC calls 533 534config ROCKCHIP_DEBUGGER 535 bool "Rockchip debugger" 536 depends on IRQ 537 help 538 This enable support for Rockchip debugger. Now we install a timer interrupt 539 and dump pt_regs when the timeout event trigger. This helps us to know cpu 540 state when system hang. 541 542config ROCKCHIP_CRASH_DUMP 543 bool "Rockchip crash dump registers" 544 help 545 This enable dump registers when system crash, the registers you would like 546 to dump can be added in show_regs(). 547 548config ROCKCHIP_PRELOADER_ATAGS 549 bool "Rockchip pre-loader atags" 550 default y if ARCH_ROCKCHIP 551 help 552 This enable support Rockchip atags among pre-loaders, i.e. ddr, miniloader, ATF, 553 tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders 554 and finally ends with U-Boot. 555 556config ROCKCHIP_PRELOADER_SERIAL 557 bool "Rockchip pre-loader serial" 558 default y if ROCKCHIP_PRELOADER_ATAGS 559 help 560 This enable U-Boot using pre-loader atags serial configure to initialize console. 561 It denpends on serial aliases to find pre-loader serial number. 562 563config GICV2 564 bool "ARM GICv2" 565 566config GICV3 567 bool "ARM GICv3" 568 569source "arch/arm/mach-rockchip/px30/Kconfig" 570source "arch/arm/mach-rockchip/rk3036/Kconfig" 571source "arch/arm/mach-rockchip/rk3066/Kconfig" 572source "arch/arm/mach-rockchip/rk3128/Kconfig" 573source "arch/arm/mach-rockchip/rk3188/Kconfig" 574source "arch/arm/mach-rockchip/rk322x/Kconfig" 575source "arch/arm/mach-rockchip/rk3288/Kconfig" 576source "arch/arm/mach-rockchip/rk3308/Kconfig" 577source "arch/arm/mach-rockchip/rk3328/Kconfig" 578source "arch/arm/mach-rockchip/rk3368/Kconfig" 579source "arch/arm/mach-rockchip/rk3399/Kconfig" 580source "arch/arm/mach-rockchip/rk1808/Kconfig" 581source "arch/arm/mach-rockchip/rv1108/Kconfig" 582endif 583