xref: /rk3399_rockchip-uboot/arch/arm/mach-rmobile/include/mach/r8a7795.h (revision c98b171e1098f94b2ff7720c45a25a602882f876)
1*ee8f0cb3SNobuhiro Iwamatsu /*
2*ee8f0cb3SNobuhiro Iwamatsu  * arch/arm/mach-rmobile/include/mach/r8a7795.h
3*ee8f0cb3SNobuhiro Iwamatsu  *	This file defines registers and value for r8a7795.
4*ee8f0cb3SNobuhiro Iwamatsu  *
5*ee8f0cb3SNobuhiro Iwamatsu  * Copyright (C) 2015 Renesas Electronics Corporation
6*ee8f0cb3SNobuhiro Iwamatsu  *
7*ee8f0cb3SNobuhiro Iwamatsu  * SPDX-License-Identifier:	GPL-2.0+
8*ee8f0cb3SNobuhiro Iwamatsu  */
9*ee8f0cb3SNobuhiro Iwamatsu 
10*ee8f0cb3SNobuhiro Iwamatsu #ifndef __ASM_ARCH_R8A7795_H
11*ee8f0cb3SNobuhiro Iwamatsu #define __ASM_ARCH_R8A7795_H
12*ee8f0cb3SNobuhiro Iwamatsu 
13*ee8f0cb3SNobuhiro Iwamatsu #include "rcar-gen3-base.h"
14*ee8f0cb3SNobuhiro Iwamatsu 
15*ee8f0cb3SNobuhiro Iwamatsu /* Module stop control/status register bits */
16*ee8f0cb3SNobuhiro Iwamatsu #define MSTP0_BITS	0x00640800
17*ee8f0cb3SNobuhiro Iwamatsu #define MSTP1_BITS	0xF3EE9390
18*ee8f0cb3SNobuhiro Iwamatsu #define MSTP2_BITS	0x340FAFDC
19*ee8f0cb3SNobuhiro Iwamatsu #define MSTP3_BITS	0xD80C7CDF
20*ee8f0cb3SNobuhiro Iwamatsu #define MSTP4_BITS	0x80000184
21*ee8f0cb3SNobuhiro Iwamatsu #define MSTP5_BITS	0x40BFFF46
22*ee8f0cb3SNobuhiro Iwamatsu #define MSTP6_BITS	0xE5FBEECF
23*ee8f0cb3SNobuhiro Iwamatsu #define MSTP7_BITS	0x39FFFF0E
24*ee8f0cb3SNobuhiro Iwamatsu #define MSTP8_BITS	0x01F19FF4
25*ee8f0cb3SNobuhiro Iwamatsu #define MSTP9_BITS	0xFFDFFFFF
26*ee8f0cb3SNobuhiro Iwamatsu #define MSTP10_BITS	0xFFFEFFE0
27*ee8f0cb3SNobuhiro Iwamatsu #define MSTP11_BITS	0x00000000
28*ee8f0cb3SNobuhiro Iwamatsu 
29*ee8f0cb3SNobuhiro Iwamatsu /* SDHI */
30*ee8f0cb3SNobuhiro Iwamatsu #define CONFIG_SYS_SH_SDHI0_BASE 0xEE100000
31*ee8f0cb3SNobuhiro Iwamatsu #define CONFIG_SYS_SH_SDHI1_BASE 0xEE120000
32*ee8f0cb3SNobuhiro Iwamatsu #define CONFIG_SYS_SH_SDHI2_BASE 0xEE140000	/* either MMC0 */
33*ee8f0cb3SNobuhiro Iwamatsu #define CONFIG_SYS_SH_SDHI3_BASE 0xEE160000	/* either MMC1 */
34*ee8f0cb3SNobuhiro Iwamatsu #define CONFIG_SYS_SH_SDHI_NR_CHANNEL 4
35*ee8f0cb3SNobuhiro Iwamatsu 
36*ee8f0cb3SNobuhiro Iwamatsu #endif /* __ASM_ARCH_R8A7795_H */
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