xref: /rk3399_rockchip-uboot/arch/arm/mach-rmobile/include/mach/r8a7790.h (revision c98b171e1098f94b2ff7720c45a25a602882f876)
1*7a7d246dSNobuhiro Iwamatsu /*
2*7a7d246dSNobuhiro Iwamatsu  * arch/arm/include/asm/arch-rmobile/r8a7790.h
3*7a7d246dSNobuhiro Iwamatsu  *
4*7a7d246dSNobuhiro Iwamatsu  * Copyright (C) 2013,2014 Renesas Electronics Corporation
5*7a7d246dSNobuhiro Iwamatsu  *
6*7a7d246dSNobuhiro Iwamatsu  * SPDX-License-Identifier: GPL-2.0
7*7a7d246dSNobuhiro Iwamatsu */
8*7a7d246dSNobuhiro Iwamatsu 
9*7a7d246dSNobuhiro Iwamatsu #ifndef __ASM_ARCH_R8A7790_H
10*7a7d246dSNobuhiro Iwamatsu #define __ASM_ARCH_R8A7790_H
11*7a7d246dSNobuhiro Iwamatsu 
12*7a7d246dSNobuhiro Iwamatsu #include "rcar-base.h"
13*7a7d246dSNobuhiro Iwamatsu 
14*7a7d246dSNobuhiro Iwamatsu /* SH-I2C */
15*7a7d246dSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_BASE2	0xE6520000
16*7a7d246dSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_BASE3	0xE60B0000
17*7a7d246dSNobuhiro Iwamatsu 
18*7a7d246dSNobuhiro Iwamatsu /* Module stop control/status register bits */
19*7a7d246dSNobuhiro Iwamatsu #define MSTP0_BITS	0x00640801
20*7a7d246dSNobuhiro Iwamatsu #define MSTP1_BITS	0xDB6E9BDF
21*7a7d246dSNobuhiro Iwamatsu #define MSTP2_BITS	0x300DA1FC
22*7a7d246dSNobuhiro Iwamatsu #define MSTP3_BITS	0xF08CF831
23*7a7d246dSNobuhiro Iwamatsu #define MSTP4_BITS	0x80000184
24*7a7d246dSNobuhiro Iwamatsu #define MSTP5_BITS	0x44C00046
25*7a7d246dSNobuhiro Iwamatsu #define MSTP7_BITS	0x07F30718
26*7a7d246dSNobuhiro Iwamatsu #define MSTP8_BITS	0x01F0FF84
27*7a7d246dSNobuhiro Iwamatsu #define MSTP9_BITS	0xF5979FCF
28*7a7d246dSNobuhiro Iwamatsu #define MSTP10_BITS	0xFFFEFFE0
29*7a7d246dSNobuhiro Iwamatsu #define MSTP11_BITS	0x00000000
30*7a7d246dSNobuhiro Iwamatsu 
31*7a7d246dSNobuhiro Iwamatsu /* SDHI */
32*7a7d246dSNobuhiro Iwamatsu #define CONFIG_SYS_SH_SDHI1_BASE 0xEE120000
33*7a7d246dSNobuhiro Iwamatsu #define CONFIG_SYS_SH_SDHI2_BASE 0xEE140000
34*7a7d246dSNobuhiro Iwamatsu #define CONFIG_SYS_SH_SDHI3_BASE 0xEE160000
35*7a7d246dSNobuhiro Iwamatsu #define CONFIG_SYS_SH_SDHI_NR_CHANNEL 4
36*7a7d246dSNobuhiro Iwamatsu 
37*7a7d246dSNobuhiro Iwamatsu #define R8A7790_CUT_ES2X	2
38*7a7d246dSNobuhiro Iwamatsu #define IS_R8A7790_ES2()	\
39*7a7d246dSNobuhiro Iwamatsu 	(rmobile_get_cpu_rev_integer() == R8A7790_CUT_ES2X)
40*7a7d246dSNobuhiro Iwamatsu 
41*7a7d246dSNobuhiro Iwamatsu #endif /* __ASM_ARCH_R8A7790_H */
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