xref: /rk3399_rockchip-uboot/arch/arm/mach-orion5x/include/mach/mv88f5182.h (revision b9cb64825b5e6efeb715abd8b48d9b12f98973e9)
1*fd697ecfSMasahiro Yamada /*
2*fd697ecfSMasahiro Yamada  * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
3*fd697ecfSMasahiro Yamada  *
4*fd697ecfSMasahiro Yamada  * Based on original Kirkwood 88F6182 support which is
5*fd697ecfSMasahiro Yamada  * (C) Copyright 2009
6*fd697ecfSMasahiro Yamada  * Marvell Semiconductor <www.marvell.com>
7*fd697ecfSMasahiro Yamada  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8*fd697ecfSMasahiro Yamada  *
9*fd697ecfSMasahiro Yamada  * Header file for Feroceon CPU core 88F5182 SOC.
10*fd697ecfSMasahiro Yamada  *
11*fd697ecfSMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
12*fd697ecfSMasahiro Yamada  */
13*fd697ecfSMasahiro Yamada 
14*fd697ecfSMasahiro Yamada #ifndef _CONFIG_88F5182_H
15*fd697ecfSMasahiro Yamada #define _CONFIG_88F5182_H
16*fd697ecfSMasahiro Yamada 
17*fd697ecfSMasahiro Yamada /* SOC specific definitions */
18*fd697ecfSMasahiro Yamada #define F88F5182_REGS_PHYS_BASE		0xf1000000
19*fd697ecfSMasahiro Yamada #define ORION5X_REGS_PHY_BASE		F88F5182_REGS_PHYS_BASE
20*fd697ecfSMasahiro Yamada 
21*fd697ecfSMasahiro Yamada /* TCLK Core Clock defination */
22*fd697ecfSMasahiro Yamada #define CONFIG_SYS_TCLK			166000000 /* 166MHz */
23*fd697ecfSMasahiro Yamada 
24*fd697ecfSMasahiro Yamada #endif /* _CONFIG_88F5182_H */
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