1*983e3700STom Rini /* 2*983e3700STom Rini * 3*983e3700STom Rini * Common layer for reset related functionality of OMAP based socs. 4*983e3700STom Rini * 5*983e3700STom Rini * (C) Copyright 2012 6*983e3700STom Rini * Texas Instruments, <www.ti.com> 7*983e3700STom Rini * 8*983e3700STom Rini * Sricharan R <r.sricharan@ti.com> 9*983e3700STom Rini * 10*983e3700STom Rini * SPDX-License-Identifier: GPL-2.0+ 11*983e3700STom Rini */ 12*983e3700STom Rini #include <config.h> 13*983e3700STom Rini #include <asm/io.h> 14*983e3700STom Rini #include <asm/arch/cpu.h> 15*983e3700STom Rini #include <linux/compiler.h> 16*983e3700STom Rini reset_cpu(unsigned long ignored)17*983e3700STom Rinivoid __weak reset_cpu(unsigned long ignored) 18*983e3700STom Rini { 19*983e3700STom Rini writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL); 20*983e3700STom Rini } 21*983e3700STom Rini warm_reset(void)22*983e3700STom Riniu32 __weak warm_reset(void) 23*983e3700STom Rini { 24*983e3700STom Rini return (readl(PRM_RSTST) & PRM_RSTST_WARM_RESET_MASK); 25*983e3700STom Rini } 26*983e3700STom Rini setup_warmreset_time(void)27*983e3700STom Rinivoid __weak setup_warmreset_time(void) 28*983e3700STom Rini { 29*983e3700STom Rini } 30