1983e3700STom Rini /* 2983e3700STom Rini * Adaptive Body Bias programming sequence for OMAP5 family 3983e3700STom Rini * 4983e3700STom Rini * (C) Copyright 2013 5983e3700STom Rini * Texas Instruments, <www.ti.com> 6983e3700STom Rini * 7983e3700STom Rini * Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> 8983e3700STom Rini * 9983e3700STom Rini * SPDX-License-Identifier: GPL-2.0+ 10983e3700STom Rini */ 11983e3700STom Rini 12983e3700STom Rini #include <common.h> 13983e3700STom Rini #include <asm/omap_common.h> 14983e3700STom Rini #include <asm/io.h> 15983e3700STom Rini 16983e3700STom Rini /* 17983e3700STom Rini * Setup LDOVBB for OMAP5. 18983e3700STom Rini * On OMAP5+ some ABB settings are fused. They are handled 19983e3700STom Rini * in the following way: 20983e3700STom Rini * 21983e3700STom Rini * 1. corresponding EFUSE register contains ABB enable bit 22983e3700STom Rini * and VSET value 23983e3700STom Rini * 2. If ABB enable bit is set to 1, than ABB should be 24983e3700STom Rini * enabled, otherwise ABB should be disabled 25983e3700STom Rini * 3. If ABB is enabled, than VSET value should be copied 26983e3700STom Rini * to corresponding MUX control register 27983e3700STom Rini */ abb_setup_ldovbb(u32 fuse,u32 ldovbb)28983e3700STom Rinis8 abb_setup_ldovbb(u32 fuse, u32 ldovbb) 29983e3700STom Rini { 30983e3700STom Rini u32 vset; 31*0459bc30SNishanth Menon u32 fuse_enable_mask = OMAP5_PROD_ABB_FUSE_ENABLE_MASK; 32*0459bc30SNishanth Menon u32 fuse_vset_mask = OMAP5_PROD_ABB_FUSE_VSET_MASK; 33983e3700STom Rini 34983e3700STom Rini if (!is_omap54xx()) { 35983e3700STom Rini /* DRA7 */ 36983e3700STom Rini fuse_enable_mask = DRA7_ABB_FUSE_ENABLE_MASK; 37983e3700STom Rini fuse_vset_mask = DRA7_ABB_FUSE_VSET_MASK; 38983e3700STom Rini } 39983e3700STom Rini /* 40983e3700STom Rini * ABB parameters must be properly fused 41983e3700STom Rini * otherwise ABB should be disabled 42983e3700STom Rini */ 43983e3700STom Rini vset = readl(fuse); 44983e3700STom Rini if (!(vset & fuse_enable_mask)) 45983e3700STom Rini return -1; 46983e3700STom Rini 47983e3700STom Rini /* prepare VSET value for LDOVBB mux register */ 48983e3700STom Rini vset &= fuse_vset_mask; 49983e3700STom Rini vset >>= ffs(fuse_vset_mask) - 1; 50983e3700STom Rini vset <<= ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1; 51983e3700STom Rini vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK; 52983e3700STom Rini 53983e3700STom Rini /* setup LDOVBB using fused value */ 54983e3700STom Rini clrsetbits_le32(ldovbb, OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK, vset); 55983e3700STom Rini 56983e3700STom Rini return 0; 57983e3700STom Rini } 58