xref: /rk3399_rockchip-uboot/arch/arm/mach-mvebu/serdes/a38x/seq_exec.h (revision 3c9cc70d7153da442575112d9a2643eecd17d534)
1*edb47025SStefan Roese /*
2*edb47025SStefan Roese  * Copyright (C) Marvell International Ltd. and its affiliates
3*edb47025SStefan Roese  *
4*edb47025SStefan Roese  * SPDX-License-Identifier:	GPL-2.0
5*edb47025SStefan Roese  */
6*edb47025SStefan Roese 
7*edb47025SStefan Roese #ifndef _SEQ_EXEC_H
8*edb47025SStefan Roese #define _SEQ_EXEC_H
9*edb47025SStefan Roese 
10*edb47025SStefan Roese #define NA			0xff
11*edb47025SStefan Roese #define DEFAULT_PARAM		0
12*edb47025SStefan Roese #define MV_BOARD_TCLK_ERROR	0xffffffff
13*edb47025SStefan Roese 
14*edb47025SStefan Roese #define NO_DATA			0xffffffff
15*edb47025SStefan Roese #define MAX_DATA_ARRAY		5
16*edb47025SStefan Roese #define FIRST_CELL		0
17*edb47025SStefan Roese 
18*edb47025SStefan Roese /* Operation types */
19*edb47025SStefan Roese enum mv_op {
20*edb47025SStefan Roese 	WRITE_OP,
21*edb47025SStefan Roese 	DELAY_OP,
22*edb47025SStefan Roese 	POLL_OP,
23*edb47025SStefan Roese };
24*edb47025SStefan Roese 
25*edb47025SStefan Roese /* Operation parameters */
26*edb47025SStefan Roese struct op_params {
27*edb47025SStefan Roese 	u32 unit_base_reg;
28*edb47025SStefan Roese 	u32 unit_offset;
29*edb47025SStefan Roese 	u32 mask;
30*edb47025SStefan Roese 	u32 data[MAX_DATA_ARRAY];	/* data array */
31*edb47025SStefan Roese 	u8 wait_time;			/* msec */
32*edb47025SStefan Roese 	u16 num_of_loops;		/* for polling only */
33*edb47025SStefan Roese };
34*edb47025SStefan Roese 
35*edb47025SStefan Roese /*
36*edb47025SStefan Roese  * Sequence parameters. Each sequence contains:
37*edb47025SStefan Roese  * 1. Sequence id.
38*edb47025SStefan Roese  * 2. Sequence size (total amount of operations during the sequence)
39*edb47025SStefan Roese  * 3. a series of operations. operations can be write, poll or delay
40*edb47025SStefan Roese  * 4. index in the data array (the entry where the relevant data sits)
41*edb47025SStefan Roese  */
42*edb47025SStefan Roese struct cfg_seq {
43*edb47025SStefan Roese 	struct op_params *op_params_ptr;
44*edb47025SStefan Roese 	u8 cfg_seq_size;
45*edb47025SStefan Roese 	u8 data_arr_idx;
46*edb47025SStefan Roese };
47*edb47025SStefan Roese 
48*edb47025SStefan Roese extern struct cfg_seq serdes_seq_db[];
49*edb47025SStefan Roese 
50*edb47025SStefan Roese /*
51*edb47025SStefan Roese  * A generic function type for executing an operation (write, poll or delay)
52*edb47025SStefan Roese  */
53*edb47025SStefan Roese typedef int (*op_execute_func_ptr)(u32 serdes_num, struct op_params *params,
54*edb47025SStefan Roese 				   u32 data_arr_idx);
55*edb47025SStefan Roese 
56*edb47025SStefan Roese /* Specific functions for executing each operation */
57*edb47025SStefan Roese int write_op_execute(u32 serdes_num, struct op_params *params,
58*edb47025SStefan Roese 		     u32 data_arr_idx);
59*edb47025SStefan Roese int delay_op_execute(u32 serdes_num, struct op_params *params,
60*edb47025SStefan Roese 		     u32 data_arr_idx);
61*edb47025SStefan Roese int poll_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx);
62*edb47025SStefan Roese enum mv_op get_cfg_seq_op(struct op_params *params);
63*edb47025SStefan Roese int mv_seq_exec(u32 serdes_num, u32 seq_id);
64*edb47025SStefan Roese 
65*edb47025SStefan Roese #endif /*_SEQ_EXEC_H*/
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