1*b58385dfSKonstantin Porotchkin/* 2*b58385dfSKonstantin Porotchkin * Copyright (C) 2016 Marvell International Ltd. 3*b58385dfSKonstantin Porotchkin * 4*b58385dfSKonstantin Porotchkin * SPDX-License-Identifier: GPL-2.0 5*b58385dfSKonstantin Porotchkin * https://spdx.org/licenses 6*b58385dfSKonstantin Porotchkin */ 7*b58385dfSKonstantin Porotchkin 8*b58385dfSKonstantin Porotchkin#include <asm/arch-armada8k/cache_llc.h> 9*b58385dfSKonstantin Porotchkin#include <linux/linkage.h> 10*b58385dfSKonstantin Porotchkin 11*b58385dfSKonstantin Porotchkin/* 12*b58385dfSKonstantin Porotchkin * int __asm_flush_l3_dcache 13*b58385dfSKonstantin Porotchkin * 14*b58385dfSKonstantin Porotchkin * flush Armada-8K last level cache. 15*b58385dfSKonstantin Porotchkin * 16*b58385dfSKonstantin Porotchkin */ 17*b58385dfSKonstantin PorotchkinENTRY(__asm_flush_l3_dcache) 18*b58385dfSKonstantin Porotchkin /* flush cache */ 19*b58385dfSKonstantin Porotchkin mov x0, #LLC_BASE_ADDR 20*b58385dfSKonstantin Porotchkin add x0, x0, #LLC_FLUSH_BY_WAY 21*b58385dfSKonstantin Porotchkin movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16 22*b58385dfSKonstantin Porotchkin mov w1, #LLC_WAY_MASK 23*b58385dfSKonstantin Porotchkin str w1, [x0] 24*b58385dfSKonstantin Porotchkin /* sync cache */ 25*b58385dfSKonstantin Porotchkin mov x0, #LLC_BASE_ADDR 26*b58385dfSKonstantin Porotchkin add x0, x0, #LLC_CACHE_SYNC 27*b58385dfSKonstantin Porotchkin movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16 28*b58385dfSKonstantin Porotchkin str wzr, [x0] 29*b58385dfSKonstantin Porotchkin /* check that cache sync completed */ 30*b58385dfSKonstantin Porotchkin mov x0, #LLC_BASE_ADDR 31*b58385dfSKonstantin Porotchkin add x0, x0, #LLC_CACHE_SYNC_COMPLETE 32*b58385dfSKonstantin Porotchkin movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16 33*b58385dfSKonstantin Porotchkin1: ldr w1, [x0] 34*b58385dfSKonstantin Porotchkin and w1, w1, #LLC_CACHE_SYNC_MASK 35*b58385dfSKonstantin Porotchkin cbnz w1, 1b 36*b58385dfSKonstantin Porotchkin /* return success */ 37*b58385dfSKonstantin Porotchkin mov x0, #0 38*b58385dfSKonstantin Porotchkin ret 39*b58385dfSKonstantin PorotchkinENDPROC(__asm_flush_l3_dcache) 40