1*dc7de222SMasahiro Yamada /* 2*dc7de222SMasahiro Yamada * USB 3.0 DRD Controller 3*dc7de222SMasahiro Yamada * 4*dc7de222SMasahiro Yamada * (C) Copyright 2012-2014 5*dc7de222SMasahiro Yamada * Texas Instruments Incorporated, <www.ti.com> 6*dc7de222SMasahiro Yamada * 7*dc7de222SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 8*dc7de222SMasahiro Yamada */ 9*dc7de222SMasahiro Yamada 10*dc7de222SMasahiro Yamada #define USB3_PHY_REF_SSP_EN BIT(29) 11*dc7de222SMasahiro Yamada #define USB3_PHY_OTG_VBUSVLDECTSEL BIT(16) 12*dc7de222SMasahiro Yamada 13*dc7de222SMasahiro Yamada /* KEYSTONE2 XHCI PHY register structure */ 14*dc7de222SMasahiro Yamada struct keystone_xhci_phy { 15*dc7de222SMasahiro Yamada unsigned int phy_utmi; /* ctl0 */ 16*dc7de222SMasahiro Yamada unsigned int phy_pipe; /* ctl1 */ 17*dc7de222SMasahiro Yamada unsigned int phy_param_ctrl_1; /* ctl2 */ 18*dc7de222SMasahiro Yamada unsigned int phy_param_ctrl_2; /* ctl3 */ 19*dc7de222SMasahiro Yamada unsigned int phy_clock; /* ctl4 */ 20*dc7de222SMasahiro Yamada unsigned int phy_pll; /* ctl5 */ 21*dc7de222SMasahiro Yamada }; 22