1dc7de222SMasahiro Yamada /* 2dc7de222SMasahiro Yamada * DDR3 3dc7de222SMasahiro Yamada * 4dc7de222SMasahiro Yamada * (C) Copyright 2014 5dc7de222SMasahiro Yamada * Texas Instruments Incorporated, <www.ti.com> 6dc7de222SMasahiro Yamada * 7dc7de222SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 8dc7de222SMasahiro Yamada */ 9dc7de222SMasahiro Yamada 10dc7de222SMasahiro Yamada #ifndef _DDR3_H_ 11dc7de222SMasahiro Yamada #define _DDR3_H_ 12dc7de222SMasahiro Yamada 13dc7de222SMasahiro Yamada #include <asm/arch/hardware.h> 14dc7de222SMasahiro Yamada 15dc7de222SMasahiro Yamada struct ddr3_phy_config { 16dc7de222SMasahiro Yamada unsigned int pllcr; 17dc7de222SMasahiro Yamada unsigned int pgcr1_mask; 18dc7de222SMasahiro Yamada unsigned int pgcr1_val; 19dc7de222SMasahiro Yamada unsigned int ptr0; 20dc7de222SMasahiro Yamada unsigned int ptr1; 21dc7de222SMasahiro Yamada unsigned int ptr2; 22dc7de222SMasahiro Yamada unsigned int ptr3; 23dc7de222SMasahiro Yamada unsigned int ptr4; 24dc7de222SMasahiro Yamada unsigned int dcr_mask; 25dc7de222SMasahiro Yamada unsigned int dcr_val; 26dc7de222SMasahiro Yamada unsigned int dtpr0; 27dc7de222SMasahiro Yamada unsigned int dtpr1; 28dc7de222SMasahiro Yamada unsigned int dtpr2; 29dc7de222SMasahiro Yamada unsigned int mr0; 30dc7de222SMasahiro Yamada unsigned int mr1; 31dc7de222SMasahiro Yamada unsigned int mr2; 32dc7de222SMasahiro Yamada unsigned int dtcr; 33dc7de222SMasahiro Yamada unsigned int pgcr2; 34dc7de222SMasahiro Yamada unsigned int zq0cr1; 35dc7de222SMasahiro Yamada unsigned int zq1cr1; 36dc7de222SMasahiro Yamada unsigned int zq2cr1; 37dc7de222SMasahiro Yamada unsigned int pir_v1; 38*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_2_mask; 39*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_2_val; 40*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_3_mask; 41*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_3_val; 42*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_4_mask; 43*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_4_val; 44*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_5_mask; 45*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_5_val; 46*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_6_mask; 47*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_6_val; 48*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_7_mask; 49*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_7_val; 50*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_8_mask; 51*f8b4a2d7SCooper Jr., Franklin unsigned int datx8_8_val; 52dc7de222SMasahiro Yamada unsigned int pir_v2; 53dc7de222SMasahiro Yamada }; 54dc7de222SMasahiro Yamada 55dc7de222SMasahiro Yamada struct ddr3_emif_config { 56dc7de222SMasahiro Yamada unsigned int sdcfg; 57dc7de222SMasahiro Yamada unsigned int sdtim1; 58dc7de222SMasahiro Yamada unsigned int sdtim2; 59dc7de222SMasahiro Yamada unsigned int sdtim3; 60dc7de222SMasahiro Yamada unsigned int sdtim4; 61dc7de222SMasahiro Yamada unsigned int zqcfg; 62dc7de222SMasahiro Yamada unsigned int sdrfc; 63dc7de222SMasahiro Yamada }; 64dc7de222SMasahiro Yamada 65d9a76e77SVitaly Andrianov struct ddr3_spd_cb { 66d9a76e77SVitaly Andrianov char dimm_name[32]; 67d9a76e77SVitaly Andrianov struct ddr3_phy_config phy_cfg; 68d9a76e77SVitaly Andrianov struct ddr3_emif_config emif_cfg; 69d9a76e77SVitaly Andrianov unsigned int ddrspdclock; 70d9a76e77SVitaly Andrianov int ddr_size_gbyte; 71d9a76e77SVitaly Andrianov }; 72d9a76e77SVitaly Andrianov 73dc7de222SMasahiro Yamada u32 ddr3_init(void); 74dc7de222SMasahiro Yamada void ddr3_reset_ddrphy(void); 75dc7de222SMasahiro Yamada void ddr3_init_ecc(u32 base, u32 ddr3_size); 76dc7de222SMasahiro Yamada void ddr3_disable_ecc(u32 base); 77dc7de222SMasahiro Yamada void ddr3_check_ecc_int(u32 base); 78dc7de222SMasahiro Yamada int ddr3_ecc_support_rmw(u32 base); 79dc7de222SMasahiro Yamada void ddr3_err_reset_workaround(void); 80dc7de222SMasahiro Yamada void ddr3_enable_ecc(u32 base, int test); 81dc7de222SMasahiro Yamada void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg); 82dc7de222SMasahiro Yamada void ddr3_init_ddremif(u32 base, struct ddr3_emif_config *emif_cfg); 838efc2437SVitaly Andrianov int ddr3_get_size(void); 84dc7de222SMasahiro Yamada 85dc7de222SMasahiro Yamada #endif 86