1 /* 2 * keystone2: common clock header file 3 * 4 * (C) Copyright 2012-2014 5 * Texas Instruments Incorporated, <www.ti.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __ASM_ARCH_CLOCK_H 11 #define __ASM_ARCH_CLOCK_H 12 13 #ifndef __ASSEMBLY__ 14 15 #ifdef CONFIG_SOC_K2HK 16 #include <asm/arch/clock-k2hk.h> 17 #endif 18 19 #ifdef CONFIG_SOC_K2E 20 #include <asm/arch/clock-k2e.h> 21 #endif 22 23 #ifdef CONFIG_SOC_K2L 24 #include <asm/arch/clock-k2l.h> 25 #endif 26 27 #define MAIN_PLL CORE_PLL 28 29 #include <asm/types.h> 30 31 #define GENERATE_ENUM(NUM, ENUM) ENUM = NUM, 32 #define GENERATE_INDX_STR(NUM, STRING) #NUM"\t- "#STRING"\n" 33 #define CLOCK_INDEXES_LIST CLK_LIST(GENERATE_INDX_STR) 34 35 enum { 36 SPD800, 37 SPD850, 38 SPD1000, 39 SPD1200, 40 SPD1250, 41 SPD1350, 42 SPD1400, 43 SPD1500, 44 NUM_SPDS, 45 }; 46 47 enum clk_e { 48 CLK_LIST(GENERATE_ENUM) 49 }; 50 51 struct keystone_pll_regs { 52 u32 reg0; 53 u32 reg1; 54 }; 55 56 /* PLL configuration data */ 57 struct pll_init_data { 58 int pll; 59 int pll_m; /* PLL Multiplier */ 60 int pll_d; /* PLL divider */ 61 int pll_od; /* PLL output divider */ 62 }; 63 64 extern const struct keystone_pll_regs keystone_pll_regs[]; 65 extern s16 divn_val[]; 66 extern int speeds[]; 67 68 void init_plls(int num_pll, struct pll_init_data *config); 69 void init_pll(const struct pll_init_data *data); 70 unsigned long clk_get_rate(unsigned int clk); 71 unsigned long clk_round_rate(unsigned int clk, unsigned long hz); 72 int clk_set_rate(unsigned int clk, unsigned long hz); 73 int get_max_dev_speed(void); 74 int get_max_arm_speed(void); 75 76 #endif 77 #endif 78