1*dc7de222SMasahiro Yamada /* 2*dc7de222SMasahiro Yamada * keystone2: common clock header file 3*dc7de222SMasahiro Yamada * 4*dc7de222SMasahiro Yamada * (C) Copyright 2012-2014 5*dc7de222SMasahiro Yamada * Texas Instruments Incorporated, <www.ti.com> 6*dc7de222SMasahiro Yamada * 7*dc7de222SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 8*dc7de222SMasahiro Yamada */ 9*dc7de222SMasahiro Yamada 10*dc7de222SMasahiro Yamada #ifndef __ASM_ARCH_CLOCK_H 11*dc7de222SMasahiro Yamada #define __ASM_ARCH_CLOCK_H 12*dc7de222SMasahiro Yamada 13*dc7de222SMasahiro Yamada #ifndef __ASSEMBLY__ 14*dc7de222SMasahiro Yamada 15*dc7de222SMasahiro Yamada #ifdef CONFIG_SOC_K2HK 16*dc7de222SMasahiro Yamada #include <asm/arch/clock-k2hk.h> 17*dc7de222SMasahiro Yamada #endif 18*dc7de222SMasahiro Yamada 19*dc7de222SMasahiro Yamada #ifdef CONFIG_SOC_K2E 20*dc7de222SMasahiro Yamada #include <asm/arch/clock-k2e.h> 21*dc7de222SMasahiro Yamada #endif 22*dc7de222SMasahiro Yamada 23*dc7de222SMasahiro Yamada #ifdef CONFIG_SOC_K2L 24*dc7de222SMasahiro Yamada #include <asm/arch/clock-k2l.h> 25*dc7de222SMasahiro Yamada #endif 26*dc7de222SMasahiro Yamada 27*dc7de222SMasahiro Yamada #define MAIN_PLL CORE_PLL 28*dc7de222SMasahiro Yamada 29*dc7de222SMasahiro Yamada #include <asm/types.h> 30*dc7de222SMasahiro Yamada 31*dc7de222SMasahiro Yamada #define GENERATE_ENUM(NUM, ENUM) ENUM = NUM, 32*dc7de222SMasahiro Yamada #define GENERATE_INDX_STR(NUM, STRING) #NUM"\t- "#STRING"\n" 33*dc7de222SMasahiro Yamada #define CLOCK_INDEXES_LIST CLK_LIST(GENERATE_INDX_STR) 34*dc7de222SMasahiro Yamada 35*dc7de222SMasahiro Yamada enum clk_e { 36*dc7de222SMasahiro Yamada CLK_LIST(GENERATE_ENUM) 37*dc7de222SMasahiro Yamada }; 38*dc7de222SMasahiro Yamada 39*dc7de222SMasahiro Yamada struct keystone_pll_regs { 40*dc7de222SMasahiro Yamada u32 reg0; 41*dc7de222SMasahiro Yamada u32 reg1; 42*dc7de222SMasahiro Yamada }; 43*dc7de222SMasahiro Yamada 44*dc7de222SMasahiro Yamada /* PLL configuration data */ 45*dc7de222SMasahiro Yamada struct pll_init_data { 46*dc7de222SMasahiro Yamada int pll; 47*dc7de222SMasahiro Yamada int pll_m; /* PLL Multiplier */ 48*dc7de222SMasahiro Yamada int pll_d; /* PLL divider */ 49*dc7de222SMasahiro Yamada int pll_od; /* PLL output divider */ 50*dc7de222SMasahiro Yamada }; 51*dc7de222SMasahiro Yamada 52*dc7de222SMasahiro Yamada extern const struct keystone_pll_regs keystone_pll_regs[]; 53*dc7de222SMasahiro Yamada extern int dev_speeds[]; 54*dc7de222SMasahiro Yamada extern int arm_speeds[]; 55*dc7de222SMasahiro Yamada 56*dc7de222SMasahiro Yamada void init_plls(int num_pll, struct pll_init_data *config); 57*dc7de222SMasahiro Yamada void init_pll(const struct pll_init_data *data); 58*dc7de222SMasahiro Yamada unsigned long clk_get_rate(unsigned int clk); 59*dc7de222SMasahiro Yamada unsigned long clk_round_rate(unsigned int clk, unsigned long hz); 60*dc7de222SMasahiro Yamada int clk_set_rate(unsigned int clk, unsigned long hz); 61*dc7de222SMasahiro Yamada void pass_pll_pa_clk_enable(void); 62*dc7de222SMasahiro Yamada int get_max_dev_speed(void); 63*dc7de222SMasahiro Yamada int get_max_arm_speed(void); 64*dc7de222SMasahiro Yamada 65*dc7de222SMasahiro Yamada #endif 66*dc7de222SMasahiro Yamada #endif 67