1*552a848eSStefano Babic /*
2*552a848eSStefano Babic * (C) Copyright 2007
3*552a848eSStefano Babic * Sascha Hauer, Pengutronix
4*552a848eSStefano Babic *
5*552a848eSStefano Babic * (C) Copyright 2009 Freescale Semiconductor, Inc.
6*552a848eSStefano Babic *
7*552a848eSStefano Babic * SPDX-License-Identifier: GPL-2.0+
8*552a848eSStefano Babic */
9*552a848eSStefano Babic
10*552a848eSStefano Babic #include <common.h>
11*552a848eSStefano Babic #include <asm/io.h>
12*552a848eSStefano Babic #include <div64.h>
13*552a848eSStefano Babic #include <asm/arch/imx-regs.h>
14*552a848eSStefano Babic #include <asm/arch/clock.h>
15*552a848eSStefano Babic #include <asm/arch/sys_proto.h>
16*552a848eSStefano Babic
17*552a848eSStefano Babic /* General purpose timers registers */
18*552a848eSStefano Babic struct mxc_gpt {
19*552a848eSStefano Babic unsigned int control;
20*552a848eSStefano Babic unsigned int prescaler;
21*552a848eSStefano Babic unsigned int status;
22*552a848eSStefano Babic unsigned int nouse[6];
23*552a848eSStefano Babic unsigned int counter;
24*552a848eSStefano Babic };
25*552a848eSStefano Babic
26*552a848eSStefano Babic static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
27*552a848eSStefano Babic
28*552a848eSStefano Babic /* General purpose timers bitfields */
29*552a848eSStefano Babic #define GPTCR_SWR (1 << 15) /* Software reset */
30*552a848eSStefano Babic #define GPTCR_24MEN (1 << 10) /* Enable 24MHz clock input */
31*552a848eSStefano Babic #define GPTCR_FRR (1 << 9) /* Freerun / restart */
32*552a848eSStefano Babic #define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source 32khz */
33*552a848eSStefano Babic #define GPTCR_CLKSOURCE_OSC (5 << 6) /* Clock source OSC */
34*552a848eSStefano Babic #define GPTCR_CLKSOURCE_PRE (1 << 6) /* Clock source PRECLK */
35*552a848eSStefano Babic #define GPTCR_CLKSOURCE_MASK (0x7 << 6)
36*552a848eSStefano Babic #define GPTCR_TEN 1 /* Timer enable */
37*552a848eSStefano Babic
38*552a848eSStefano Babic #define GPTPR_PRESCALER24M_SHIFT 12
39*552a848eSStefano Babic #define GPTPR_PRESCALER24M_MASK (0xF << GPTPR_PRESCALER24M_SHIFT)
40*552a848eSStefano Babic
41*552a848eSStefano Babic DECLARE_GLOBAL_DATA_PTR;
42*552a848eSStefano Babic
gpt_has_clk_source_osc(void)43*552a848eSStefano Babic static inline int gpt_has_clk_source_osc(void)
44*552a848eSStefano Babic {
45*552a848eSStefano Babic #if defined(CONFIG_MX6)
46*552a848eSStefano Babic if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) ||
47*552a848eSStefano Babic is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul() ||
48*552a848eSStefano Babic is_mx6ull() || is_mx6sll())
49*552a848eSStefano Babic return 1;
50*552a848eSStefano Babic
51*552a848eSStefano Babic return 0;
52*552a848eSStefano Babic #else
53*552a848eSStefano Babic return 0;
54*552a848eSStefano Babic #endif
55*552a848eSStefano Babic }
56*552a848eSStefano Babic
gpt_get_clk(void)57*552a848eSStefano Babic static inline ulong gpt_get_clk(void)
58*552a848eSStefano Babic {
59*552a848eSStefano Babic #ifdef CONFIG_MXC_GPT_HCLK
60*552a848eSStefano Babic if (gpt_has_clk_source_osc())
61*552a848eSStefano Babic return MXC_HCLK >> 3;
62*552a848eSStefano Babic else
63*552a848eSStefano Babic return mxc_get_clock(MXC_IPG_PERCLK);
64*552a848eSStefano Babic #else
65*552a848eSStefano Babic return MXC_CLK32;
66*552a848eSStefano Babic #endif
67*552a848eSStefano Babic }
68*552a848eSStefano Babic
timer_init(void)69*552a848eSStefano Babic int timer_init(void)
70*552a848eSStefano Babic {
71*552a848eSStefano Babic int i;
72*552a848eSStefano Babic
73*552a848eSStefano Babic /* setup GP Timer 1 */
74*552a848eSStefano Babic __raw_writel(GPTCR_SWR, &cur_gpt->control);
75*552a848eSStefano Babic
76*552a848eSStefano Babic /* We have no udelay by now */
77*552a848eSStefano Babic __raw_writel(0, &cur_gpt->control);
78*552a848eSStefano Babic
79*552a848eSStefano Babic i = __raw_readl(&cur_gpt->control);
80*552a848eSStefano Babic i &= ~GPTCR_CLKSOURCE_MASK;
81*552a848eSStefano Babic
82*552a848eSStefano Babic #ifdef CONFIG_MXC_GPT_HCLK
83*552a848eSStefano Babic if (gpt_has_clk_source_osc()) {
84*552a848eSStefano Babic i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN;
85*552a848eSStefano Babic
86*552a848eSStefano Babic /*
87*552a848eSStefano Babic * For DL/S, SX, UL, ULL, SLL set 24Mhz OSC
88*552a848eSStefano Babic * Enable bit and prescaler
89*552a848eSStefano Babic */
90*552a848eSStefano Babic if (is_mx6sdl() || is_mx6sx() || is_mx6ul() || is_mx6ull() ||
91*552a848eSStefano Babic is_mx6sll()) {
92*552a848eSStefano Babic i |= GPTCR_24MEN;
93*552a848eSStefano Babic
94*552a848eSStefano Babic /* Produce 3Mhz clock */
95*552a848eSStefano Babic __raw_writel((7 << GPTPR_PRESCALER24M_SHIFT),
96*552a848eSStefano Babic &cur_gpt->prescaler);
97*552a848eSStefano Babic }
98*552a848eSStefano Babic } else {
99*552a848eSStefano Babic i |= GPTCR_CLKSOURCE_PRE | GPTCR_TEN;
100*552a848eSStefano Babic }
101*552a848eSStefano Babic #else
102*552a848eSStefano Babic __raw_writel(0, &cur_gpt->prescaler); /* 32Khz */
103*552a848eSStefano Babic i |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
104*552a848eSStefano Babic #endif
105*552a848eSStefano Babic __raw_writel(i, &cur_gpt->control);
106*552a848eSStefano Babic
107*552a848eSStefano Babic return 0;
108*552a848eSStefano Babic }
109*552a848eSStefano Babic
timer_read_counter(void)110*552a848eSStefano Babic unsigned long timer_read_counter(void)
111*552a848eSStefano Babic {
112*552a848eSStefano Babic return __raw_readl(&cur_gpt->counter); /* current tick value */
113*552a848eSStefano Babic }
114*552a848eSStefano Babic
115*552a848eSStefano Babic /*
116*552a848eSStefano Babic * This function is derived from PowerPC code (timebase clock frequency).
117*552a848eSStefano Babic * On ARM it returns the number of timer ticks per second.
118*552a848eSStefano Babic */
get_tbclk(void)119*552a848eSStefano Babic ulong get_tbclk(void)
120*552a848eSStefano Babic {
121*552a848eSStefano Babic return gpt_get_clk();
122*552a848eSStefano Babic }
123*552a848eSStefano Babic
124*552a848eSStefano Babic /*
125*552a848eSStefano Babic * This function is intended for SHORT delays only.
126*552a848eSStefano Babic * It will overflow at around 10 seconds @ 400MHz,
127*552a848eSStefano Babic * or 20 seconds @ 200MHz.
128*552a848eSStefano Babic */
usec2ticks(unsigned long _usec)129*552a848eSStefano Babic unsigned long usec2ticks(unsigned long _usec)
130*552a848eSStefano Babic {
131*552a848eSStefano Babic unsigned long long usec = _usec;
132*552a848eSStefano Babic
133*552a848eSStefano Babic usec *= get_tbclk();
134*552a848eSStefano Babic usec += 999999;
135*552a848eSStefano Babic do_div(usec, 1000000);
136*552a848eSStefano Babic
137*552a848eSStefano Babic return usec;
138*552a848eSStefano Babic }
139