1*77b55e8cSThomas Abraham /* 2*77b55e8cSThomas Abraham * (C) Copyright 2012 SAMSUNG Electronics 3*77b55e8cSThomas Abraham * Padmavathi Venna <padma.v@samsung.com> 4*77b55e8cSThomas Abraham * 5*77b55e8cSThomas Abraham * SPDX-License-Identifier: GPL-2.0+ 6*77b55e8cSThomas Abraham */ 7*77b55e8cSThomas Abraham 8*77b55e8cSThomas Abraham #ifndef __ASM_ARCH_EXYNOS_COMMON_SPI_H_ 9*77b55e8cSThomas Abraham #define __ASM_ARCH_EXYNOS_COMMON_SPI_H_ 10*77b55e8cSThomas Abraham 11*77b55e8cSThomas Abraham #ifndef __ASSEMBLY__ 12*77b55e8cSThomas Abraham 13*77b55e8cSThomas Abraham /* SPI peripheral register map; padded to 64KB */ 14*77b55e8cSThomas Abraham struct exynos_spi { 15*77b55e8cSThomas Abraham unsigned int ch_cfg; /* 0x00 */ 16*77b55e8cSThomas Abraham unsigned char reserved0[4]; 17*77b55e8cSThomas Abraham unsigned int mode_cfg; /* 0x08 */ 18*77b55e8cSThomas Abraham unsigned int cs_reg; /* 0x0c */ 19*77b55e8cSThomas Abraham unsigned char reserved1[4]; 20*77b55e8cSThomas Abraham unsigned int spi_sts; /* 0x14 */ 21*77b55e8cSThomas Abraham unsigned int tx_data; /* 0x18 */ 22*77b55e8cSThomas Abraham unsigned int rx_data; /* 0x1c */ 23*77b55e8cSThomas Abraham unsigned int pkt_cnt; /* 0x20 */ 24*77b55e8cSThomas Abraham unsigned char reserved2[4]; 25*77b55e8cSThomas Abraham unsigned int swap_cfg; /* 0x28 */ 26*77b55e8cSThomas Abraham unsigned int fb_clk; /* 0x2c */ 27*77b55e8cSThomas Abraham unsigned char padding[0xffd0]; 28*77b55e8cSThomas Abraham }; 29*77b55e8cSThomas Abraham 30*77b55e8cSThomas Abraham #define EXYNOS_SPI_MAX_FREQ 50000000 31*77b55e8cSThomas Abraham 32*77b55e8cSThomas Abraham #define SPI_TIMEOUT_MS 10 33*77b55e8cSThomas Abraham #define SF_READ_DATA_CMD 0x3 34*77b55e8cSThomas Abraham 35*77b55e8cSThomas Abraham /* SPI_CHCFG */ 36*77b55e8cSThomas Abraham #define SPI_CH_HS_EN (1 << 6) 37*77b55e8cSThomas Abraham #define SPI_CH_RST (1 << 5) 38*77b55e8cSThomas Abraham #define SPI_SLAVE_MODE (1 << 4) 39*77b55e8cSThomas Abraham #define SPI_CH_CPOL_L (1 << 3) 40*77b55e8cSThomas Abraham #define SPI_CH_CPHA_B (1 << 2) 41*77b55e8cSThomas Abraham #define SPI_RX_CH_ON (1 << 1) 42*77b55e8cSThomas Abraham #define SPI_TX_CH_ON (1 << 0) 43*77b55e8cSThomas Abraham 44*77b55e8cSThomas Abraham /* SPI_MODECFG */ 45*77b55e8cSThomas Abraham #define SPI_MODE_CH_WIDTH_WORD (0x2 << 29) 46*77b55e8cSThomas Abraham #define SPI_MODE_BUS_WIDTH_WORD (0x2 << 17) 47*77b55e8cSThomas Abraham 48*77b55e8cSThomas Abraham /* SPI_CSREG */ 49*77b55e8cSThomas Abraham #define SPI_SLAVE_SIG_INACT (1 << 0) 50*77b55e8cSThomas Abraham 51*77b55e8cSThomas Abraham /* SPI_STS */ 52*77b55e8cSThomas Abraham #define SPI_ST_TX_DONE (1 << 25) 53*77b55e8cSThomas Abraham #define SPI_FIFO_LVL_MASK 0x1ff 54*77b55e8cSThomas Abraham #define SPI_TX_LVL_OFFSET 6 55*77b55e8cSThomas Abraham #define SPI_RX_LVL_OFFSET 15 56*77b55e8cSThomas Abraham 57*77b55e8cSThomas Abraham /* Feedback Delay */ 58*77b55e8cSThomas Abraham #define SPI_CLK_BYPASS (0 << 0) 59*77b55e8cSThomas Abraham #define SPI_FB_DELAY_90 (1 << 0) 60*77b55e8cSThomas Abraham #define SPI_FB_DELAY_180 (2 << 0) 61*77b55e8cSThomas Abraham #define SPI_FB_DELAY_270 (3 << 0) 62*77b55e8cSThomas Abraham 63*77b55e8cSThomas Abraham /* Packet Count */ 64*77b55e8cSThomas Abraham #define SPI_PACKET_CNT_EN (1 << 16) 65*77b55e8cSThomas Abraham 66*77b55e8cSThomas Abraham /* Swap config */ 67*77b55e8cSThomas Abraham #define SPI_TX_SWAP_EN (1 << 0) 68*77b55e8cSThomas Abraham #define SPI_TX_BYTE_SWAP (1 << 2) 69*77b55e8cSThomas Abraham #define SPI_TX_HWORD_SWAP (1 << 3) 70*77b55e8cSThomas Abraham #define SPI_TX_BYTE_SWAP (1 << 2) 71*77b55e8cSThomas Abraham #define SPI_RX_SWAP_EN (1 << 4) 72*77b55e8cSThomas Abraham #define SPI_RX_BYTE_SWAP (1 << 6) 73*77b55e8cSThomas Abraham #define SPI_RX_HWORD_SWAP (1 << 7) 74*77b55e8cSThomas Abraham 75*77b55e8cSThomas Abraham #endif /* __ASSEMBLY__ */ 76*77b55e8cSThomas Abraham #endif 77