1*77b55e8cSThomas Abraham /* 2*77b55e8cSThomas Abraham * Copyright (C) 2012 Samsung Electronics 3*77b55e8cSThomas Abraham * Rajeshwari Shinde <rajeshwari.s@samsung.com> 4*77b55e8cSThomas Abraham * 5*77b55e8cSThomas Abraham * SPDX-License-Identifier: GPL-2.0+ 6*77b55e8cSThomas Abraham */ 7*77b55e8cSThomas Abraham 8*77b55e8cSThomas Abraham #ifndef __ASM_ARM_ARCH_PERIPH_H 9*77b55e8cSThomas Abraham #define __ASM_ARM_ARCH_PERIPH_H 10*77b55e8cSThomas Abraham 11*77b55e8cSThomas Abraham /* 12*77b55e8cSThomas Abraham * Peripherals required for pinmux configuration. List will 13*77b55e8cSThomas Abraham * grow with support for more devices getting added. 14*77b55e8cSThomas Abraham * Numbering based on interrupt table. 15*77b55e8cSThomas Abraham * 16*77b55e8cSThomas Abraham */ 17*77b55e8cSThomas Abraham enum periph_id { 18*77b55e8cSThomas Abraham PERIPH_ID_UART0 = 51, 19*77b55e8cSThomas Abraham PERIPH_ID_UART1, 20*77b55e8cSThomas Abraham PERIPH_ID_UART2, 21*77b55e8cSThomas Abraham PERIPH_ID_UART3, 22*77b55e8cSThomas Abraham PERIPH_ID_I2C0 = 56, 23*77b55e8cSThomas Abraham PERIPH_ID_I2C1, 24*77b55e8cSThomas Abraham PERIPH_ID_I2C2, 25*77b55e8cSThomas Abraham PERIPH_ID_I2C3, 26*77b55e8cSThomas Abraham PERIPH_ID_I2C4, 27*77b55e8cSThomas Abraham PERIPH_ID_I2C5, 28*77b55e8cSThomas Abraham PERIPH_ID_I2C6, 29*77b55e8cSThomas Abraham PERIPH_ID_I2C7, 30*77b55e8cSThomas Abraham PERIPH_ID_SPI0 = 68, 31*77b55e8cSThomas Abraham PERIPH_ID_SPI1, 32*77b55e8cSThomas Abraham PERIPH_ID_SPI2, 33*77b55e8cSThomas Abraham PERIPH_ID_SDMMC0 = 75, 34*77b55e8cSThomas Abraham PERIPH_ID_SDMMC1, 35*77b55e8cSThomas Abraham PERIPH_ID_SDMMC2, 36*77b55e8cSThomas Abraham PERIPH_ID_SDMMC3, 37*77b55e8cSThomas Abraham PERIPH_ID_I2C8 = 87, 38*77b55e8cSThomas Abraham PERIPH_ID_I2C9, 39*77b55e8cSThomas Abraham PERIPH_ID_I2S0 = 98, 40*77b55e8cSThomas Abraham PERIPH_ID_I2S1 = 99, 41*77b55e8cSThomas Abraham 42*77b55e8cSThomas Abraham /* Since following peripherals do 43*77b55e8cSThomas Abraham * not have shared peripheral interrupts (SPIs) 44*77b55e8cSThomas Abraham * they are numbered arbitiraly after the maximum 45*77b55e8cSThomas Abraham * SPIs Exynos has (128) 46*77b55e8cSThomas Abraham */ 47*77b55e8cSThomas Abraham PERIPH_ID_SROMC = 128, 48*77b55e8cSThomas Abraham PERIPH_ID_SPI3, 49*77b55e8cSThomas Abraham PERIPH_ID_SPI4, 50*77b55e8cSThomas Abraham PERIPH_ID_SDMMC4, 51*77b55e8cSThomas Abraham PERIPH_ID_PWM0, 52*77b55e8cSThomas Abraham PERIPH_ID_PWM1, 53*77b55e8cSThomas Abraham PERIPH_ID_PWM2, 54*77b55e8cSThomas Abraham PERIPH_ID_PWM3, 55*77b55e8cSThomas Abraham PERIPH_ID_PWM4, 56*77b55e8cSThomas Abraham PERIPH_ID_DPHPD, 57*77b55e8cSThomas Abraham PERIPH_ID_I2C10 = 203, 58*77b55e8cSThomas Abraham 59*77b55e8cSThomas Abraham PERIPH_ID_NONE = -1, 60*77b55e8cSThomas Abraham }; 61*77b55e8cSThomas Abraham 62*77b55e8cSThomas Abraham #endif /* __ASM_ARM_ARCH_PERIPH_H */ 63