xref: /rk3399_rockchip-uboot/arch/arm/mach-davinci/misc.c (revision 601fbec7cf815bc2b26ba2546ac5e8501fc7edae)
1*601fbec7SMasahiro Yamada /*
2*601fbec7SMasahiro Yamada  * Miscelaneous DaVinci functions.
3*601fbec7SMasahiro Yamada  *
4*601fbec7SMasahiro Yamada  * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
5*601fbec7SMasahiro Yamada  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6*601fbec7SMasahiro Yamada  * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
7*601fbec7SMasahiro Yamada  * Copyright (C) 2004 Texas Instruments.
8*601fbec7SMasahiro Yamada  *
9*601fbec7SMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
10*601fbec7SMasahiro Yamada  */
11*601fbec7SMasahiro Yamada 
12*601fbec7SMasahiro Yamada #include <common.h>
13*601fbec7SMasahiro Yamada #include <i2c.h>
14*601fbec7SMasahiro Yamada #include <net.h>
15*601fbec7SMasahiro Yamada #include <asm/arch/hardware.h>
16*601fbec7SMasahiro Yamada #include <asm/io.h>
17*601fbec7SMasahiro Yamada #include <asm/arch/davinci_misc.h>
18*601fbec7SMasahiro Yamada 
19*601fbec7SMasahiro Yamada DECLARE_GLOBAL_DATA_PTR;
20*601fbec7SMasahiro Yamada 
21*601fbec7SMasahiro Yamada #ifndef CONFIG_SPL_BUILD
22*601fbec7SMasahiro Yamada int dram_init(void)
23*601fbec7SMasahiro Yamada {
24*601fbec7SMasahiro Yamada 	/* dram_init must store complete ramsize in gd->ram_size */
25*601fbec7SMasahiro Yamada 	gd->ram_size = get_ram_size(
26*601fbec7SMasahiro Yamada 			(void *)CONFIG_SYS_SDRAM_BASE,
27*601fbec7SMasahiro Yamada 			CONFIG_MAX_RAM_BANK_SIZE);
28*601fbec7SMasahiro Yamada 	return 0;
29*601fbec7SMasahiro Yamada }
30*601fbec7SMasahiro Yamada 
31*601fbec7SMasahiro Yamada void dram_init_banksize(void)
32*601fbec7SMasahiro Yamada {
33*601fbec7SMasahiro Yamada 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
34*601fbec7SMasahiro Yamada 	gd->bd->bi_dram[0].size = gd->ram_size;
35*601fbec7SMasahiro Yamada }
36*601fbec7SMasahiro Yamada #endif
37*601fbec7SMasahiro Yamada 
38*601fbec7SMasahiro Yamada #ifdef CONFIG_DRIVER_TI_EMAC
39*601fbec7SMasahiro Yamada /*
40*601fbec7SMasahiro Yamada  * Read ethernet MAC address from EEPROM for DVEVM compatible boards.
41*601fbec7SMasahiro Yamada  * Returns 1 if found, 0 otherwise.
42*601fbec7SMasahiro Yamada  */
43*601fbec7SMasahiro Yamada int dvevm_read_mac_address(uint8_t *buf)
44*601fbec7SMasahiro Yamada {
45*601fbec7SMasahiro Yamada #ifdef CONFIG_SYS_I2C_EEPROM_ADDR
46*601fbec7SMasahiro Yamada 	/* Read MAC address. */
47*601fbec7SMasahiro Yamada 	if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x7F00,
48*601fbec7SMasahiro Yamada 		CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &buf[0], 6))
49*601fbec7SMasahiro Yamada 		goto i2cerr;
50*601fbec7SMasahiro Yamada 
51*601fbec7SMasahiro Yamada 	/* Check that MAC address is valid. */
52*601fbec7SMasahiro Yamada 	if (!is_valid_ether_addr(buf))
53*601fbec7SMasahiro Yamada 		goto err;
54*601fbec7SMasahiro Yamada 
55*601fbec7SMasahiro Yamada 	return 1; /* Found */
56*601fbec7SMasahiro Yamada 
57*601fbec7SMasahiro Yamada i2cerr:
58*601fbec7SMasahiro Yamada 	printf("Read from EEPROM @ 0x%02x failed\n",
59*601fbec7SMasahiro Yamada 		CONFIG_SYS_I2C_EEPROM_ADDR);
60*601fbec7SMasahiro Yamada err:
61*601fbec7SMasahiro Yamada #endif /* CONFIG_SYS_I2C_EEPROM_ADDR */
62*601fbec7SMasahiro Yamada 
63*601fbec7SMasahiro Yamada 	return 0;
64*601fbec7SMasahiro Yamada }
65*601fbec7SMasahiro Yamada 
66*601fbec7SMasahiro Yamada /*
67*601fbec7SMasahiro Yamada  * Set the mii mode as MII or RMII
68*601fbec7SMasahiro Yamada  */
69*601fbec7SMasahiro Yamada #if defined(CONFIG_SOC_DA8XX)
70*601fbec7SMasahiro Yamada void davinci_emac_mii_mode_sel(int mode_sel)
71*601fbec7SMasahiro Yamada {
72*601fbec7SMasahiro Yamada 	int val;
73*601fbec7SMasahiro Yamada 
74*601fbec7SMasahiro Yamada 	val = readl(&davinci_syscfg_regs->cfgchip3);
75*601fbec7SMasahiro Yamada 	if (mode_sel == 0)
76*601fbec7SMasahiro Yamada 		val &= ~(1 << 8);
77*601fbec7SMasahiro Yamada 	else
78*601fbec7SMasahiro Yamada 		val |= (1 << 8);
79*601fbec7SMasahiro Yamada 	writel(val, &davinci_syscfg_regs->cfgchip3);
80*601fbec7SMasahiro Yamada }
81*601fbec7SMasahiro Yamada #endif
82*601fbec7SMasahiro Yamada /*
83*601fbec7SMasahiro Yamada  * If there is no MAC address in the environment, then it will be initialized
84*601fbec7SMasahiro Yamada  * (silently) from the value in the EEPROM.
85*601fbec7SMasahiro Yamada  */
86*601fbec7SMasahiro Yamada void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
87*601fbec7SMasahiro Yamada {
88*601fbec7SMasahiro Yamada 	uint8_t env_enetaddr[6];
89*601fbec7SMasahiro Yamada 	int ret;
90*601fbec7SMasahiro Yamada 
91*601fbec7SMasahiro Yamada 	ret = eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr);
92*601fbec7SMasahiro Yamada 	if (!ret) {
93*601fbec7SMasahiro Yamada 		/*
94*601fbec7SMasahiro Yamada 		 * There is no MAC address in the environment, so we
95*601fbec7SMasahiro Yamada 		 * initialize it from the value in the EEPROM.
96*601fbec7SMasahiro Yamada 		 */
97*601fbec7SMasahiro Yamada 		debug("### Setting environment from EEPROM MAC address = "
98*601fbec7SMasahiro Yamada 			"\"%pM\"\n",
99*601fbec7SMasahiro Yamada 			env_enetaddr);
100*601fbec7SMasahiro Yamada 		ret = !eth_setenv_enetaddr("ethaddr", rom_enetaddr);
101*601fbec7SMasahiro Yamada 	}
102*601fbec7SMasahiro Yamada 	if (!ret)
103*601fbec7SMasahiro Yamada 		printf("Failed to set mac address from EEPROM: %d\n", ret);
104*601fbec7SMasahiro Yamada }
105*601fbec7SMasahiro Yamada #endif	/* CONFIG_DRIVER_TI_EMAC */
106*601fbec7SMasahiro Yamada 
107*601fbec7SMasahiro Yamada #if defined(CONFIG_SOC_DA8XX)
108*601fbec7SMasahiro Yamada #ifndef CONFIG_USE_IRQ
109*601fbec7SMasahiro Yamada void irq_init(void)
110*601fbec7SMasahiro Yamada {
111*601fbec7SMasahiro Yamada 	/*
112*601fbec7SMasahiro Yamada 	 * Mask all IRQs by clearing the global enable and setting
113*601fbec7SMasahiro Yamada 	 * the enable clear for all the 90 interrupts.
114*601fbec7SMasahiro Yamada 	 */
115*601fbec7SMasahiro Yamada 	writel(0, &davinci_aintc_regs->ger);
116*601fbec7SMasahiro Yamada 
117*601fbec7SMasahiro Yamada 	writel(0, &davinci_aintc_regs->hier);
118*601fbec7SMasahiro Yamada 
119*601fbec7SMasahiro Yamada 	writel(0xffffffff, &davinci_aintc_regs->ecr1);
120*601fbec7SMasahiro Yamada 	writel(0xffffffff, &davinci_aintc_regs->ecr2);
121*601fbec7SMasahiro Yamada 	writel(0xffffffff, &davinci_aintc_regs->ecr3);
122*601fbec7SMasahiro Yamada }
123*601fbec7SMasahiro Yamada #endif
124*601fbec7SMasahiro Yamada 
125*601fbec7SMasahiro Yamada /*
126*601fbec7SMasahiro Yamada  * Enable PSC for various peripherals.
127*601fbec7SMasahiro Yamada  */
128*601fbec7SMasahiro Yamada int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
129*601fbec7SMasahiro Yamada 				    const int n_items)
130*601fbec7SMasahiro Yamada {
131*601fbec7SMasahiro Yamada 	int i;
132*601fbec7SMasahiro Yamada 
133*601fbec7SMasahiro Yamada 	for (i = 0; i < n_items; i++)
134*601fbec7SMasahiro Yamada 		lpsc_on(item[i].lpsc_no);
135*601fbec7SMasahiro Yamada 
136*601fbec7SMasahiro Yamada 	return 0;
137*601fbec7SMasahiro Yamada }
138*601fbec7SMasahiro Yamada #endif
139