xref: /rk3399_rockchip-uboot/arch/arm/mach-bcm283x/include/mach/gpio.h (revision b59357464c09e2e81dfae96213e3af2b16313585)
1d6c418e4SMasahiro Yamada /*
2d6c418e4SMasahiro Yamada  * Copyright (C) 2012 Vikram Narayananan
3d6c418e4SMasahiro Yamada  * <vikram186@gmail.com>
4d6c418e4SMasahiro Yamada  * (C) Copyright 2012,2015 Stephen Warren
5d6c418e4SMasahiro Yamada  *
6d6c418e4SMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
7d6c418e4SMasahiro Yamada  */
8d6c418e4SMasahiro Yamada 
9d6c418e4SMasahiro Yamada #ifndef _BCM2835_GPIO_H_
10d6c418e4SMasahiro Yamada #define _BCM2835_GPIO_H_
11d6c418e4SMasahiro Yamada 
12d6c418e4SMasahiro Yamada #define BCM2835_GPIO_COUNT		54
13d6c418e4SMasahiro Yamada 
14d6c418e4SMasahiro Yamada #define BCM2835_GPIO_FSEL_MASK		0x7
15d6c418e4SMasahiro Yamada #define BCM2835_GPIO_INPUT		0x0
16d6c418e4SMasahiro Yamada #define BCM2835_GPIO_OUTPUT		0x1
17d6c418e4SMasahiro Yamada #define BCM2835_GPIO_ALT0		0x4
18d6c418e4SMasahiro Yamada #define BCM2835_GPIO_ALT1		0x5
19d6c418e4SMasahiro Yamada #define BCM2835_GPIO_ALT2		0x6
20d6c418e4SMasahiro Yamada #define BCM2835_GPIO_ALT3		0x7
21d6c418e4SMasahiro Yamada #define BCM2835_GPIO_ALT4		0x3
22d6c418e4SMasahiro Yamada #define BCM2835_GPIO_ALT5		0x2
23d6c418e4SMasahiro Yamada 
24d6c418e4SMasahiro Yamada #define BCM2835_GPIO_COMMON_BANK(gpio)	((gpio < 32) ? 0 : 1)
25d6c418e4SMasahiro Yamada #define BCM2835_GPIO_COMMON_SHIFT(gpio)	(gpio & 0x1f)
26d6c418e4SMasahiro Yamada 
27d6c418e4SMasahiro Yamada #define BCM2835_GPIO_FSEL_BANK(gpio)	(gpio / 10)
28d6c418e4SMasahiro Yamada #define BCM2835_GPIO_FSEL_SHIFT(gpio)	((gpio % 10) * 3)
29d6c418e4SMasahiro Yamada 
30d6c418e4SMasahiro Yamada struct bcm2835_gpio_regs {
31d6c418e4SMasahiro Yamada 	u32 gpfsel[6];
32d6c418e4SMasahiro Yamada 	u32 reserved1;
33d6c418e4SMasahiro Yamada 	u32 gpset[2];
34d6c418e4SMasahiro Yamada 	u32 reserved2;
35d6c418e4SMasahiro Yamada 	u32 gpclr[2];
36d6c418e4SMasahiro Yamada 	u32 reserved3;
37d6c418e4SMasahiro Yamada 	u32 gplev[2];
38d6c418e4SMasahiro Yamada 	u32 reserved4;
39d6c418e4SMasahiro Yamada 	u32 gpeds[2];
40d6c418e4SMasahiro Yamada 	u32 reserved5;
41d6c418e4SMasahiro Yamada 	u32 gpren[2];
42d6c418e4SMasahiro Yamada 	u32 reserved6;
43d6c418e4SMasahiro Yamada 	u32 gpfen[2];
44d6c418e4SMasahiro Yamada 	u32 reserved7;
45d6c418e4SMasahiro Yamada 	u32 gphen[2];
46d6c418e4SMasahiro Yamada 	u32 reserved8;
47d6c418e4SMasahiro Yamada 	u32 gplen[2];
48d6c418e4SMasahiro Yamada 	u32 reserved9;
49d6c418e4SMasahiro Yamada 	u32 gparen[2];
50d6c418e4SMasahiro Yamada 	u32 reserved10;
51d6c418e4SMasahiro Yamada 	u32 gppud;
52d6c418e4SMasahiro Yamada 	u32 gppudclk[2];
53d6c418e4SMasahiro Yamada };
54d6c418e4SMasahiro Yamada 
55d6c418e4SMasahiro Yamada /**
56d6c418e4SMasahiro Yamada  * struct bcm2835_gpio_platdata - GPIO platform description
57d6c418e4SMasahiro Yamada  *
58d6c418e4SMasahiro Yamada  * @base: Base address of GPIO controller
59d6c418e4SMasahiro Yamada  */
60d6c418e4SMasahiro Yamada struct bcm2835_gpio_platdata {
61d6c418e4SMasahiro Yamada 	unsigned long base;
62d6c418e4SMasahiro Yamada };
63d6c418e4SMasahiro Yamada 
64*04a993feSAlexander Graf int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio);
65*04a993feSAlexander Graf 
66d6c418e4SMasahiro Yamada #endif /* _BCM2835_GPIO_H_ */
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